drivers/gpio/gpio-pca953x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  *  PCA953x 4/8/16/24/40 bit I/O ports
   4  *
   5  *  Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
   6  *  Copyright (C) 2007 Marvell International Ltd.
   7  *
   8  *  Derived from drivers/i2c/chips/pca9539.c
   9  */
  10
  11 #include <linux/acpi.h>
  12 #include <linux/bitmap.h>
  13 #include <linux/gpio/driver.h>
  14 #include <linux/gpio/consumer.h>
  15 #include <linux/i2c.h>
  16 #include <linux/init.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/platform_data/pca953x.h>
  21 #include <linux/regmap.h>
  22 #include <linux/regulator/consumer.h>
  23 #include <linux/slab.h>
  24
  25 #include <asm/unaligned.h>
  26
  27 #define PCA953X_INPUT           0x00
  28 #define PCA953X_OUTPUT          0x01
  29 #define PCA953X_INVERT          0x02
  30 #define PCA953X_DIRECTION       0x03
  31
  32 #define REG_ADDR_MASK           GENMASK(5, 0)
  33 #define REG_ADDR_EXT            BIT(6)
  34 #define REG_ADDR_AI             BIT(7)
  35
  36 #define PCA957X_IN              0x00
  37 #define PCA957X_INVRT           0x01
  38 #define PCA957X_BKEN            0x02
  39 #define PCA957X_PUPD            0x03
  40 #define PCA957X_CFG             0x04
  41 #define PCA957X_OUT             0x05
  42 #define PCA957X_MSK             0x06
  43 #define PCA957X_INTS            0x07
  44
  45 #define PCAL953X_OUT_STRENGTH   0x20
  46 #define PCAL953X_IN_LATCH       0x22
  47 #define PCAL953X_PULL_EN        0x23
  48 #define PCAL953X_PULL_SEL       0x24
  49 #define PCAL953X_INT_MASK       0x25
  50 #define PCAL953X_INT_STAT       0x26
  51 #define PCAL953X_OUT_CONF       0x27
  52
  53 #define PCAL6524_INT_EDGE       0x28
  54 #define PCAL6524_INT_CLR        0x2a
  55 #define PCAL6524_IN_STATUS      0x2b
  56 #define PCAL6524_OUT_INDCONF    0x2c
  57 #define PCAL6524_DEBOUNCE       0x2d
  58
  59 #define PCA_GPIO_MASK           GENMASK(7, 0)
  60
  61 #define PCAL_GPIO_MASK          GENMASK(4, 0)
  62 #define PCAL_PINCTRL_MASK       GENMASK(6, 5)
  63
  64 #define PCA_INT                 BIT(8)
  65 #define PCA_PCAL                BIT(9)
  66 #define PCA_LATCH_INT           (PCA_PCAL | PCA_INT)
  67 #define PCA953X_TYPE            BIT(12)
  68 #define PCA957X_TYPE            BIT(13)
  69 #define PCA_TYPE_MASK           GENMASK(15, 12)
  70
  71 #define PCA_CHIP_TYPE(x)        ((x) & PCA_TYPE_MASK)
  72
  73 static const struct i2c_device_id pca953x_id[] = {
  74         { "pca6408", 8  | PCA953X_TYPE | PCA_INT, },
  75         { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
  76         { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
  77         { "pca9506", 40 | PCA953X_TYPE | PCA_INT, },
  78         { "pca9534", 8  | PCA953X_TYPE | PCA_INT, },
  79         { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
  80         { "pca9536", 4  | PCA953X_TYPE, },
  81         { "pca9537", 4  | PCA953X_TYPE | PCA_INT, },
  82         { "pca9538", 8  | PCA953X_TYPE | PCA_INT, },
  83         { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
  84         { "pca9554", 8  | PCA953X_TYPE | PCA_INT, },
  85         { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
  86         { "pca9556", 8  | PCA953X_TYPE, },
  87         { "pca9557", 8  | PCA953X_TYPE, },
  88         { "pca9574", 8  | PCA957X_TYPE | PCA_INT, },
  89         { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
  90         { "pca9698", 40 | PCA953X_TYPE, },
  91
  92         { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  93         { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
  94         { "pcal9535", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  95         { "pcal9554b", 8  | PCA953X_TYPE | PCA_LATCH_INT, },
  96         { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
  97
  98         { "max7310", 8  | PCA953X_TYPE, },
  99         { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
 100         { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
 101         { "max7315", 8  | PCA953X_TYPE | PCA_INT, },
 102         { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
 103         { "pca6107", 8  | PCA953X_TYPE | PCA_INT, },
 104         { "tca6408", 8  | PCA953X_TYPE | PCA_INT, },
 105         { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
 106         { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
 107         { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
 108         { "tca9554", 8  | PCA953X_TYPE | PCA_INT, },
 109         { "xra1202", 8  | PCA953X_TYPE },
 110         { }
 111 };
 112 MODULE_DEVICE_TABLE(i2c, pca953x_id);
 113
 114 #ifdef CONFIG_GPIO_PCA953X_IRQ
 115
 116 #include <linux/dmi.h>
 117
 118 static const struct acpi_gpio_params pca953x_irq_gpios = { 0, 0, true };
 119
 120 static const struct acpi_gpio_mapping pca953x_acpi_irq_gpios[] = {
 121         { "irq-gpios", &pca953x_irq_gpios, 1, ACPI_GPIO_QUIRK_ABSOLUTE_NUMBER },
 122         { }
 123 };
 124
 125 static int pca953x_acpi_get_irq(struct device *dev)
 126 {
 127         int ret;
 128
 129         ret = devm_acpi_dev_add_driver_gpios(dev, pca953x_acpi_irq_gpios);
 130         if (ret)
 131                 dev_warn(dev, "can't add GPIO ACPI mapping\n");
 132
 133         ret = acpi_dev_gpio_irq_get_by(ACPI_COMPANION(dev), "irq-gpios", 0);
 134         if (ret < 0)
 135                 return ret;
 136
 137         dev_info(dev, "ACPI interrupt quirk (IRQ %d)\n", ret);
 138         return ret;
 139 }
 140
 141 static const struct dmi_system_id pca953x_dmi_acpi_irq_info[] = {
 142         {
 143                 /*
 144                  * On Intel Galileo Gen 2 board the IRQ pin of one of
 145                  * the I²C GPIO expanders, which has GpioInt() resource,
 146                  * is provided as an absolute number instead of being
 147                  * relative. Since first controller (gpio-sch.c) and
 148                  * second (gpio-dwapb.c) are at the fixed bases, we may
 149                  * safely refer to the number in the global space to get
 150                  * an IRQ out of it.
 151                  */
 152                 .matches = {
 153                         DMI_EXACT_MATCH(DMI_BOARD_NAME, "GalileoGen2"),
 154                 },
 155         },
 156         {}
 157 };
 158 #endif
 159
 160 static const struct acpi_device_id pca953x_acpi_ids[] = {
 161         { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
 162         { }
 163 };
 164 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
 165
 166 #define MAX_BANK 5
 167 #define BANK_SZ 8
 168 #define MAX_LINE        (MAX_BANK * BANK_SZ)
 169
 170 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
 171
 172 struct pca953x_reg_config {
 173         int direction;
 174         int output;
 175         int input;
 176         int invert;
 177 };
 178
 179 static const struct pca953x_reg_config pca953x_regs = {
 180         .direction = PCA953X_DIRECTION,
 181         .output = PCA953X_OUTPUT,
 182         .input = PCA953X_INPUT,
 183         .invert = PCA953X_INVERT,
 184 };
 185
 186 static const struct pca953x_reg_config pca957x_regs = {
 187         .direction = PCA957X_CFG,
 188         .output = PCA957X_OUT,
 189         .input = PCA957X_IN,
 190         .invert = PCA957X_INVRT,
 191 };
 192
 193 struct pca953x_chip {
 194         unsigned gpio_start;
 195         struct mutex i2c_lock;
 196         struct regmap *regmap;
 197
 198 #ifdef CONFIG_GPIO_PCA953X_IRQ
 199         struct mutex irq_lock;
 200         DECLARE_BITMAP(irq_mask, MAX_LINE);
 201         DECLARE_BITMAP(irq_stat, MAX_LINE);
 202         DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
 203         DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
 204 #endif
 205         atomic_t wakeup_path;
 206
 207         struct i2c_client *client;
 208         struct gpio_chip gpio_chip;
 209         const char *const *names;
 210         unsigned long driver_data;
 211         struct regulator *regulator;
 212
 213         const struct pca953x_reg_config *regs;
 214 };
 215
 216 static int pca953x_bank_shift(struct pca953x_chip *chip)
 217 {
 218         return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
 219 }
 220
 221 #define PCA953x_BANK_INPUT      BIT(0)
 222 #define PCA953x_BANK_OUTPUT     BIT(1)
 223 #define PCA953x_BANK_POLARITY   BIT(2)
 224 #define PCA953x_BANK_CONFIG     BIT(3)
 225
 226 #define PCA957x_BANK_INPUT      BIT(0)
 227 #define PCA957x_BANK_POLARITY   BIT(1)
 228 #define PCA957x_BANK_BUSHOLD    BIT(2)
 229 #define PCA957x_BANK_CONFIG     BIT(4)
 230 #define PCA957x_BANK_OUTPUT     BIT(5)
 231
 232 #define PCAL9xxx_BANK_IN_LATCH  BIT(8 + 2)
 233 #define PCAL9xxx_BANK_PULL_EN   BIT(8 + 3)
 234 #define PCAL9xxx_BANK_PULL_SEL  BIT(8 + 4)
 235 #define PCAL9xxx_BANK_IRQ_MASK  BIT(8 + 5)
 236 #define PCAL9xxx_BANK_IRQ_STAT  BIT(8 + 6)
 237
 238 /*
 239  * We care about the following registers:
 240  * - Standard set, below 0x40, each port can be replicated up to 8 times
 241  *   - PCA953x standard
 242  *     Input port                       0x00 + 0 * bank_size    R
 243  *     Output port                      0x00 + 1 * bank_size    RW
 244  *     Polarity Inversion port          0x00 + 2 * bank_size    RW
 245  *     Configuration port               0x00 + 3 * bank_size    RW
 246  *   - PCA957x with mixed up registers
 247  *     Input port                       0x00 + 0 * bank_size    R
 248  *     Polarity Inversion port          0x00 + 1 * bank_size    RW
 249  *     Bus hold port                    0x00 + 2 * bank_size    RW
 250  *     Configuration port               0x00 + 4 * bank_size    RW
 251  *     Output port                      0x00 + 5 * bank_size    RW
 252  *
 253  * - Extended set, above 0x40, often chip specific.
 254  *   - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
 255  *     Input latch register             0x40 + 2 * bank_size    RW
 256  *     Pull-up/pull-down enable reg     0x40 + 3 * bank_size    RW
 257  *     Pull-up/pull-down select reg     0x40 + 4 * bank_size    RW
 258  *     Interrupt mask register          0x40 + 5 * bank_size    RW
 259  *     Interrupt status register        0x40 + 6 * bank_size    R
 260  *
 261  * - Registers with bit 0x80 set, the AI bit
 262  *   The bit is cleared and the registers fall into one of the
 263  *   categories above.
 264  */
 265
 266 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
 267                                    u32 checkbank)
 268 {
 269         int bank_shift = pca953x_bank_shift(chip);
 270         int bank = (reg & REG_ADDR_MASK) >> bank_shift;
 271         int offset = reg & (BIT(bank_shift) - 1);
 272
 273         /* Special PCAL extended register check. */
 274         if (reg & REG_ADDR_EXT) {
 275                 if (!(chip->driver_data & PCA_PCAL))
 276                         return false;
 277                 bank += 8;
 278         }
 279
 280         /* Register is not in the matching bank. */
 281         if (!(BIT(bank) & checkbank))
 282                 return false;
 283
 284         /* Register is not within allowed range of bank. */
 285         if (offset >= NBANK(chip))
 286                 return false;
 287
 288         return true;
 289 }
 290
 291 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
 292 {
 293         struct pca953x_chip *chip = dev_get_drvdata(dev);
 294         u32 bank;
 295
 296         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 297                 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
 298                        PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
 299         } else {
 300                 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
 301                        PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
 302                        PCA957x_BANK_BUSHOLD;
 303         }
 304
 305         if (chip->driver_data & PCA_PCAL) {
 306                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 307                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
 308                         PCAL9xxx_BANK_IRQ_STAT;
 309         }
 310
 311         return pca953x_check_register(chip, reg, bank);
 312 }
 313
 314 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
 315 {
 316         struct pca953x_chip *chip = dev_get_drvdata(dev);
 317         u32 bank;
 318
 319         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
 320                 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
 321                         PCA953x_BANK_CONFIG;
 322         } else {
 323                 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
 324                         PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
 325         }
 326
 327         if (chip->driver_data & PCA_PCAL)
 328                 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
 329                         PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
 330
 331         return pca953x_check_register(chip, reg, bank);
 332 }
 333
 334 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
 335 {
 336         struct pca953x_chip *chip = dev_get_drvdata(dev);
 337         u32 bank;
 338
 339         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
 340                 bank = PCA953x_BANK_INPUT;
 341         else
 342                 bank = PCA957x_BANK_INPUT;
 343
 344         if (chip->driver_data & PCA_PCAL)
 345                 bank |= PCAL9xxx_BANK_IRQ_STAT;
 346
 347         return pca953x_check_register(chip, reg, bank);
 348 }
 349
 350 static const struct regmap_config pca953x_i2c_regmap = {
 351         .reg_bits = 8,
 352         .val_bits = 8,
 353
 354         .readable_reg = pca953x_readable_register,
 355         .writeable_reg = pca953x_writeable_register,
 356         .volatile_reg = pca953x_volatile_register,
 357
 358         .disable_locking = true,
 359         .cache_type = REGCACHE_RBTREE,
 360         .max_register = 0x7f,
 361 };
 362
 363 static const struct regmap_config pca953x_ai_i2c_regmap = {
 364         .reg_bits = 8,
 365         .val_bits = 8,
 366
 367         .read_flag_mask = REG_ADDR_AI,
 368         .write_flag_mask = REG_ADDR_AI,
 369
 370         .readable_reg = pca953x_readable_register,
 371         .writeable_reg = pca953x_writeable_register,
 372         .volatile_reg = pca953x_volatile_register,
 373
 374         .disable_locking = true,
 375         .cache_type = REGCACHE_RBTREE,
 376         .max_register = 0x7f,
 377 };
 378
 379 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off)
 380 {
 381         int bank_shift = pca953x_bank_shift(chip);
 382         int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
 383         int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
 384         u8 regaddr = pinctrl | addr | (off / BANK_SZ);
 385
 386         return regaddr;
 387 }
 388
 389 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 390 {
 391         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 392         u8 value[MAX_BANK];
 393         int i, ret;
 394
 395         for (i = 0; i < NBANK(chip); i++)
 396                 value[i] = bitmap_get_value8(val, i * BANK_SZ);
 397
 398         ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
 399         if (ret < 0) {
 400                 dev_err(&chip->client->dev, "failed writing register\n");
 401                 return ret;
 402         }
 403
 404         return 0;
 405 }
 406
 407 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
 408 {
 409         u8 regaddr = pca953x_recalc_addr(chip, reg, 0);
 410         u8 value[MAX_BANK];
 411         int i, ret;
 412
 413         ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
 414         if (ret < 0) {
 415                 dev_err(&chip->client->dev, "failed reading register\n");
 416                 return ret;
 417         }
 418
 419         for (i = 0; i < NBANK(chip); i++)
 420                 bitmap_set_value8(val, value[i], i * BANK_SZ);
 421
 422         return 0;
 423 }
 424
 425 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
 426 {
 427         struct pca953x_chip *chip = gpiochip_get_data(gc);
 428         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 429         u8 bit = BIT(off % BANK_SZ);
 430         int ret;
 431
 432         mutex_lock(&chip->i2c_lock);
 433         ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
 434         mutex_unlock(&chip->i2c_lock);
 435         return ret;
 436 }
 437
 438 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
 439                 unsigned off, int val)
 440 {
 441         struct pca953x_chip *chip = gpiochip_get_data(gc);
 442         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 443         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 444         u8 bit = BIT(off % BANK_SZ);
 445         int ret;
 446
 447         mutex_lock(&chip->i2c_lock);
 448         /* set output level */
 449         ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 450         if (ret)
 451                 goto exit;
 452
 453         /* then direction */
 454         ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
 455 exit:
 456         mutex_unlock(&chip->i2c_lock);
 457         return ret;
 458 }
 459
 460 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
 461 {
 462         struct pca953x_chip *chip = gpiochip_get_data(gc);
 463         u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off);
 464         u8 bit = BIT(off % BANK_SZ);
 465         u32 reg_val;
 466         int ret;
 467
 468         mutex_lock(&chip->i2c_lock);
 469         ret = regmap_read(chip->regmap, inreg, &reg_val);
 470         mutex_unlock(&chip->i2c_lock);
 471         if (ret < 0)
 472                 return ret;
 473
 474         return !!(reg_val & bit);
 475 }
 476
 477 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
 478 {
 479         struct pca953x_chip *chip = gpiochip_get_data(gc);
 480         u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off);
 481         u8 bit = BIT(off % BANK_SZ);
 482
 483         mutex_lock(&chip->i2c_lock);
 484         regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
 485         mutex_unlock(&chip->i2c_lock);
 486 }
 487
 488 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
 489 {
 490         struct pca953x_chip *chip = gpiochip_get_data(gc);
 491         u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off);
 492         u8 bit = BIT(off % BANK_SZ);
 493         u32 reg_val;
 494         int ret;
 495
 496         mutex_lock(&chip->i2c_lock);
 497         ret = regmap_read(chip->regmap, dirreg, &reg_val);
 498         mutex_unlock(&chip->i2c_lock);
 499         if (ret < 0)
 500                 return ret;
 501
 502         if (reg_val & bit)
 503                 return GPIO_LINE_DIRECTION_IN;
 504
 505         return GPIO_LINE_DIRECTION_OUT;
 506 }
 507
 508 static int pca953x_gpio_get_multiple(struct gpio_chip *gc,
 509                                      unsigned long *mask, unsigned long *bits)
 510 {
 511         struct pca953x_chip *chip = gpiochip_get_data(gc);
 512         DECLARE_BITMAP(reg_val, MAX_LINE);
 513         int ret;
 514
 515         mutex_lock(&chip->i2c_lock);
 516         ret = pca953x_read_regs(chip, chip->regs->input, reg_val);
 517         mutex_unlock(&chip->i2c_lock);
 518         if (ret)
 519                 return ret;
 520
 521         bitmap_replace(bits, bits, reg_val, mask, gc->ngpio);
 522         return 0;
 523 }
 524
 525 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
 526                                       unsigned long *mask, unsigned long *bits)
 527 {
 528         struct pca953x_chip *chip = gpiochip_get_data(gc);
 529         DECLARE_BITMAP(reg_val, MAX_LINE);
 530         int ret;
 531
 532         mutex_lock(&chip->i2c_lock);
 533         ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
 534         if (ret)
 535                 goto exit;
 536
 537         bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
 538
 539         pca953x_write_regs(chip, chip->regs->output, reg_val);
 540 exit:
 541         mutex_unlock(&chip->i2c_lock);
 542 }
 543
 544 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
 545                                          unsigned int offset,
 546                                          unsigned long config)
 547 {
 548         u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset);
 549         u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset);
 550         u8 bit = BIT(offset % BANK_SZ);
 551         int ret;
 552
 553         /*
 554          * pull-up/pull-down configuration requires PCAL extended
 555          * registers
 556          */
 557         if (!(chip->driver_data & PCA_PCAL))
 558                 return -ENOTSUPP;
 559
 560         mutex_lock(&chip->i2c_lock);
 561
 562         /* Configure pull-up/pull-down */
 563         if (config == PIN_CONFIG_BIAS_PULL_UP)
 564                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
 565         else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
 566                 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
 567         else
 568                 ret = 0;
 569         if (ret)
 570                 goto exit;
 571
 572         /* Disable/Enable pull-up/pull-down */
 573         if (config == PIN_CONFIG_BIAS_DISABLE)
 574                 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
 575         else
 576                 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
 577
 578 exit:
 579         mutex_unlock(&chip->i2c_lock);
 580         return ret;
 581 }
 582
 583 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
 584                                    unsigned long config)
 585 {
 586         struct pca953x_chip *chip = gpiochip_get_data(gc);
 587
 588         switch (pinconf_to_config_param(config)) {
 589         case PIN_CONFIG_BIAS_PULL_UP:
 590         case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
 591         case PIN_CONFIG_BIAS_PULL_DOWN:
 592         case PIN_CONFIG_BIAS_DISABLE:
 593                 return pca953x_gpio_set_pull_up_down(chip, offset, config);
 594         default:
 595                 return -ENOTSUPP;
 596         }
 597 }
 598
 599 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
 600 {
 601         struct gpio_chip *gc;
 602
 603         gc = &chip->gpio_chip;
 604
 605         gc->direction_input  = pca953x_gpio_direction_input;
 606         gc->direction_output = pca953x_gpio_direction_output;
 607         gc->get = pca953x_gpio_get_value;
 608         gc->set = pca953x_gpio_set_value;
 609         gc->get_direction = pca953x_gpio_get_direction;
 610         gc->get_multiple = pca953x_gpio_get_multiple;
 611         gc->set_multiple = pca953x_gpio_set_multiple;
 612         gc->set_config = pca953x_gpio_set_config;
 613         gc->can_sleep = true;
 614
 615         gc->base = chip->gpio_start;
 616         gc->ngpio = gpios;
 617         gc->label = dev_name(&chip->client->dev);
 618         gc->parent = &chip->client->dev;
 619         gc->owner = THIS_MODULE;
 620         gc->names = chip->names;
 621 }
 622
 623 #ifdef CONFIG_GPIO_PCA953X_IRQ
 624 static void pca953x_irq_mask(struct irq_data *d)
 625 {
 626         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 627         struct pca953x_chip *chip = gpiochip_get_data(gc);
 628         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 629
 630         clear_bit(hwirq, chip->irq_mask);
 631         gpiochip_disable_irq(gc, hwirq);
 632 }
 633
 634 static void pca953x_irq_unmask(struct irq_data *d)
 635 {
 636         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 637         struct pca953x_chip *chip = gpiochip_get_data(gc);
 638         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 639
 640         gpiochip_enable_irq(gc, hwirq);
 641         set_bit(hwirq, chip->irq_mask);
 642 }
 643
 644 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
 645 {
 646         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 647         struct pca953x_chip *chip = gpiochip_get_data(gc);
 648
 649         if (on)
 650                 atomic_inc(&chip->wakeup_path);
 651         else
 652                 atomic_dec(&chip->wakeup_path);
 653
 654         return irq_set_irq_wake(chip->client->irq, on);
 655 }
 656
 657 static void pca953x_irq_bus_lock(struct irq_data *d)
 658 {
 659         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 660         struct pca953x_chip *chip = gpiochip_get_data(gc);
 661
 662         mutex_lock(&chip->irq_lock);
 663 }
 664
 665 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
 666 {
 667         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 668         struct pca953x_chip *chip = gpiochip_get_data(gc);
 669         DECLARE_BITMAP(irq_mask, MAX_LINE);
 670         DECLARE_BITMAP(reg_direction, MAX_LINE);
 671         int level;
 672
 673         if (chip->driver_data & PCA_PCAL) {
 674                 /* Enable latch on interrupt-enabled inputs */
 675                 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
 676
 677                 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
 678
 679                 /* Unmask enabled interrupts */
 680                 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
 681         }
 682
 683         /* Switch direction to input if needed */
 684         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 685
 686         bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
 687         bitmap_complement(reg_direction, reg_direction, gc->ngpio);
 688         bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
 689
 690         /* Look for any newly setup interrupt */
 691         for_each_set_bit(level, irq_mask, gc->ngpio)
 692                 pca953x_gpio_direction_input(&chip->gpio_chip, level);
 693
 694         mutex_unlock(&chip->irq_lock);
 695 }
 696
 697 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
 698 {
 699         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 700         struct pca953x_chip *chip = gpiochip_get_data(gc);
 701         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 702
 703         if (!(type & IRQ_TYPE_EDGE_BOTH)) {
 704                 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
 705                         d->irq, type);
 706                 return -EINVAL;
 707         }
 708
 709         assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
 710         assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
 711
 712         return 0;
 713 }
 714
 715 static void pca953x_irq_shutdown(struct irq_data *d)
 716 {
 717         struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
 718         struct pca953x_chip *chip = gpiochip_get_data(gc);
 719         irq_hw_number_t hwirq = irqd_to_hwirq(d);
 720
 721         clear_bit(hwirq, chip->irq_trig_raise);
 722         clear_bit(hwirq, chip->irq_trig_fall);
 723 }
 724
 725 static void pca953x_irq_print_chip(struct irq_data *data, struct seq_file *p)
 726 {
 727         struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
 728
 729         seq_printf(p, dev_name(gc->parent));
 730 }
 731
 732 static const struct irq_chip pca953x_irq_chip = {
 733         .irq_mask               = pca953x_irq_mask,
 734         .irq_unmask             = pca953x_irq_unmask,
 735         .irq_set_wake           = pca953x_irq_set_wake,
 736         .irq_bus_lock           = pca953x_irq_bus_lock,
 737         .irq_bus_sync_unlock    = pca953x_irq_bus_sync_unlock,
 738         .irq_set_type           = pca953x_irq_set_type,
 739         .irq_shutdown           = pca953x_irq_shutdown,
 740         .irq_print_chip         = pca953x_irq_print_chip,
 741         .flags                  = IRQCHIP_IMMUTABLE,
 742         GPIOCHIP_IRQ_RESOURCE_HELPERS,
 743 };
 744
 745 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
 746 {
 747         struct gpio_chip *gc = &chip->gpio_chip;
 748         DECLARE_BITMAP(reg_direction, MAX_LINE);
 749         DECLARE_BITMAP(old_stat, MAX_LINE);
 750         DECLARE_BITMAP(cur_stat, MAX_LINE);
 751         DECLARE_BITMAP(new_stat, MAX_LINE);
 752         DECLARE_BITMAP(trigger, MAX_LINE);
 753         int ret;
 754
 755         if (chip->driver_data & PCA_PCAL) {
 756                 /* Read the current interrupt status from the device */
 757                 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
 758                 if (ret)
 759                         return false;
 760
 761                 /* Check latched inputs and clear interrupt status */
 762                 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 763                 if (ret)
 764                         return false;
 765
 766                 /* Apply filter for rising/falling edge selection */
 767                 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
 768
 769                 bitmap_and(pending, new_stat, trigger, gc->ngpio);
 770
 771                 return !bitmap_empty(pending, gc->ngpio);
 772         }
 773
 774         ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
 775         if (ret)
 776                 return false;
 777
 778         /* Remove output pins from the equation */
 779         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 780
 781         bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
 782
 783         bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
 784         bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
 785         bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
 786
 787         bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
 788
 789         if (bitmap_empty(trigger, gc->ngpio))
 790                 return false;
 791
 792         bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
 793         bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
 794         bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
 795         bitmap_and(pending, new_stat, trigger, gc->ngpio);
 796
 797         return !bitmap_empty(pending, gc->ngpio);
 798 }
 799
 800 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
 801 {
 802         struct pca953x_chip *chip = devid;
 803         struct gpio_chip *gc = &chip->gpio_chip;
 804         DECLARE_BITMAP(pending, MAX_LINE);
 805         int level;
 806         bool ret;
 807
 808         bitmap_zero(pending, MAX_LINE);
 809
 810         mutex_lock(&chip->i2c_lock);
 811         ret = pca953x_irq_pending(chip, pending);
 812         mutex_unlock(&chip->i2c_lock);
 813
 814         if (ret) {
 815                 ret = 0;
 816
 817                 for_each_set_bit(level, pending, gc->ngpio) {
 818                         int nested_irq = irq_find_mapping(gc->irq.domain, level);
 819
 820                         if (unlikely(nested_irq <= 0)) {
 821                                 dev_warn_ratelimited(gc->parent, "unmapped interrupt %d\n", level);
 822                                 continue;
 823                         }
 824
 825                         handle_nested_irq(nested_irq);
 826                         ret = 1;
 827                 }
 828         }
 829
 830         return IRQ_RETVAL(ret);
 831 }
 832
 833 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
 834 {
 835         struct i2c_client *client = chip->client;
 836         DECLARE_BITMAP(reg_direction, MAX_LINE);
 837         DECLARE_BITMAP(irq_stat, MAX_LINE);
 838         struct gpio_irq_chip *girq;
 839         int ret;
 840
 841         if (dmi_first_match(pca953x_dmi_acpi_irq_info)) {
 842                 ret = pca953x_acpi_get_irq(&client->dev);
 843                 if (ret > 0)
 844                         client->irq = ret;
 845         }
 846
 847         if (!client->irq)
 848                 return 0;
 849
 850         if (irq_base == -1)
 851                 return 0;
 852
 853         if (!(chip->driver_data & PCA_INT))
 854                 return 0;
 855
 856         ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
 857         if (ret)
 858                 return ret;
 859
 860         /*
 861          * There is no way to know which GPIO line generated the
 862          * interrupt.  We have to rely on the previous read for
 863          * this purpose.
 864          */
 865         pca953x_read_regs(chip, chip->regs->direction, reg_direction);
 866         bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
 867         mutex_init(&chip->irq_lock);
 868
 869         girq = &chip->gpio_chip.irq;
 870         gpio_irq_chip_set_chip(girq, &pca953x_irq_chip);
 871         /* This will let us handle the parent IRQ in the driver */
 872         girq->parent_handler = NULL;
 873         girq->num_parents = 0;
 874         girq->parents = NULL;
 875         girq->default_type = IRQ_TYPE_NONE;
 876         girq->handler = handle_simple_irq;
 877         girq->threaded = true;
 878         girq->first = irq_base; /* FIXME: get rid of this */
 879
 880         ret = devm_request_threaded_irq(&client->dev, client->irq,
 881                                         NULL, pca953x_irq_handler,
 882                                         IRQF_ONESHOT | IRQF_SHARED,
 883                                         dev_name(&client->dev), chip);
 884         if (ret) {
 885                 dev_err(&client->dev, "failed to request irq %d\n",
 886                         client->irq);
 887                 return ret;
 888         }
 889
 890         return 0;
 891 }
 892
 893 #else /* CONFIG_GPIO_PCA953X_IRQ */
 894 static int pca953x_irq_setup(struct pca953x_chip *chip,
 895                              int irq_base)
 896 {
 897         struct i2c_client *client = chip->client;
 898
 899         if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
 900                 dev_warn(&client->dev, "interrupt support not compiled in\n");
 901
 902         return 0;
 903 }
 904 #endif
 905
 906 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
 907 {
 908         DECLARE_BITMAP(val, MAX_LINE);
 909         int ret;
 910
 911         ret = regcache_sync_region(chip->regmap, chip->regs->output,
 912                                    chip->regs->output + NBANK(chip));
 913         if (ret)
 914                 goto out;
 915
 916         ret = regcache_sync_region(chip->regmap, chip->regs->direction,
 917                                    chip->regs->direction + NBANK(chip));
 918         if (ret)
 919                 goto out;
 920
 921         /* set platform specific polarity inversion */
 922         if (invert)
 923                 bitmap_fill(val, MAX_LINE);
 924         else
 925                 bitmap_zero(val, MAX_LINE);
 926
 927         ret = pca953x_write_regs(chip, chip->regs->invert, val);
 928 out:
 929         return ret;
 930 }
 931
 932 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
 933 {
 934         DECLARE_BITMAP(val, MAX_LINE);
 935         unsigned int i;
 936         int ret;
 937
 938         ret = device_pca95xx_init(chip, invert);
 939         if (ret)
 940                 goto out;
 941
 942         /* To enable register 6, 7 to control pull up and pull down */
 943         for (i = 0; i < NBANK(chip); i++)
 944                 bitmap_set_value8(val, 0x02, i * BANK_SZ);
 945
 946         ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
 947         if (ret)
 948                 goto out;
 949
 950         return 0;
 951 out:
 952         return ret;
 953 }
 954
 955 static int pca953x_probe(struct i2c_client *client,
 956                          const struct i2c_device_id *i2c_id)
 957 {
 958         struct pca953x_platform_data *pdata;
 959         struct pca953x_chip *chip;
 960         int irq_base = 0;
 961         int ret;
 962         u32 invert = 0;
 963         struct regulator *reg;
 964         const struct regmap_config *regmap_config;
 965
 966         chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
 967         if (chip == NULL)
 968                 return -ENOMEM;
 969
 970         pdata = dev_get_platdata(&client->dev);
 971         if (pdata) {
 972                 irq_base = pdata->irq_base;
 973                 chip->gpio_start = pdata->gpio_base;
 974                 invert = pdata->invert;
 975                 chip->names = pdata->names;
 976         } else {
 977                 struct gpio_desc *reset_gpio;
 978
 979                 chip->gpio_start = -1;
 980                 irq_base = 0;
 981
 982                 /*
 983                  * See if we need to de-assert a reset pin.
 984                  *
 985                  * There is no known ACPI-enabled platforms that are
 986                  * using "reset" GPIO. Otherwise any of those platform
 987                  * must use _DSD method with corresponding property.
 988                  */
 989                 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
 990                                                      GPIOD_OUT_LOW);
 991                 if (IS_ERR(reset_gpio))
 992                         return PTR_ERR(reset_gpio);
 993         }
 994
 995         chip->client = client;
 996
 997         reg = devm_regulator_get(&client->dev, "vcc");
 998         if (IS_ERR(reg))
 999                 return dev_err_probe(&client->dev, PTR_ERR(reg), "reg get err\n");
1000
1001         ret = regulator_enable(reg);
1002         if (ret) {
1003                 dev_err(&client->dev, "reg en err: %d\n", ret);
1004                 return ret;
1005         }
1006         chip->regulator = reg;
1007
1008         if (i2c_id) {
1009                 chip->driver_data = i2c_id->driver_data;
1010         } else {
1011                 const void *match;
1012
1013                 match = device_get_match_data(&client->dev);
1014                 if (!match) {
1015                         ret = -ENODEV;
1016                         goto err_exit;
1017                 }
1018
1019                 chip->driver_data = (uintptr_t)match;
1020         }
1021
1022         i2c_set_clientdata(client, chip);
1023
1024         pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
1025
1026         if (NBANK(chip) > 2 || PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE) {
1027                 dev_info(&client->dev, "using AI\n");
1028                 regmap_config = &pca953x_ai_i2c_regmap;
1029         } else {
1030                 dev_info(&client->dev, "using no AI\n");
1031                 regmap_config = &pca953x_i2c_regmap;
1032         }
1033
1034         chip->regmap = devm_regmap_init_i2c(client, regmap_config);
1035         if (IS_ERR(chip->regmap)) {
1036                 ret = PTR_ERR(chip->regmap);
1037                 goto err_exit;
1038         }
1039
1040         regcache_mark_dirty(chip->regmap);
1041
1042         mutex_init(&chip->i2c_lock);
1043         /*
1044          * In case we have an i2c-mux controlled by a GPIO provided by an
1045          * expander using the same driver higher on the device tree, read the
1046          * i2c adapter nesting depth and use the retrieved value as lockdep
1047          * subclass for chip->i2c_lock.
1048          *
1049          * REVISIT: This solution is not complete. It protects us from lockdep
1050          * false positives when the expander controlling the i2c-mux is on
1051          * a different level on the device tree, but not when it's on the same
1052          * level on a different branch (in which case the subclass number
1053          * would be the same).
1054          *
1055          * TODO: Once a correct solution is developed, a similar fix should be
1056          * applied to all other i2c-controlled GPIO expanders (and potentially
1057          * regmap-i2c).
1058          */
1059         lockdep_set_subclass(&chip->i2c_lock,
1060                              i2c_adapter_depth(client->adapter));
1061
1062         /* initialize cached registers from their original values.
1063          * we can't share this chip with another i2c master.
1064          */
1065
1066         if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
1067                 chip->regs = &pca953x_regs;
1068                 ret = device_pca95xx_init(chip, invert);
1069         } else {
1070                 chip->regs = &pca957x_regs;
1071                 ret = device_pca957x_init(chip, invert);
1072         }
1073         if (ret)
1074                 goto err_exit;
1075
1076         ret = pca953x_irq_setup(chip, irq_base);
1077         if (ret)
1078                 goto err_exit;
1079
1080         ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
1081         if (ret)
1082                 goto err_exit;
1083
1084         if (pdata && pdata->setup) {
1085                 ret = pdata->setup(client, chip->gpio_chip.base,
1086                                    chip->gpio_chip.ngpio, pdata->context);
1087                 if (ret < 0)
1088                         dev_warn(&client->dev, "setup failed, %d\n", ret);
1089         }
1090
1091         return 0;
1092
1093 err_exit:
1094         regulator_disable(chip->regulator);
1095         return ret;
1096 }
1097
1098 static int pca953x_remove(struct i2c_client *client)
1099 {
1100         struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
1101         struct pca953x_chip *chip = i2c_get_clientdata(client);
1102         int ret;
1103
1104         if (pdata && pdata->teardown) {
1105                 ret = pdata->teardown(client, chip->gpio_chip.base,
1106                                       chip->gpio_chip.ngpio, pdata->context);
1107                 if (ret < 0)
1108                         dev_err(&client->dev, "teardown failed, %d\n", ret);
1109         } else {
1110                 ret = 0;
1111         }
1112
1113         regulator_disable(chip->regulator);
1114
1115         return ret;
1116 }
1117
1118 #ifdef CONFIG_PM_SLEEP
1119 static int pca953x_regcache_sync(struct device *dev)
1120 {
1121         struct pca953x_chip *chip = dev_get_drvdata(dev);
1122         int ret;
1123         u8 regaddr;
1124
1125         /*
1126          * The ordering between direction and output is important,
1127          * sync these registers first and only then sync the rest.
1128          */
1129         regaddr = pca953x_recalc_addr(chip, chip->regs->direction, 0);
1130         ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip));
1131         if (ret) {
1132                 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1133                 return ret;
1134         }
1135
1136         regaddr = pca953x_recalc_addr(chip, chip->regs->output, 0);
1137         ret = regcache_sync_region(chip->regmap, regaddr, regaddr + NBANK(chip));
1138         if (ret) {
1139                 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1140                 return ret;
1141         }
1142
1143 #ifdef CONFIG_GPIO_PCA953X_IRQ
1144         if (chip->driver_data & PCA_PCAL) {
1145                 regaddr = pca953x_recalc_addr(chip, PCAL953X_IN_LATCH, 0);
1146                 ret = regcache_sync_region(chip->regmap, regaddr,
1147                                            regaddr + NBANK(chip));
1148                 if (ret) {
1149                         dev_err(dev, "Failed to sync INT latch registers: %d\n",
1150                                 ret);
1151                         return ret;
1152                 }
1153
1154                 regaddr = pca953x_recalc_addr(chip, PCAL953X_INT_MASK, 0);
1155                 ret = regcache_sync_region(chip->regmap, regaddr,
1156                                            regaddr + NBANK(chip));
1157                 if (ret) {
1158                         dev_err(dev, "Failed to sync INT mask registers: %d\n",
1159                                 ret);
1160                         return ret;
1161                 }
1162         }
1163 #endif
1164
1165         return 0;
1166 }
1167
1168 static int pca953x_suspend(struct device *dev)
1169 {
1170         struct pca953x_chip *chip = dev_get_drvdata(dev);
1171
1172         regcache_cache_only(chip->regmap, true);
1173
1174         if (atomic_read(&chip->wakeup_path))
1175                 device_set_wakeup_path(dev);
1176         else
1177                 regulator_disable(chip->regulator);
1178
1179         return 0;
1180 }
1181
1182 static int pca953x_resume(struct device *dev)
1183 {
1184         struct pca953x_chip *chip = dev_get_drvdata(dev);
1185         int ret;
1186
1187         if (!atomic_read(&chip->wakeup_path)) {
1188                 ret = regulator_enable(chip->regulator);
1189                 if (ret) {
1190                         dev_err(dev, "Failed to enable regulator: %d\n", ret);
1191                         return 0;
1192                 }
1193         }
1194
1195         regcache_cache_only(chip->regmap, false);
1196         regcache_mark_dirty(chip->regmap);
1197         ret = pca953x_regcache_sync(dev);
1198         if (ret)
1199                 return ret;
1200
1201         ret = regcache_sync(chip->regmap);
1202         if (ret) {
1203                 dev_err(dev, "Failed to restore register map: %d\n", ret);
1204                 return ret;
1205         }
1206
1207         return 0;
1208 }
1209 #endif
1210
1211 /* convenience to stop overlong match-table lines */
1212 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1213 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1214
1215 static const struct of_device_id pca953x_dt_ids[] = {
1216         { .compatible = "nxp,pca6408", .data = OF_953X(8, PCA_INT), },
1217         { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1218         { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1219         { .compatible = "nxp,pca9506", .data = OF_953X(40, PCA_INT), },
1220         { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1221         { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1222         { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1223         { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1224         { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1225         { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1226         { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1227         { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1228         { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1229         { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1230         { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1231         { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1232         { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1233
1234         { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1235         { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1236         { .compatible = "nxp,pcal9535", .data = OF_953X(16, PCA_LATCH_INT), },
1237         { .compatible = "nxp,pcal9554b", .data = OF_953X( 8, PCA_LATCH_INT), },
1238         { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1239
1240         { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1241         { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1242         { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1243         { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1244         { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1245
1246         { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1247         { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1248         { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1249         { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1250         { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1251         { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1252
1253         { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1254         { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1255         { .compatible = "onnn,pca9655", .data = OF_953X(16, PCA_INT), },
1256
1257         { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1258         { }
1259 };
1260
1261 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1262
1263 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1264
1265 static struct i2c_driver pca953x_driver = {
1266         .driver = {
1267                 .name   = "pca953x",
1268                 .pm     = &pca953x_pm_ops,
1269                 .of_match_table = pca953x_dt_ids,
1270                 .acpi_match_table = pca953x_acpi_ids,
1271         },
1272         .probe          = pca953x_probe,
1273         .remove         = pca953x_remove,
1274         .id_table       = pca953x_id,
1275 };
1276
1277 static int __init pca953x_init(void)
1278 {
1279         return i2c_add_driver(&pca953x_driver);
1280 }
1281 /* register after i2c postcore initcall and before
1282  * subsys initcalls that may rely on these GPIOs
1283  */
1284 subsys_initcall(pca953x_init);
1285
1286 static void __exit pca953x_exit(void)
1287 {
1288         i2c_del_driver(&pca953x_driver);
1289 }
1290 module_exit(pca953x_exit);
1291
1292 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1293 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1294 MODULE_LICENSE("GPL");