2 * A FSI master controller, using a simple GPIO bit-banging interface
5 #include <linux/crc4.h>
6 #include <linux/delay.h>
7 #include <linux/device.h>
9 #include <linux/gpio/consumer.h>
11 #include <linux/module.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spinlock.h>
16 #include "fsi-master.h"
18 #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */
19 #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */
20 #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */
21 #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */
22 #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */
23 #define FSI_INIT_CLOCKS 5000 /* Clock out any old data */
24 #define FSI_GPIO_STD_DELAY 10 /* Standard GPIO delay in nS */
25 /* todo: adjust down as low as */
26 /* possible or eliminate */
27 #define FSI_GPIO_CMD_DPOLL 0x2
28 #define FSI_GPIO_CMD_TERM 0x3f
29 #define FSI_GPIO_CMD_ABS_AR 0x4
31 #define FSI_GPIO_DPOLL_CLOCKS 100 /* < 21 will cause slave to hang */
34 #define FSI_GPIO_ERR_BUSY 1 /* Slave stuck in busy state */
35 #define FSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */
36 #define FSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC error */
37 #define FSI_GPIO_MTOE 4 /* Master time out error */
38 #define FSI_GPIO_CRC_INVAL 5 /* Master reports slave CRC error */
40 /* Normal slave responses */
41 #define FSI_GPIO_RESP_BUSY 1
42 #define FSI_GPIO_RESP_ACK 0
43 #define FSI_GPIO_RESP_ACKD 4
45 #define FSI_GPIO_MAX_BUSY 100
46 #define FSI_GPIO_MTOE_COUNT 1000
47 #define FSI_GPIO_DRAIN_BITS 20
48 #define FSI_GPIO_CRC_SIZE 4
49 #define FSI_GPIO_MSG_ID_SIZE 2
50 #define FSI_GPIO_MSG_RESPID_SIZE 2
51 #define FSI_GPIO_PRIME_SLAVE_CLOCKS 100
53 struct fsi_master_gpio {
54 struct fsi_master master;
56 spinlock_t cmd_lock; /* Lock for commands */
57 struct gpio_desc *gpio_clk;
58 struct gpio_desc *gpio_data;
59 struct gpio_desc *gpio_trans; /* Voltage translator */
60 struct gpio_desc *gpio_enable; /* FSI enable */
61 struct gpio_desc *gpio_mux; /* Mux control */
64 #define CREATE_TRACE_POINTS
65 #include <trace/events/fsi_master_gpio.h>
67 #define to_fsi_master_gpio(m) container_of(m, struct fsi_master_gpio, master)
74 static void clock_toggle(struct fsi_master_gpio *master, int count)
78 for (i = 0; i < count; i++) {
79 ndelay(FSI_GPIO_STD_DLY);
80 gpiod_set_value(master->gpio_clk, 0);
81 ndelay(FSI_GPIO_STD_DLY);
82 gpiod_set_value(master->gpio_clk, 1);
86 static int sda_in(struct fsi_master_gpio *master)
90 ndelay(FSI_GPIO_STD_DLY);
91 in = gpiod_get_value(master->gpio_data);
95 static void sda_out(struct fsi_master_gpio *master, int value)
97 gpiod_set_value(master->gpio_data, value);
100 static void set_sda_input(struct fsi_master_gpio *master)
102 gpiod_direction_input(master->gpio_data);
103 gpiod_set_value(master->gpio_trans, 0);
106 static void set_sda_output(struct fsi_master_gpio *master, int value)
108 gpiod_set_value(master->gpio_trans, 1);
109 gpiod_direction_output(master->gpio_data, value);
112 static void clock_zeros(struct fsi_master_gpio *master, int count)
114 set_sda_output(master, 1);
115 clock_toggle(master, count);
118 static void serial_in(struct fsi_master_gpio *master, struct fsi_gpio_msg *msg,
123 set_sda_input(master);
125 for (bit = 0; bit < num_bits; bit++) {
126 clock_toggle(master, 1);
127 in_bit = sda_in(master);
129 msg->msg |= ~in_bit & 0x1; /* Data is active low */
131 msg->bits += num_bits;
133 trace_fsi_master_gpio_in(master, num_bits, msg->msg);
136 static void serial_out(struct fsi_master_gpio *master,
137 const struct fsi_gpio_msg *cmd)
140 uint64_t msg = ~cmd->msg; /* Data is active low */
141 uint64_t sda_mask = 0x1ULL << (cmd->bits - 1);
142 uint64_t last_bit = ~0;
145 trace_fsi_master_gpio_out(master, cmd->bits, cmd->msg);
148 dev_warn(master->dev, "trying to output 0 bits\n");
151 set_sda_output(master, 0);
153 /* Send the start bit */
155 clock_toggle(master, 1);
157 /* Send the message */
158 for (bit = 0; bit < cmd->bits; bit++) {
159 next_bit = (msg & sda_mask) >> (cmd->bits - 1);
160 if (last_bit ^ next_bit) {
161 sda_out(master, next_bit);
164 clock_toggle(master, 1);
169 static void msg_push_bits(struct fsi_gpio_msg *msg, uint64_t data, int bits)
172 msg->msg |= data & ((1ull << bits) - 1);
176 static void msg_push_crc(struct fsi_gpio_msg *msg)
181 top = msg->bits & 0x3;
183 /* start bit, and any non-aligned top bits */
184 crc = crc4(0, 1 << top | msg->msg >> (msg->bits - top), top + 1);
187 crc = crc4(crc, msg->msg, msg->bits - top);
189 msg_push_bits(msg, crc, 4);
193 * Encode an Absolute Address command
195 static void build_abs_ar_command(struct fsi_gpio_msg *cmd,
196 uint8_t id, uint32_t addr, size_t size, const void *data)
205 msg_push_bits(cmd, id, 2);
206 msg_push_bits(cmd, FSI_GPIO_CMD_ABS_AR, 3);
207 msg_push_bits(cmd, write ? 0 : 1, 1);
210 * The read/write size is encoded in the lower bits of the address
211 * (as it must be naturally-aligned), and the following ds bit.
213 * size addr:1 addr:0 ds
219 ds = size > 1 ? 1 : 0;
224 msg_push_bits(cmd, addr & ((1 << 21) - 1), 21);
225 msg_push_bits(cmd, ds, 1);
226 for (i = 0; write && i < size; i++)
227 msg_push_bits(cmd, ((uint8_t *)data)[i], 8);
232 static void build_dpoll_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
237 msg_push_bits(cmd, slave_id, 2);
238 msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3);
242 static void echo_delay(struct fsi_master_gpio *master)
244 set_sda_output(master, 1);
245 clock_toggle(master, FSI_ECHO_DELAY_CLOCKS);
248 static void build_term_command(struct fsi_gpio_msg *cmd, uint8_t slave_id)
253 msg_push_bits(cmd, slave_id, 2);
254 msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6);
259 * Store information on master errors so handler can detect and clean
262 static void fsi_master_gpio_error(struct fsi_master_gpio *master, int error)
267 static int read_one_response(struct fsi_master_gpio *master,
268 uint8_t data_size, struct fsi_gpio_msg *msgp, uint8_t *tagp)
270 struct fsi_gpio_msg msg;
275 /* wait for the start bit */
276 for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) {
279 serial_in(master, &msg, 1);
283 if (i == FSI_GPIO_MTOE_COUNT) {
285 "Master time out waiting for response\n");
286 fsi_master_gpio_error(master, FSI_GPIO_MTOE);
293 /* Read slave ID & response tag */
294 serial_in(master, &msg, 4);
296 id = (msg.msg >> FSI_GPIO_MSG_RESPID_SIZE) & 0x3;
299 /* If we have an ACK and we're expecting data, clock the data in too */
300 if (tag == FSI_GPIO_RESP_ACK && data_size)
301 serial_in(master, &msg, data_size * 8);
304 serial_in(master, &msg, FSI_GPIO_CRC_SIZE);
306 /* we have a whole message now; check CRC */
308 crc = crc4(crc, msg.msg, msg.bits);
310 dev_dbg(master->dev, "ERR response CRC\n");
311 fsi_master_gpio_error(master, FSI_GPIO_CRC_INVAL);
323 static int issue_term(struct fsi_master_gpio *master, uint8_t slave)
325 struct fsi_gpio_msg cmd;
329 build_term_command(&cmd, slave);
330 serial_out(master, &cmd);
333 rc = read_one_response(master, 0, NULL, &tag);
336 "TERM failed; lost communication with slave\n");
338 } else if (tag != FSI_GPIO_RESP_ACK) {
339 dev_err(master->dev, "TERM failed; response %d\n", tag);
346 static int poll_for_response(struct fsi_master_gpio *master,
347 uint8_t slave, uint8_t size, void *data)
349 struct fsi_gpio_msg response, cmd;
350 int busy_count = 0, rc, i;
352 uint8_t *data_byte = data;
355 rc = read_one_response(master, size, &response, &tag);
360 case FSI_GPIO_RESP_ACK:
362 uint64_t val = response.msg;
363 /* clear crc & mask */
365 val &= (1ull << (size * 8)) - 1;
367 for (i = 0; i < size; i++) {
368 data_byte[size-i-1] = val;
373 case FSI_GPIO_RESP_BUSY:
375 * Its necessary to clock slave before issuing
376 * d-poll, not indicated in the hardware protocol
377 * spec. < 20 clocks causes slave to hang, 21 ok.
379 clock_zeros(master, FSI_GPIO_DPOLL_CLOCKS);
380 if (busy_count++ < FSI_GPIO_MAX_BUSY) {
381 build_dpoll_command(&cmd, slave);
382 serial_out(master, &cmd);
386 dev_warn(master->dev,
387 "ERR slave is stuck in busy state, issuing TERM\n");
388 issue_term(master, slave);
392 case FSI_GPIO_RESP_ERRA:
393 case FSI_GPIO_RESP_ERRC:
394 dev_dbg(master->dev, "ERR%c received: 0x%x\n",
395 tag == FSI_GPIO_RESP_ERRA ? 'A' : 'C',
397 fsi_master_gpio_error(master, response.msg);
402 /* Clock the slave enough to be ready for next operation */
403 clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS);
407 static int fsi_master_gpio_xfer(struct fsi_master_gpio *master, uint8_t slave,
408 struct fsi_gpio_msg *cmd, size_t resp_len, void *resp)
413 spin_lock_irqsave(&master->cmd_lock, flags);
414 serial_out(master, cmd);
416 rc = poll_for_response(master, slave, resp_len, resp);
417 spin_unlock_irqrestore(&master->cmd_lock, flags);
422 static int fsi_master_gpio_read(struct fsi_master *_master, int link,
423 uint8_t id, uint32_t addr, void *val, size_t size)
425 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
426 struct fsi_gpio_msg cmd;
431 build_abs_ar_command(&cmd, id, addr, size, NULL);
432 return fsi_master_gpio_xfer(master, id, &cmd, size, val);
435 static int fsi_master_gpio_write(struct fsi_master *_master, int link,
436 uint8_t id, uint32_t addr, const void *val, size_t size)
438 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
439 struct fsi_gpio_msg cmd;
444 build_abs_ar_command(&cmd, id, addr, size, val);
445 return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
448 static int fsi_master_gpio_term(struct fsi_master *_master,
449 int link, uint8_t id)
451 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
452 struct fsi_gpio_msg cmd;
457 build_term_command(&cmd, id);
458 return fsi_master_gpio_xfer(master, id, &cmd, 0, NULL);
461 static int fsi_master_gpio_break(struct fsi_master *_master, int link)
463 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
468 trace_fsi_master_gpio_break(master);
470 set_sda_output(master, 1);
472 clock_toggle(master, FSI_PRE_BREAK_CLOCKS);
474 clock_toggle(master, FSI_BREAK_CLOCKS);
477 clock_toggle(master, FSI_POST_BREAK_CLOCKS);
479 /* Wait for logic reset to take effect */
485 static void fsi_master_gpio_init(struct fsi_master_gpio *master)
487 gpiod_direction_output(master->gpio_mux, 1);
488 gpiod_direction_output(master->gpio_trans, 1);
489 gpiod_direction_output(master->gpio_enable, 1);
490 gpiod_direction_output(master->gpio_clk, 1);
491 gpiod_direction_output(master->gpio_data, 1);
493 /* todo: evaluate if clocks can be reduced */
494 clock_zeros(master, FSI_INIT_CLOCKS);
497 static int fsi_master_gpio_link_enable(struct fsi_master *_master, int link)
499 struct fsi_master_gpio *master = to_fsi_master_gpio(_master);
503 gpiod_set_value(master->gpio_enable, 1);
508 static int fsi_master_gpio_probe(struct platform_device *pdev)
510 struct fsi_master_gpio *master;
511 struct gpio_desc *gpio;
513 master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
517 master->dev = &pdev->dev;
518 master->master.dev.parent = master->dev;
520 gpio = devm_gpiod_get(&pdev->dev, "clock", 0);
522 dev_err(&pdev->dev, "failed to get clock gpio\n");
523 return PTR_ERR(gpio);
525 master->gpio_clk = gpio;
527 gpio = devm_gpiod_get(&pdev->dev, "data", 0);
529 dev_err(&pdev->dev, "failed to get data gpio\n");
530 return PTR_ERR(gpio);
532 master->gpio_data = gpio;
535 gpio = devm_gpiod_get_optional(&pdev->dev, "trans", 0);
537 dev_err(&pdev->dev, "failed to get trans gpio\n");
538 return PTR_ERR(gpio);
540 master->gpio_trans = gpio;
542 gpio = devm_gpiod_get_optional(&pdev->dev, "enable", 0);
544 dev_err(&pdev->dev, "failed to get enable gpio\n");
545 return PTR_ERR(gpio);
547 master->gpio_enable = gpio;
549 gpio = devm_gpiod_get_optional(&pdev->dev, "mux", 0);
551 dev_err(&pdev->dev, "failed to get mux gpio\n");
552 return PTR_ERR(gpio);
554 master->gpio_mux = gpio;
556 master->master.n_links = 1;
557 master->master.flags = FSI_MASTER_FLAG_SWCLOCK;
558 master->master.read = fsi_master_gpio_read;
559 master->master.write = fsi_master_gpio_write;
560 master->master.term = fsi_master_gpio_term;
561 master->master.send_break = fsi_master_gpio_break;
562 master->master.link_enable = fsi_master_gpio_link_enable;
563 platform_set_drvdata(pdev, master);
564 spin_lock_init(&master->cmd_lock);
566 fsi_master_gpio_init(master);
568 return fsi_master_register(&master->master);
572 static int fsi_master_gpio_remove(struct platform_device *pdev)
574 struct fsi_master_gpio *master = platform_get_drvdata(pdev);
576 devm_gpiod_put(&pdev->dev, master->gpio_clk);
577 devm_gpiod_put(&pdev->dev, master->gpio_data);
578 if (master->gpio_trans)
579 devm_gpiod_put(&pdev->dev, master->gpio_trans);
580 if (master->gpio_enable)
581 devm_gpiod_put(&pdev->dev, master->gpio_enable);
582 if (master->gpio_mux)
583 devm_gpiod_put(&pdev->dev, master->gpio_mux);
584 fsi_master_unregister(&master->master);
589 static const struct of_device_id fsi_master_gpio_match[] = {
590 { .compatible = "fsi-master-gpio" },
594 static struct platform_driver fsi_master_gpio_driver = {
596 .name = "fsi-master-gpio",
597 .of_match_table = fsi_master_gpio_match,
599 .probe = fsi_master_gpio_probe,
600 .remove = fsi_master_gpio_remove,
603 module_platform_driver(fsi_master_gpio_driver);
604 MODULE_LICENSE("GPL");