1 // SPDX-License-Identifier: GPL-2.0-only
3 * GHES/EDAC Linux driver
5 * Copyright (c) 2013 by Mauro Carvalho Chehab
7 * Red Hat Inc. https://www.redhat.com
10 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12 #include <acpi/ghes.h>
13 #include <linux/edac.h>
14 #include <linux/dmi.h>
15 #include "edac_module.h"
16 #include <ras/ras_event.h>
18 #define OTHER_DETAIL_LEN 400
21 struct mem_ctl_info *mci;
23 /* Buffers for the error handling routine */
24 char other_detail[OTHER_DETAIL_LEN];
28 static refcount_t ghes_refcount = REFCOUNT_INIT(0);
31 * Access to ghes_pvt must be protected by ghes_lock. The spinlock
32 * also provides the necessary (implicit) memory barrier for the SMP
33 * case to make the pointer visible on another CPU.
35 static struct ghes_pvt *ghes_pvt;
38 * This driver's representation of the system hardware, as collected
41 static struct ghes_hw_desc {
43 struct dimm_info *dimms;
46 /* GHES registration mutex */
47 static DEFINE_MUTEX(ghes_reg_mutex);
50 * Sync with other, potentially concurrent callers of
51 * ghes_edac_report_mem_error(). We don't know what the
52 * "inventive" firmware would do.
54 static DEFINE_SPINLOCK(ghes_lock);
56 /* "ghes_edac.force_load=1" skips the platform check */
57 static bool __read_mostly force_load;
58 module_param(force_load, bool, 0);
60 static bool system_scanned;
62 /* Memory Device - Type 17 of SMBIOS spec */
63 struct memdev_dmi_entry {
67 u16 phys_mem_array_handle;
68 u16 mem_err_info_handle;
85 u16 conf_mem_clk_speed;
86 } __attribute__((__packed__));
88 static struct dimm_info *find_dimm_by_handle(struct mem_ctl_info *mci, u16 handle)
90 struct dimm_info *dimm;
92 mci_for_each_dimm(mci, dimm) {
93 if (dimm->smbios_handle == handle)
100 static void dimm_setup_label(struct dimm_info *dimm, u16 handle)
102 const char *bank = NULL, *device = NULL;
104 dmi_memdev_name(handle, &bank, &device);
107 * Set to a NULL string when both bank and device are zero. In this case,
108 * the label assigned by default will be preserved.
110 snprintf(dimm->label, sizeof(dimm->label), "%s%s%s",
111 (bank && *bank) ? bank : "",
112 (bank && *bank && device && *device) ? " " : "",
113 (device && *device) ? device : "");
116 static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)
118 u16 rdr_mask = BIT(7) | BIT(13);
120 if (entry->size == 0xffff) {
121 pr_info("Can't get DIMM%i size\n", dimm->idx);
122 dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
123 } else if (entry->size == 0x7fff) {
124 dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
126 if (entry->size & BIT(15))
127 dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
129 dimm->nr_pages = MiB_TO_PAGES(entry->size);
132 switch (entry->memory_type) {
134 if (entry->type_detail & BIT(13))
135 dimm->mtype = MEM_RDDR;
137 dimm->mtype = MEM_DDR;
140 if (entry->type_detail & BIT(13))
141 dimm->mtype = MEM_RDDR2;
143 dimm->mtype = MEM_DDR2;
146 dimm->mtype = MEM_FB_DDR2;
149 if (entry->type_detail & BIT(12))
150 dimm->mtype = MEM_NVDIMM;
151 else if (entry->type_detail & BIT(13))
152 dimm->mtype = MEM_RDDR3;
154 dimm->mtype = MEM_DDR3;
157 if (entry->type_detail & BIT(12))
158 dimm->mtype = MEM_NVDIMM;
159 else if (entry->type_detail & BIT(13))
160 dimm->mtype = MEM_RDDR4;
162 dimm->mtype = MEM_DDR4;
165 if (entry->type_detail & BIT(6))
166 dimm->mtype = MEM_RMBS;
167 else if ((entry->type_detail & rdr_mask) == rdr_mask)
168 dimm->mtype = MEM_RDR;
169 else if (entry->type_detail & BIT(7))
170 dimm->mtype = MEM_SDR;
171 else if (entry->type_detail & BIT(9))
172 dimm->mtype = MEM_EDO;
174 dimm->mtype = MEM_UNKNOWN;
178 * Actually, we can only detect if the memory has bits for
181 if (entry->total_width == entry->data_width)
182 dimm->edac_mode = EDAC_NONE;
184 dimm->edac_mode = EDAC_SECDED;
186 dimm->dtype = DEV_UNKNOWN;
187 dimm->grain = 128; /* Likely, worse case */
189 dimm_setup_label(dimm, entry->handle);
191 if (dimm->nr_pages) {
192 edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
193 dimm->idx, edac_mem_types[dimm->mtype],
194 PAGES_TO_MiB(dimm->nr_pages),
195 (dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
196 edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
197 entry->memory_type, entry->type_detail,
198 entry->total_width, entry->data_width);
201 dimm->smbios_handle = entry->handle;
204 static void enumerate_dimms(const struct dmi_header *dh, void *arg)
206 struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
207 struct ghes_hw_desc *hw = (struct ghes_hw_desc *)arg;
210 if (dh->type != DMI_ENTRY_MEM_DEVICE)
213 /* Enlarge the array with additional 16 */
214 if (!hw->num_dimms || !(hw->num_dimms % 16)) {
215 struct dimm_info *new;
217 new = krealloc_array(hw->dimms, hw->num_dimms + 16,
218 sizeof(struct dimm_info), GFP_KERNEL);
227 d = &hw->dimms[hw->num_dimms];
228 d->idx = hw->num_dimms;
230 assign_dmi_dimm_info(d, entry);
235 static void ghes_scan_system(void)
240 dmi_walk(enumerate_dimms, &ghes_hw);
242 system_scanned = true;
245 static int print_mem_error_other_detail(const struct cper_sec_mem_err *mem, char *msg,
246 const char *location, unsigned int len)
256 n += scnprintf(msg + n, len - n, "APEI location: %s ", location);
258 if (!(mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS))
261 n += scnprintf(msg + n, len - n, "status(0x%016llx): ", mem->error_status);
262 n += scnprintf(msg + n, len - n, "%s ", cper_mem_err_status_str(mem->error_status));
270 void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
272 struct cper_mem_err_compact cmem;
273 struct edac_raw_error_desc *e;
274 struct mem_ctl_info *mci;
275 struct ghes_pvt *pvt;
280 * We can do the locking below because GHES defers error processing
281 * from NMI to IRQ context. Whenever that changes, we'd at least
284 if (WARN_ON_ONCE(in_nmi()))
287 spin_lock_irqsave(&ghes_lock, flags);
294 e = &mci->error_desc;
296 /* Cleans the error report buffer */
297 memset(e, 0, sizeof (*e));
301 e->other_detail = pvt->other_detail;
305 *pvt->other_detail = '\0';
309 case GHES_SEV_CORRECTED:
310 e->type = HW_EVENT_ERR_CORRECTED;
312 case GHES_SEV_RECOVERABLE:
313 e->type = HW_EVENT_ERR_UNCORRECTED;
316 e->type = HW_EVENT_ERR_FATAL;
320 e->type = HW_EVENT_ERR_INFO;
323 edac_dbg(1, "error validation_bits: 0x%08llx\n",
324 (long long)mem_err->validation_bits);
326 /* Error type, mapped on e->msg */
327 if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
328 u8 etype = mem_err->error_type;
331 p += snprintf(p, sizeof(pvt->msg), "%s", cper_mem_err_type_str(etype));
333 strcpy(pvt->msg, "unknown error");
337 if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
338 e->page_frame_number = PHYS_PFN(mem_err->physical_addr);
339 e->offset_in_page = offset_in_page(mem_err->physical_addr);
343 if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
344 e->grain = ~mem_err->physical_addr_mask + 1;
346 /* Memory error location, mapped on e->location */
348 cper_mem_err_pack(mem_err, &cmem);
349 p += cper_mem_err_location(&cmem, p);
351 if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
352 struct dimm_info *dimm;
354 p += cper_dimm_err_location(&cmem, p);
355 dimm = find_dimm_by_handle(mci, mem_err->mem_dev_handle);
357 e->top_layer = dimm->idx;
358 strcpy(e->label, dimm->label);
365 strcpy(e->label, "unknown memory");
367 /* All other fields are mapped on e->other_detail */
368 p = pvt->other_detail;
369 p += print_mem_error_other_detail(mem_err, p, e->location, OTHER_DETAIL_LEN);
370 if (p > pvt->other_detail)
373 edac_raw_mc_handle_error(e);
376 spin_unlock_irqrestore(&ghes_lock, flags);
380 * Known systems that are safe to enable this module.
382 static struct acpi_platform_list plat_list[] = {
383 {"HPE ", "Server ", 0, ACPI_SIG_FADT, all_versions},
387 int ghes_edac_register(struct ghes *ghes, struct device *dev)
390 struct mem_ctl_info *mci;
391 struct ghes_pvt *pvt;
392 struct edac_mc_layer layers[1];
397 if (IS_ENABLED(CONFIG_X86)) {
398 /* Check if safe to enable on this system */
399 idx = acpi_match_platform_list(plat_list);
400 if (!force_load && idx < 0)
407 /* finish another registration/unregistration instance first */
408 mutex_lock(&ghes_reg_mutex);
411 * We have only one logical memory controller to which all DIMMs belong.
413 if (refcount_inc_not_zero(&ghes_refcount))
418 /* Check if we've got a bogus BIOS */
419 if (!ghes_hw.num_dimms) {
421 ghes_hw.num_dimms = 1;
424 layers[0].type = EDAC_MC_LAYER_ALL_MEM;
425 layers[0].size = ghes_hw.num_dimms;
426 layers[0].is_virt_csrow = true;
428 mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
430 pr_info("Can't allocate memory for EDAC data\n");
439 mci->mtype_cap = MEM_FLAG_EMPTY;
440 mci->edac_ctl_cap = EDAC_FLAG_NONE;
441 mci->edac_cap = EDAC_FLAG_NONE;
442 mci->mod_name = "ghes_edac.c";
443 mci->ctl_name = "ghes_edac";
444 mci->dev_name = "ghes";
447 pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
448 pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
449 pr_info("work on such system. Use this driver with caution\n");
450 } else if (idx < 0) {
451 pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
452 pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
453 pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
454 pr_info("If you find incorrect reports, please contact your hardware vendor\n");
455 pr_info("to correct its BIOS.\n");
456 pr_info("This system has %d DIMM sockets.\n", ghes_hw.num_dimms);
460 struct dimm_info *src, *dst;
463 mci_for_each_dimm(mci, dst) {
464 src = &ghes_hw.dimms[i];
467 dst->smbios_handle = src->smbios_handle;
468 dst->nr_pages = src->nr_pages;
469 dst->mtype = src->mtype;
470 dst->edac_mode = src->edac_mode;
471 dst->dtype = src->dtype;
472 dst->grain = src->grain;
475 * If no src->label, preserve default label assigned
478 if (strlen(src->label))
479 memcpy(dst->label, src->label, sizeof(src->label));
485 struct dimm_info *dimm = edac_get_dimm(mci, 0, 0, 0);
489 dimm->mtype = MEM_UNKNOWN;
490 dimm->dtype = DEV_UNKNOWN;
491 dimm->edac_mode = EDAC_SECDED;
494 rc = edac_mc_add_mc(mci);
496 pr_info("Can't register with the EDAC core\n");
502 spin_lock_irqsave(&ghes_lock, flags);
504 spin_unlock_irqrestore(&ghes_lock, flags);
506 /* only set on success */
507 refcount_set(&ghes_refcount, 1);
511 /* Not needed anymore */
512 kfree(ghes_hw.dimms);
513 ghes_hw.dimms = NULL;
515 mutex_unlock(&ghes_reg_mutex);
520 void ghes_edac_unregister(struct ghes *ghes)
522 struct mem_ctl_info *mci;
528 mutex_lock(&ghes_reg_mutex);
530 system_scanned = false;
531 memset(&ghes_hw, 0, sizeof(struct ghes_hw_desc));
533 if (!refcount_dec_and_test(&ghes_refcount))
537 * Wait for the irq handler being finished.
539 spin_lock_irqsave(&ghes_lock, flags);
540 mci = ghes_pvt ? ghes_pvt->mci : NULL;
542 spin_unlock_irqrestore(&ghes_lock, flags);
547 mci = edac_mc_del_mc(mci->pdev);
552 mutex_unlock(&ghes_reg_mutex);