drivers/edac/ghes_edac.c

   1 /*
   2  * GHES/EDAC Linux driver
   3  *
   4  * This file may be distributed under the terms of the GNU General Public
   5  * License version 2.
   6  *
   7  * Copyright (c) 2013 by Mauro Carvalho Chehab
   8  *
   9  * Red Hat Inc. http://www.redhat.com
  10  */
  11
  12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  13
  14 #include <acpi/ghes.h>
  15 #include <linux/edac.h>
  16 #include <linux/dmi.h>
  17 #include "edac_module.h"
  18 #include <ras/ras_event.h>
  19
  20 struct ghes_edac_pvt {
  21         struct list_head list;
  22         struct ghes *ghes;
  23         struct mem_ctl_info *mci;
  24
  25         /* Buffers for the error handling routine */
  26         char detail_location[240];
  27         char other_detail[160];
  28         char msg[80];
  29 };
  30
  31 static LIST_HEAD(ghes_reglist);
  32 static DEFINE_MUTEX(ghes_edac_lock);
  33 static int ghes_edac_mc_num;
  34
  35
  36 /* Memory Device - Type 17 of SMBIOS spec */
  37 struct memdev_dmi_entry {
  38         u8 type;
  39         u8 length;
  40         u16 handle;
  41         u16 phys_mem_array_handle;
  42         u16 mem_err_info_handle;
  43         u16 total_width;
  44         u16 data_width;
  45         u16 size;
  46         u8 form_factor;
  47         u8 device_set;
  48         u8 device_locator;
  49         u8 bank_locator;
  50         u8 memory_type;
  51         u16 type_detail;
  52         u16 speed;
  53         u8 manufacturer;
  54         u8 serial_number;
  55         u8 asset_tag;
  56         u8 part_number;
  57         u8 attributes;
  58         u32 extended_size;
  59         u16 conf_mem_clk_speed;
  60 } __attribute__((__packed__));
  61
  62 struct ghes_edac_dimm_fill {
  63         struct mem_ctl_info *mci;
  64         unsigned count;
  65 };
  66
  67 static void ghes_edac_count_dimms(const struct dmi_header *dh, void *arg)
  68 {
  69         int *num_dimm = arg;
  70
  71         if (dh->type == DMI_ENTRY_MEM_DEVICE)
  72                 (*num_dimm)++;
  73 }
  74
  75 static void ghes_edac_dmidecode(const struct dmi_header *dh, void *arg)
  76 {
  77         struct ghes_edac_dimm_fill *dimm_fill = arg;
  78         struct mem_ctl_info *mci = dimm_fill->mci;
  79
  80         if (dh->type == DMI_ENTRY_MEM_DEVICE) {
  81                 struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
  82                 struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
  83                                                        mci->n_layers,
  84                                                        dimm_fill->count, 0, 0);
  85
  86                 if (entry->size == 0xffff) {
  87                         pr_info("Can't get DIMM%i size\n",
  88                                 dimm_fill->count);
  89                         dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
  90                 } else if (entry->size == 0x7fff) {
  91                         dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
  92                 } else {
  93                         if (entry->size & 1 << 15)
  94                                 dimm->nr_pages = MiB_TO_PAGES((entry->size &
  95                                                                0x7fff) << 10);
  96                         else
  97                                 dimm->nr_pages = MiB_TO_PAGES(entry->size);
  98                 }
  99
 100                 switch (entry->memory_type) {
 101                 case 0x12:
 102                         if (entry->type_detail & 1 << 13)
 103                                 dimm->mtype = MEM_RDDR;
 104                         else
 105                                 dimm->mtype = MEM_DDR;
 106                         break;
 107                 case 0x13:
 108                         if (entry->type_detail & 1 << 13)
 109                                 dimm->mtype = MEM_RDDR2;
 110                         else
 111                                 dimm->mtype = MEM_DDR2;
 112                         break;
 113                 case 0x14:
 114                         dimm->mtype = MEM_FB_DDR2;
 115                         break;
 116                 case 0x18:
 117                         if (entry->type_detail & 1 << 13)
 118                                 dimm->mtype = MEM_RDDR3;
 119                         else
 120                                 dimm->mtype = MEM_DDR3;
 121                         break;
 122                 default:
 123                         if (entry->type_detail & 1 << 6)
 124                                 dimm->mtype = MEM_RMBS;
 125                         else if ((entry->type_detail & ((1 << 7) | (1 << 13)))
 126                                  == ((1 << 7) | (1 << 13)))
 127                                 dimm->mtype = MEM_RDR;
 128                         else if (entry->type_detail & 1 << 7)
 129                                 dimm->mtype = MEM_SDR;
 130                         else if (entry->type_detail & 1 << 9)
 131                                 dimm->mtype = MEM_EDO;
 132                         else
 133                                 dimm->mtype = MEM_UNKNOWN;
 134                 }
 135
 136                 /*
 137                  * Actually, we can only detect if the memory has bits for
 138                  * checksum or not
 139                  */
 140                 if (entry->total_width == entry->data_width)
 141                         dimm->edac_mode = EDAC_NONE;
 142                 else
 143                         dimm->edac_mode = EDAC_SECDED;
 144
 145                 dimm->dtype = DEV_UNKNOWN;
 146                 dimm->grain = 128;              /* Likely, worse case */
 147
 148                 /*
 149                  * FIXME: It shouldn't be hard to also fill the DIMM labels
 150                  */
 151
 152                 if (dimm->nr_pages) {
 153                         edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
 154                                 dimm_fill->count, edac_mem_types[dimm->mtype],
 155                                 PAGES_TO_MiB(dimm->nr_pages),
 156                                 (dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
 157                         edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
 158                                 entry->memory_type, entry->type_detail,
 159                                 entry->total_width, entry->data_width);
 160                 }
 161
 162                 dimm_fill->count++;
 163         }
 164 }
 165
 166 void ghes_edac_report_mem_error(struct ghes *ghes, int sev,
 167                                 struct cper_sec_mem_err *mem_err)
 168 {
 169         enum hw_event_mc_err_type type;
 170         struct edac_raw_error_desc *e;
 171         struct mem_ctl_info *mci;
 172         struct ghes_edac_pvt *pvt = NULL;
 173         char *p;
 174         u8 grain_bits;
 175
 176         list_for_each_entry(pvt, &ghes_reglist, list) {
 177                 if (ghes == pvt->ghes)
 178                         break;
 179         }
 180         if (!pvt) {
 181                 pr_err("Internal error: Can't find EDAC structure\n");
 182                 return;
 183         }
 184         mci = pvt->mci;
 185         e = &mci->error_desc;
 186
 187         /* Cleans the error report buffer */
 188         memset(e, 0, sizeof (*e));
 189         e->error_count = 1;
 190         e->grain = 1;
 191         strcpy(e->label, "unknown label");
 192         e->msg = pvt->msg;
 193         e->other_detail = pvt->other_detail;
 194         e->top_layer = -1;
 195         e->mid_layer = -1;
 196         e->low_layer = -1;
 197         *pvt->other_detail = '\0';
 198         *pvt->msg = '\0';
 199
 200         switch (sev) {
 201         case GHES_SEV_CORRECTED:
 202                 type = HW_EVENT_ERR_CORRECTED;
 203                 break;
 204         case GHES_SEV_RECOVERABLE:
 205                 type = HW_EVENT_ERR_UNCORRECTED;
 206                 break;
 207         case GHES_SEV_PANIC:
 208                 type = HW_EVENT_ERR_FATAL;
 209                 break;
 210         default:
 211         case GHES_SEV_NO:
 212                 type = HW_EVENT_ERR_INFO;
 213         }
 214
 215         edac_dbg(1, "error validation_bits: 0x%08llx\n",
 216                  (long long)mem_err->validation_bits);
 217
 218         /* Error type, mapped on e->msg */
 219         if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
 220                 p = pvt->msg;
 221                 switch (mem_err->error_type) {
 222                 case 0:
 223                         p += sprintf(p, "Unknown");
 224                         break;
 225                 case 1:
 226                         p += sprintf(p, "No error");
 227                         break;
 228                 case 2:
 229                         p += sprintf(p, "Single-bit ECC");
 230                         break;
 231                 case 3:
 232                         p += sprintf(p, "Multi-bit ECC");
 233                         break;
 234                 case 4:
 235                         p += sprintf(p, "Single-symbol ChipKill ECC");
 236                         break;
 237                 case 5:
 238                         p += sprintf(p, "Multi-symbol ChipKill ECC");
 239                         break;
 240                 case 6:
 241                         p += sprintf(p, "Master abort");
 242                         break;
 243                 case 7:
 244                         p += sprintf(p, "Target abort");
 245                         break;
 246                 case 8:
 247                         p += sprintf(p, "Parity Error");
 248                         break;
 249                 case 9:
 250                         p += sprintf(p, "Watchdog timeout");
 251                         break;
 252                 case 10:
 253                         p += sprintf(p, "Invalid address");
 254                         break;
 255                 case 11:
 256                         p += sprintf(p, "Mirror Broken");
 257                         break;
 258                 case 12:
 259                         p += sprintf(p, "Memory Sparing");
 260                         break;
 261                 case 13:
 262                         p += sprintf(p, "Scrub corrected error");
 263                         break;
 264                 case 14:
 265                         p += sprintf(p, "Scrub uncorrected error");
 266                         break;
 267                 case 15:
 268                         p += sprintf(p, "Physical Memory Map-out event");
 269                         break;
 270                 default:
 271                         p += sprintf(p, "reserved error (%d)",
 272                                      mem_err->error_type);
 273                 }
 274         } else {
 275                 strcpy(pvt->msg, "unknown error");
 276         }
 277
 278         /* Error address */
 279         if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
 280                 e->page_frame_number = mem_err->physical_addr >> PAGE_SHIFT;
 281                 e->offset_in_page = mem_err->physical_addr & ~PAGE_MASK;
 282         }
 283
 284         /* Error grain */
 285         if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
 286                 e->grain = ~mem_err->physical_addr_mask + 1;
 287
 288         /* Memory error location, mapped on e->location */
 289         p = e->location;
 290         if (mem_err->validation_bits & CPER_MEM_VALID_NODE)
 291                 p += sprintf(p, "node:%d ", mem_err->node);
 292         if (mem_err->validation_bits & CPER_MEM_VALID_CARD)
 293                 p += sprintf(p, "card:%d ", mem_err->card);
 294         if (mem_err->validation_bits & CPER_MEM_VALID_MODULE)
 295                 p += sprintf(p, "module:%d ", mem_err->module);
 296         if (mem_err->validation_bits & CPER_MEM_VALID_RANK_NUMBER)
 297                 p += sprintf(p, "rank:%d ", mem_err->rank);
 298         if (mem_err->validation_bits & CPER_MEM_VALID_BANK)
 299                 p += sprintf(p, "bank:%d ", mem_err->bank);
 300         if (mem_err->validation_bits & CPER_MEM_VALID_ROW)
 301                 p += sprintf(p, "row:%d ", mem_err->row);
 302         if (mem_err->validation_bits & CPER_MEM_VALID_COLUMN)
 303                 p += sprintf(p, "col:%d ", mem_err->column);
 304         if (mem_err->validation_bits & CPER_MEM_VALID_BIT_POSITION)
 305                 p += sprintf(p, "bit_pos:%d ", mem_err->bit_pos);
 306         if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
 307                 const char *bank = NULL, *device = NULL;
 308                 dmi_memdev_name(mem_err->mem_dev_handle, &bank, &device);
 309                 if (bank != NULL && device != NULL)
 310                         p += sprintf(p, "DIMM location:%s %s ", bank, device);
 311                 else
 312                         p += sprintf(p, "DIMM DMI handle: 0x%.4x ",
 313                                      mem_err->mem_dev_handle);
 314         }
 315         if (p > e->location)
 316                 *(p - 1) = '\0';
 317
 318         /* All other fields are mapped on e->other_detail */
 319         p = pvt->other_detail;
 320         if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_STATUS) {
 321                 u64 status = mem_err->error_status;
 322
 323                 p += sprintf(p, "status(0x%016llx): ", (long long)status);
 324                 switch ((status >> 8) & 0xff) {
 325                 case 1:
 326                         p += sprintf(p, "Error detected internal to the component ");
 327                         break;
 328                 case 16:
 329                         p += sprintf(p, "Error detected in the bus ");
 330                         break;
 331                 case 4:
 332                         p += sprintf(p, "Storage error in DRAM memory ");
 333                         break;
 334                 case 5:
 335                         p += sprintf(p, "Storage error in TLB ");
 336                         break;
 337                 case 6:
 338                         p += sprintf(p, "Storage error in cache ");
 339                         break;
 340                 case 7:
 341                         p += sprintf(p, "Error in one or more functional units ");
 342                         break;
 343                 case 8:
 344                         p += sprintf(p, "component failed self test ");
 345                         break;
 346                 case 9:
 347                         p += sprintf(p, "Overflow or undervalue of internal queue ");
 348                         break;
 349                 case 17:
 350                         p += sprintf(p, "Virtual address not found on IO-TLB or IO-PDIR ");
 351                         break;
 352                 case 18:
 353                         p += sprintf(p, "Improper access error ");
 354                         break;
 355                 case 19:
 356                         p += sprintf(p, "Access to a memory address which is not mapped to any component ");
 357                         break;
 358                 case 20:
 359                         p += sprintf(p, "Loss of Lockstep ");
 360                         break;
 361                 case 21:
 362                         p += sprintf(p, "Response not associated with a request ");
 363                         break;
 364                 case 22:
 365                         p += sprintf(p, "Bus parity error - must also set the A, C, or D Bits ");
 366                         break;
 367                 case 23:
 368                         p += sprintf(p, "Detection of a PATH_ERROR ");
 369                         break;
 370                 case 25:
 371                         p += sprintf(p, "Bus operation timeout ");
 372                         break;
 373                 case 26:
 374                         p += sprintf(p, "A read was issued to data that has been poisoned ");
 375                         break;
 376                 default:
 377                         p += sprintf(p, "reserved ");
 378                         break;
 379                 }
 380         }
 381         if (mem_err->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
 382                 p += sprintf(p, "requestorID: 0x%016llx ",
 383                              (long long)mem_err->requestor_id);
 384         if (mem_err->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
 385                 p += sprintf(p, "responderID: 0x%016llx ",
 386                              (long long)mem_err->responder_id);
 387         if (mem_err->validation_bits & CPER_MEM_VALID_TARGET_ID)
 388                 p += sprintf(p, "targetID: 0x%016llx ",
 389                              (long long)mem_err->responder_id);
 390         if (p > pvt->other_detail)
 391                 *(p - 1) = '\0';
 392
 393         /* Sanity-check driver-supplied grain value. */
 394         if (WARN_ON_ONCE(!e->grain))
 395                 e->grain = 1;
 396
 397         grain_bits = fls_long(e->grain - 1);
 398
 399         /* Generate the trace event */
 400         snprintf(pvt->detail_location, sizeof(pvt->detail_location),
 401                  "APEI location: %s %s", e->location, e->other_detail);
 402         trace_mc_event(type, e->msg, e->label, e->error_count,
 403                        mci->mc_idx, e->top_layer, e->mid_layer, e->low_layer,
 404                        (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
 405                        grain_bits, e->syndrome, pvt->detail_location);
 406
 407         /* Report the error via EDAC API */
 408         edac_raw_mc_handle_error(type, mci, e);
 409 }
 410 EXPORT_SYMBOL_GPL(ghes_edac_report_mem_error);
 411
 412 int ghes_edac_register(struct ghes *ghes, struct device *dev)
 413 {
 414         bool fake = false;
 415         int rc, num_dimm = 0;
 416         struct mem_ctl_info *mci;
 417         struct edac_mc_layer layers[1];
 418         struct ghes_edac_pvt *pvt;
 419         struct ghes_edac_dimm_fill dimm_fill;
 420
 421         /* Get the number of DIMMs */
 422         dmi_walk(ghes_edac_count_dimms, &num_dimm);
 423
 424         /* Check if we've got a bogus BIOS */
 425         if (num_dimm == 0) {
 426                 fake = true;
 427                 num_dimm = 1;
 428         }
 429
 430         layers[0].type = EDAC_MC_LAYER_ALL_MEM;
 431         layers[0].size = num_dimm;
 432         layers[0].is_virt_csrow = true;
 433
 434         /*
 435          * We need to serialize edac_mc_alloc() and edac_mc_add_mc(),
 436          * to avoid duplicated memory controller numbers
 437          */
 438         mutex_lock(&ghes_edac_lock);
 439         mci = edac_mc_alloc(ghes_edac_mc_num, ARRAY_SIZE(layers), layers,
 440                             sizeof(*pvt));
 441         if (!mci) {
 442                 pr_info("Can't allocate memory for EDAC data\n");
 443                 mutex_unlock(&ghes_edac_lock);
 444                 return -ENOMEM;
 445         }
 446
 447         pvt = mci->pvt_info;
 448         memset(pvt, 0, sizeof(*pvt));
 449         list_add_tail(&pvt->list, &ghes_reglist);
 450         pvt->ghes = ghes;
 451         pvt->mci  = mci;
 452         mci->pdev = dev;
 453
 454         mci->mtype_cap = MEM_FLAG_EMPTY;
 455         mci->edac_ctl_cap = EDAC_FLAG_NONE;
 456         mci->edac_cap = EDAC_FLAG_NONE;
 457         mci->mod_name = "ghes_edac.c";
 458         mci->ctl_name = "ghes_edac";
 459         mci->dev_name = "ghes";
 460
 461         if (!ghes_edac_mc_num) {
 462                 if (!fake) {
 463                         pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
 464                         pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
 465                         pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
 466                         pr_info("If you find incorrect reports, please contact your hardware vendor\n");
 467                         pr_info("to correct its BIOS.\n");
 468                         pr_info("This system has %d DIMM sockets.\n",
 469                                 num_dimm);
 470                 } else {
 471                         pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
 472                         pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
 473                         pr_info("work on such system. Use this driver with caution\n");
 474                 }
 475         }
 476
 477         if (!fake) {
 478                 /*
 479                  * Fill DIMM info from DMI for the memory controller #0
 480                  *
 481                  * Keep it in blank for the other memory controllers, as
 482                  * there's no reliable way to properly credit each DIMM to
 483                  * the memory controller, as different BIOSes fill the
 484                  * DMI bank location fields on different ways
 485                  */
 486                 if (!ghes_edac_mc_num) {
 487                         dimm_fill.count = 0;
 488                         dimm_fill.mci = mci;
 489                         dmi_walk(ghes_edac_dmidecode, &dimm_fill);
 490                 }
 491         } else {
 492                 struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
 493                                                        mci->n_layers, 0, 0, 0);
 494
 495                 dimm->nr_pages = 1;
 496                 dimm->grain = 128;
 497                 dimm->mtype = MEM_UNKNOWN;
 498                 dimm->dtype = DEV_UNKNOWN;
 499                 dimm->edac_mode = EDAC_SECDED;
 500         }
 501
 502         rc = edac_mc_add_mc(mci);
 503         if (rc < 0) {
 504                 pr_info("Can't register at EDAC core\n");
 505                 edac_mc_free(mci);
 506                 mutex_unlock(&ghes_edac_lock);
 507                 return -ENODEV;
 508         }
 509
 510         ghes_edac_mc_num++;
 511         mutex_unlock(&ghes_edac_lock);
 512         return 0;
 513 }
 514 EXPORT_SYMBOL_GPL(ghes_edac_register);
 515
 516 void ghes_edac_unregister(struct ghes *ghes)
 517 {
 518         struct mem_ctl_info *mci;
 519         struct ghes_edac_pvt *pvt, *tmp;
 520
 521         list_for_each_entry_safe(pvt, tmp, &ghes_reglist, list) {
 522                 if (ghes == pvt->ghes) {
 523                         mci = pvt->mci;
 524                         edac_mc_del_mc(mci->pdev);
 525                         edac_mc_free(mci);
 526                         list_del(&pvt->list);
 527                 }
 528         }
 529 }
 530 EXPORT_SYMBOL_GPL(ghes_edac_unregister);