drivers/edac/ghes_edac.c

   1 /*
   2  * GHES/EDAC Linux driver
   3  *
   4  * This file may be distributed under the terms of the GNU General Public
   5  * License version 2.
   6  *
   7  * Copyright (c) 2013 by Mauro Carvalho Chehab
   8  *
   9  * Red Hat Inc. http://www.redhat.com
  10  */
  11
  12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  13
  14 #include <acpi/ghes.h>
  15 #include <linux/edac.h>
  16 #include <linux/dmi.h>
  17 #include "edac_core.h"
  18 #include <ras/ras_event.h>
  19
  20 #define GHES_EDAC_REVISION " Ver: 1.0.0"
  21
  22 struct ghes_edac_pvt {
  23         struct list_head list;
  24         struct ghes *ghes;
  25         struct mem_ctl_info *mci;
  26
  27         /* Buffers for the error handling routine */
  28         char detail_location[240];
  29         char other_detail[160];
  30         char msg[80];
  31 };
  32
  33 static LIST_HEAD(ghes_reglist);
  34 static DEFINE_MUTEX(ghes_edac_lock);
  35 static int ghes_edac_mc_num;
  36
  37
  38 /* Memory Device - Type 17 of SMBIOS spec */
  39 struct memdev_dmi_entry {
  40         u8 type;
  41         u8 length;
  42         u16 handle;
  43         u16 phys_mem_array_handle;
  44         u16 mem_err_info_handle;
  45         u16 total_width;
  46         u16 data_width;
  47         u16 size;
  48         u8 form_factor;
  49         u8 device_set;
  50         u8 device_locator;
  51         u8 bank_locator;
  52         u8 memory_type;
  53         u16 type_detail;
  54         u16 speed;
  55         u8 manufacturer;
  56         u8 serial_number;
  57         u8 asset_tag;
  58         u8 part_number;
  59         u8 attributes;
  60         u32 extended_size;
  61         u16 conf_mem_clk_speed;
  62 } __attribute__((__packed__));
  63
  64 struct ghes_edac_dimm_fill {
  65         struct mem_ctl_info *mci;
  66         unsigned count;
  67 };
  68
  69 static void ghes_edac_count_dimms(const struct dmi_header *dh, void *arg)
  70 {
  71         int *num_dimm = arg;
  72
  73         if (dh->type == DMI_ENTRY_MEM_DEVICE)
  74                 (*num_dimm)++;
  75 }
  76
  77 static void ghes_edac_dmidecode(const struct dmi_header *dh, void *arg)
  78 {
  79         struct ghes_edac_dimm_fill *dimm_fill = arg;
  80         struct mem_ctl_info *mci = dimm_fill->mci;
  81
  82         if (dh->type == DMI_ENTRY_MEM_DEVICE) {
  83                 struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
  84                 struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
  85                                                        mci->n_layers,
  86                                                        dimm_fill->count, 0, 0);
  87
  88                 if (entry->size == 0xffff) {
  89                         pr_info("Can't get DIMM%i size\n",
  90                                 dimm_fill->count);
  91                         dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
  92                 } else if (entry->size == 0x7fff) {
  93                         dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
  94                 } else {
  95                         if (entry->size & 1 << 15)
  96                                 dimm->nr_pages = MiB_TO_PAGES((entry->size &
  97                                                                0x7fff) << 10);
  98                         else
  99                                 dimm->nr_pages = MiB_TO_PAGES(entry->size);
 100                 }
 101
 102                 switch (entry->memory_type) {
 103                 case 0x12:
 104                         if (entry->type_detail & 1 << 13)
 105                                 dimm->mtype = MEM_RDDR;
 106                         else
 107                                 dimm->mtype = MEM_DDR;
 108                         break;
 109                 case 0x13:
 110                         if (entry->type_detail & 1 << 13)
 111                                 dimm->mtype = MEM_RDDR2;
 112                         else
 113                                 dimm->mtype = MEM_DDR2;
 114                         break;
 115                 case 0x14:
 116                         dimm->mtype = MEM_FB_DDR2;
 117                         break;
 118                 case 0x18:
 119                         if (entry->type_detail & 1 << 13)
 120                                 dimm->mtype = MEM_RDDR3;
 121                         else
 122                                 dimm->mtype = MEM_DDR3;
 123                         break;
 124                 default:
 125                         if (entry->type_detail & 1 << 6)
 126                                 dimm->mtype = MEM_RMBS;
 127                         else if ((entry->type_detail & ((1 << 7) | (1 << 13)))
 128                                  == ((1 << 7) | (1 << 13)))
 129                                 dimm->mtype = MEM_RDR;
 130                         else if (entry->type_detail & 1 << 7)
 131                                 dimm->mtype = MEM_SDR;
 132                         else if (entry->type_detail & 1 << 9)
 133                                 dimm->mtype = MEM_EDO;
 134                         else
 135                                 dimm->mtype = MEM_UNKNOWN;
 136                 }
 137
 138                 /*
 139                  * Actually, we can only detect if the memory has bits for
 140                  * checksum or not
 141                  */
 142                 if (entry->total_width == entry->data_width)
 143                         dimm->edac_mode = EDAC_NONE;
 144                 else
 145                         dimm->edac_mode = EDAC_SECDED;
 146
 147                 dimm->dtype = DEV_UNKNOWN;
 148                 dimm->grain = 128;              /* Likely, worse case */
 149
 150                 /*
 151                  * FIXME: It shouldn't be hard to also fill the DIMM labels
 152                  */
 153
 154                 if (dimm->nr_pages) {
 155                         edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
 156                                 dimm_fill->count, edac_mem_types[dimm->mtype],
 157                                 PAGES_TO_MiB(dimm->nr_pages),
 158                                 (dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
 159                         edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
 160                                 entry->memory_type, entry->type_detail,
 161                                 entry->total_width, entry->data_width);
 162                 }
 163
 164                 dimm_fill->count++;
 165         }
 166 }
 167
 168 void ghes_edac_report_mem_error(struct ghes *ghes, int sev,
 169                                 struct cper_sec_mem_err *mem_err)
 170 {
 171         enum hw_event_mc_err_type type;
 172         struct edac_raw_error_desc *e;
 173         struct mem_ctl_info *mci;
 174         struct ghes_edac_pvt *pvt = NULL;
 175         char *p;
 176         u8 grain_bits;
 177
 178         list_for_each_entry(pvt, &ghes_reglist, list) {
 179                 if (ghes == pvt->ghes)
 180                         break;
 181         }
 182         if (!pvt) {
 183                 pr_err("Internal error: Can't find EDAC structure\n");
 184                 return;
 185         }
 186         mci = pvt->mci;
 187         e = &mci->error_desc;
 188
 189         /* Cleans the error report buffer */
 190         memset(e, 0, sizeof (*e));
 191         e->error_count = 1;
 192         e->grain = 1;
 193         strcpy(e->label, "unknown label");
 194         e->msg = pvt->msg;
 195         e->other_detail = pvt->other_detail;
 196         e->top_layer = -1;
 197         e->mid_layer = -1;
 198         e->low_layer = -1;
 199         *pvt->other_detail = '\0';
 200         *pvt->msg = '\0';
 201
 202         switch (sev) {
 203         case GHES_SEV_CORRECTED:
 204                 type = HW_EVENT_ERR_CORRECTED;
 205                 break;
 206         case GHES_SEV_RECOVERABLE:
 207                 type = HW_EVENT_ERR_UNCORRECTED;
 208                 break;
 209         case GHES_SEV_PANIC:
 210                 type = HW_EVENT_ERR_FATAL;
 211                 break;
 212         default:
 213         case GHES_SEV_NO:
 214                 type = HW_EVENT_ERR_INFO;
 215         }
 216
 217         edac_dbg(1, "error validation_bits: 0x%08llx\n",
 218                  (long long)mem_err->validation_bits);
 219
 220         /* Error type, mapped on e->msg */
 221         if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
 222                 p = pvt->msg;
 223                 switch (mem_err->error_type) {
 224                 case 0:
 225                         p += sprintf(p, "Unknown");
 226                         break;
 227                 case 1:
 228                         p += sprintf(p, "No error");
 229                         break;
 230                 case 2:
 231                         p += sprintf(p, "Single-bit ECC");
 232                         break;
 233                 case 3:
 234                         p += sprintf(p, "Multi-bit ECC");
 235                         break;
 236                 case 4:
 237                         p += sprintf(p, "Single-symbol ChipKill ECC");
 238                         break;
 239                 case 5:
 240                         p += sprintf(p, "Multi-symbol ChipKill ECC");
 241                         break;
 242                 case 6:
 243                         p += sprintf(p, "Master abort");
 244                         break;
 245                 case 7:
 246                         p += sprintf(p, "Target abort");
 247                         break;
 248                 case 8:
 249                         p += sprintf(p, "Parity Error");
 250                         break;
 251                 case 9:
 252                         p += sprintf(p, "Watchdog timeout");
 253                         break;
 254                 case 10:
 255                         p += sprintf(p, "Invalid address");
 256                         break;
 257                 case 11:
 258                         p += sprintf(p, "Mirror Broken");
 259                         break;
 260                 case 12:
 261                         p += sprintf(p, "Memory Sparing");
 262                         break;
 263                 case 13:
 264                         p += sprintf(p, "Scrub corrected error");
 265                         break;
 266                 case 14:
 267                         p += sprintf(p, "Scrub uncorrected error");
 268                         break;
 269                 case 15:
 270                         p += sprintf(p, "Physical Memory Map-out event");
 271                         break;
 272                 default:
 273                         p += sprintf(p, "reserved error (%d)",
 274                                      mem_err->error_type);
 275                 }
 276         } else {
 277                 strcpy(pvt->msg, "unknown error");
 278         }
 279
 280         /* Error address */
 281         if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
 282                 e->page_frame_number = mem_err->physical_addr >> PAGE_SHIFT;
 283                 e->offset_in_page = mem_err->physical_addr & ~PAGE_MASK;
 284         }
 285
 286         /* Error grain */
 287         if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
 288                 e->grain = ~mem_err->physical_addr_mask + 1;
 289
 290         /* Memory error location, mapped on e->location */
 291         p = e->location;
 292         if (mem_err->validation_bits & CPER_MEM_VALID_NODE)
 293                 p += sprintf(p, "node:%d ", mem_err->node);
 294         if (mem_err->validation_bits & CPER_MEM_VALID_CARD)
 295                 p += sprintf(p, "card:%d ", mem_err->card);
 296         if (mem_err->validation_bits & CPER_MEM_VALID_MODULE)
 297                 p += sprintf(p, "module:%d ", mem_err->module);
 298         if (mem_err->validation_bits & CPER_MEM_VALID_RANK_NUMBER)
 299                 p += sprintf(p, "rank:%d ", mem_err->rank);
 300         if (mem_err->validation_bits & CPER_MEM_VALID_BANK)
 301                 p += sprintf(p, "bank:%d ", mem_err->bank);
 302         if (mem_err->validation_bits & CPER_MEM_VALID_ROW)
 303                 p += sprintf(p, "row:%d ", mem_err->row);
 304         if (mem_err->validation_bits & CPER_MEM_VALID_COLUMN)
 305                 p += sprintf(p, "col:%d ", mem_err->column);
 306         if (mem_err->validation_bits & CPER_MEM_VALID_BIT_POSITION)
 307                 p += sprintf(p, "bit_pos:%d ", mem_err->bit_pos);
 308         if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
 309                 const char *bank = NULL, *device = NULL;
 310                 dmi_memdev_name(mem_err->mem_dev_handle, &bank, &device);
 311                 if (bank != NULL && device != NULL)
 312                         p += sprintf(p, "DIMM location:%s %s ", bank, device);
 313                 else
 314                         p += sprintf(p, "DIMM DMI handle: 0x%.4x ",
 315                                      mem_err->mem_dev_handle);
 316         }
 317         if (p > e->location)
 318                 *(p - 1) = '\0';
 319
 320         /* All other fields are mapped on e->other_detail */
 321         p = pvt->other_detail;
 322         if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_STATUS) {
 323                 u64 status = mem_err->error_status;
 324
 325                 p += sprintf(p, "status(0x%016llx): ", (long long)status);
 326                 switch ((status >> 8) & 0xff) {
 327                 case 1:
 328                         p += sprintf(p, "Error detected internal to the component ");
 329                         break;
 330                 case 16:
 331                         p += sprintf(p, "Error detected in the bus ");
 332                         break;
 333                 case 4:
 334                         p += sprintf(p, "Storage error in DRAM memory ");
 335                         break;
 336                 case 5:
 337                         p += sprintf(p, "Storage error in TLB ");
 338                         break;
 339                 case 6:
 340                         p += sprintf(p, "Storage error in cache ");
 341                         break;
 342                 case 7:
 343                         p += sprintf(p, "Error in one or more functional units ");
 344                         break;
 345                 case 8:
 346                         p += sprintf(p, "component failed self test ");
 347                         break;
 348                 case 9:
 349                         p += sprintf(p, "Overflow or undervalue of internal queue ");
 350                         break;
 351                 case 17:
 352                         p += sprintf(p, "Virtual address not found on IO-TLB or IO-PDIR ");
 353                         break;
 354                 case 18:
 355                         p += sprintf(p, "Improper access error ");
 356                         break;
 357                 case 19:
 358                         p += sprintf(p, "Access to a memory address which is not mapped to any component ");
 359                         break;
 360                 case 20:
 361                         p += sprintf(p, "Loss of Lockstep ");
 362                         break;
 363                 case 21:
 364                         p += sprintf(p, "Response not associated with a request ");
 365                         break;
 366                 case 22:
 367                         p += sprintf(p, "Bus parity error - must also set the A, C, or D Bits ");
 368                         break;
 369                 case 23:
 370                         p += sprintf(p, "Detection of a PATH_ERROR ");
 371                         break;
 372                 case 25:
 373                         p += sprintf(p, "Bus operation timeout ");
 374                         break;
 375                 case 26:
 376                         p += sprintf(p, "A read was issued to data that has been poisoned ");
 377                         break;
 378                 default:
 379                         p += sprintf(p, "reserved ");
 380                         break;
 381                 }
 382         }
 383         if (mem_err->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
 384                 p += sprintf(p, "requestorID: 0x%016llx ",
 385                              (long long)mem_err->requestor_id);
 386         if (mem_err->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
 387                 p += sprintf(p, "responderID: 0x%016llx ",
 388                              (long long)mem_err->responder_id);
 389         if (mem_err->validation_bits & CPER_MEM_VALID_TARGET_ID)
 390                 p += sprintf(p, "targetID: 0x%016llx ",
 391                              (long long)mem_err->responder_id);
 392         if (p > pvt->other_detail)
 393                 *(p - 1) = '\0';
 394
 395         /* Sanity-check driver-supplied grain value. */
 396         if (WARN_ON_ONCE(!e->grain))
 397                 e->grain = 1;
 398
 399         grain_bits = fls_long(e->grain - 1);
 400
 401         /* Generate the trace event */
 402         snprintf(pvt->detail_location, sizeof(pvt->detail_location),
 403                  "APEI location: %s %s", e->location, e->other_detail);
 404         trace_mc_event(type, e->msg, e->label, e->error_count,
 405                        mci->mc_idx, e->top_layer, e->mid_layer, e->low_layer,
 406                        (e->page_frame_number << PAGE_SHIFT) | e->offset_in_page,
 407                        grain_bits, e->syndrome, pvt->detail_location);
 408
 409         /* Report the error via EDAC API */
 410         edac_raw_mc_handle_error(type, mci, e);
 411 }
 412 EXPORT_SYMBOL_GPL(ghes_edac_report_mem_error);
 413
 414 int ghes_edac_register(struct ghes *ghes, struct device *dev)
 415 {
 416         bool fake = false;
 417         int rc, num_dimm = 0;
 418         struct mem_ctl_info *mci;
 419         struct edac_mc_layer layers[1];
 420         struct ghes_edac_pvt *pvt;
 421         struct ghes_edac_dimm_fill dimm_fill;
 422
 423         /* Get the number of DIMMs */
 424         dmi_walk(ghes_edac_count_dimms, &num_dimm);
 425
 426         /* Check if we've got a bogus BIOS */
 427         if (num_dimm == 0) {
 428                 fake = true;
 429                 num_dimm = 1;
 430         }
 431
 432         layers[0].type = EDAC_MC_LAYER_ALL_MEM;
 433         layers[0].size = num_dimm;
 434         layers[0].is_virt_csrow = true;
 435
 436         /*
 437          * We need to serialize edac_mc_alloc() and edac_mc_add_mc(),
 438          * to avoid duplicated memory controller numbers
 439          */
 440         mutex_lock(&ghes_edac_lock);
 441         mci = edac_mc_alloc(ghes_edac_mc_num, ARRAY_SIZE(layers), layers,
 442                             sizeof(*pvt));
 443         if (!mci) {
 444                 pr_info("Can't allocate memory for EDAC data\n");
 445                 mutex_unlock(&ghes_edac_lock);
 446                 return -ENOMEM;
 447         }
 448
 449         pvt = mci->pvt_info;
 450         memset(pvt, 0, sizeof(*pvt));
 451         list_add_tail(&pvt->list, &ghes_reglist);
 452         pvt->ghes = ghes;
 453         pvt->mci  = mci;
 454         mci->pdev = dev;
 455
 456         mci->mtype_cap = MEM_FLAG_EMPTY;
 457         mci->edac_ctl_cap = EDAC_FLAG_NONE;
 458         mci->edac_cap = EDAC_FLAG_NONE;
 459         mci->mod_name = "ghes_edac.c";
 460         mci->mod_ver = GHES_EDAC_REVISION;
 461         mci->ctl_name = "ghes_edac";
 462         mci->dev_name = "ghes";
 463
 464         if (!ghes_edac_mc_num) {
 465                 if (!fake) {
 466                         pr_info("This EDAC driver relies on BIOS to enumerate memory and get error reports.\n");
 467                         pr_info("Unfortunately, not all BIOSes reflect the memory layout correctly.\n");
 468                         pr_info("So, the end result of using this driver varies from vendor to vendor.\n");
 469                         pr_info("If you find incorrect reports, please contact your hardware vendor\n");
 470                         pr_info("to correct its BIOS.\n");
 471                         pr_info("This system has %d DIMM sockets.\n",
 472                                 num_dimm);
 473                 } else {
 474                         pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
 475                         pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
 476                         pr_info("work on such system. Use this driver with caution\n");
 477                 }
 478         }
 479
 480         if (!fake) {
 481                 /*
 482                  * Fill DIMM info from DMI for the memory controller #0
 483                  *
 484                  * Keep it in blank for the other memory controllers, as
 485                  * there's no reliable way to properly credit each DIMM to
 486                  * the memory controller, as different BIOSes fill the
 487                  * DMI bank location fields on different ways
 488                  */
 489                 if (!ghes_edac_mc_num) {
 490                         dimm_fill.count = 0;
 491                         dimm_fill.mci = mci;
 492                         dmi_walk(ghes_edac_dmidecode, &dimm_fill);
 493                 }
 494         } else {
 495                 struct dimm_info *dimm = EDAC_DIMM_PTR(mci->layers, mci->dimms,
 496                                                        mci->n_layers, 0, 0, 0);
 497
 498                 dimm->nr_pages = 1;
 499                 dimm->grain = 128;
 500                 dimm->mtype = MEM_UNKNOWN;
 501                 dimm->dtype = DEV_UNKNOWN;
 502                 dimm->edac_mode = EDAC_SECDED;
 503         }
 504
 505         rc = edac_mc_add_mc(mci);
 506         if (rc < 0) {
 507                 pr_info("Can't register at EDAC core\n");
 508                 edac_mc_free(mci);
 509                 mutex_unlock(&ghes_edac_lock);
 510                 return -ENODEV;
 511         }
 512
 513         ghes_edac_mc_num++;
 514         mutex_unlock(&ghes_edac_lock);
 515         return 0;
 516 }
 517 EXPORT_SYMBOL_GPL(ghes_edac_register);
 518
 519 void ghes_edac_unregister(struct ghes *ghes)
 520 {
 521         struct mem_ctl_info *mci;
 522         struct ghes_edac_pvt *pvt, *tmp;
 523
 524         list_for_each_entry_safe(pvt, tmp, &ghes_reglist, list) {
 525                 if (ghes == pvt->ghes) {
 526                         mci = pvt->mci;
 527                         edac_mc_del_mc(mci->pdev);
 528                         edac_mc_free(mci);
 529                         list_del(&pvt->list);
 530                 }
 531         }
 532 }
 533 EXPORT_SYMBOL_GPL(ghes_edac_unregister);