2 * PCI driver for the High Speed UART DMA
4 * Copyright (C) 2015 Intel Corporation
5 * Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
7 * Partially based on the bits found in drivers/tty/serial/mfd.c.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/bitops.h>
15 #include <linux/device.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
21 #define HSU_PCI_DMASR 0x00
22 #define HSU_PCI_DMAISR 0x04
24 #define HSU_PCI_CHAN_OFFSET 0x100
26 #define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA 0x081e
27 #define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA 0x1192
29 static irqreturn_t hsu_pci_irq(int irq, void *dev)
31 struct hsu_dma_chip *chip = dev;
38 dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
39 for (i = 0; i < chip->hsu->nr_channels; i++) {
41 err = hsu_dma_get_status(chip, i, &status);
45 ret |= hsu_dma_do_irq(chip, i, status);
50 return IRQ_RETVAL(ret);
53 static int hsu_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
55 struct hsu_dma_chip *chip;
58 ret = pcim_enable_device(pdev);
62 ret = pcim_iomap_regions(pdev, BIT(0), pci_name(pdev));
64 dev_err(&pdev->dev, "I/O memory remapping failed\n");
69 pci_try_set_mwi(pdev);
71 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
75 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
79 chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
83 ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
87 chip->dev = &pdev->dev;
88 chip->regs = pcim_iomap_table(pdev)[0];
89 chip->length = pci_resource_len(pdev, 0);
90 chip->offset = HSU_PCI_CHAN_OFFSET;
91 chip->irq = pci_irq_vector(pdev, 0);
93 ret = hsu_dma_probe(chip);
97 ret = request_irq(chip->irq, hsu_pci_irq, 0, "hsu_dma_pci", chip);
99 goto err_register_irq;
102 * On Intel Tangier B0 and Anniedale the interrupt line, disregarding
103 * to have different numbers, is shared between HSU DMA and UART IPs.
104 * Thus on such SoCs we are expecting that IRQ handler is called in
105 * UART driver only. Instead of handling the spurious interrupt
106 * from HSU DMA here and waste CPU time and delay HSU UART interrupt
107 * handling, disable the interrupt entirely.
109 if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA)
110 disable_irq_nosync(chip->irq);
112 pci_set_drvdata(pdev, chip);
117 hsu_dma_remove(chip);
121 static void hsu_pci_remove(struct pci_dev *pdev)
123 struct hsu_dma_chip *chip = pci_get_drvdata(pdev);
125 free_irq(chip->irq, chip);
126 hsu_dma_remove(chip);
129 static const struct pci_device_id hsu_pci_id_table[] = {
130 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 },
131 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 },
134 MODULE_DEVICE_TABLE(pci, hsu_pci_id_table);
136 static struct pci_driver hsu_pci_driver = {
137 .name = "hsu_dma_pci",
138 .id_table = hsu_pci_id_table,
139 .probe = hsu_pci_probe,
140 .remove = hsu_pci_remove,
143 module_pci_driver(hsu_pci_driver);
145 MODULE_LICENSE("GPL v2");
146 MODULE_DESCRIPTION("High Speed UART DMA PCI driver");
147 MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>");