2 * Platform driver for the Synopsys DesignWare DMA Controller
4 * Copyright (C) 2007-2008 Atmel Corporation
5 * Copyright (C) 2010-2011 ST Microelectronics
6 * Copyright (C) 2013 Intel Corporation
8 * Some parts of this driver are derived from the original dw_dmac.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/device.h>
17 #include <linux/clk.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/platform_device.h>
20 #include <linux/dmaengine.h>
21 #include <linux/dma-mapping.h>
23 #include <linux/of_dma.h>
24 #include <linux/acpi.h>
25 #include <linux/acpi_dma.h>
29 #define DRV_NAME "dw_dmac"
31 static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
34 struct dw_dma *dw = ofdma->of_dma_data;
35 struct dw_dma_slave slave = {
36 .dma_dev = dw->dma.dev,
40 if (dma_spec->args_count != 3)
43 slave.src_id = dma_spec->args[0];
44 slave.dst_id = dma_spec->args[0];
45 slave.src_master = dma_spec->args[1];
46 slave.dst_master = dma_spec->args[2];
48 if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS ||
49 slave.dst_id >= DW_DMA_MAX_NR_REQUESTS ||
50 slave.src_master >= dw->nr_masters ||
51 slave.dst_master >= dw->nr_masters))
55 dma_cap_set(DMA_SLAVE, cap);
57 /* TODO: there should be a simpler way to do this */
58 return dma_request_channel(cap, dw_dma_filter, &slave);
62 static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param)
64 struct acpi_dma_spec *dma_spec = param;
65 struct dw_dma_slave slave = {
66 .dma_dev = dma_spec->dev,
67 .src_id = dma_spec->slave_id,
68 .dst_id = dma_spec->slave_id,
73 return dw_dma_filter(chan, &slave);
76 static void dw_dma_acpi_controller_register(struct dw_dma *dw)
78 struct device *dev = dw->dma.dev;
79 struct acpi_dma_filter_info *info;
82 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
86 dma_cap_zero(info->dma_cap);
87 dma_cap_set(DMA_SLAVE, info->dma_cap);
88 info->filter_fn = dw_dma_acpi_filter;
90 ret = acpi_dma_controller_register(dev, acpi_dma_simple_xlate, info);
92 dev_err(dev, "could not register acpi_dma_controller\n");
95 static void dw_dma_acpi_controller_free(struct dw_dma *dw)
97 struct device *dev = dw->dma.dev;
99 acpi_dma_controller_free(dev);
101 #else /* !CONFIG_ACPI */
102 static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
103 static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {}
104 #endif /* !CONFIG_ACPI */
107 static struct dw_dma_platform_data *
108 dw_dma_parse_dt(struct platform_device *pdev)
110 struct device_node *np = pdev->dev.of_node;
111 struct dw_dma_platform_data *pdata;
112 u32 tmp, arr[DW_DMA_MAX_NR_MASTERS];
115 dev_err(&pdev->dev, "Missing DT data\n");
119 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
123 if (of_property_read_u32(np, "dma-channels", &pdata->nr_channels))
126 if (of_property_read_bool(np, "is_private"))
127 pdata->is_private = true;
129 if (!of_property_read_u32(np, "chan_allocation_order", &tmp))
130 pdata->chan_allocation_order = (unsigned char)tmp;
132 if (!of_property_read_u32(np, "chan_priority", &tmp))
133 pdata->chan_priority = tmp;
135 if (!of_property_read_u32(np, "block_size", &tmp))
136 pdata->block_size = tmp;
138 if (!of_property_read_u32(np, "dma-masters", &tmp)) {
139 if (tmp > DW_DMA_MAX_NR_MASTERS)
142 pdata->nr_masters = tmp;
145 if (!of_property_read_u32_array(np, "data_width", arr,
147 for (tmp = 0; tmp < pdata->nr_masters; tmp++)
148 pdata->data_width[tmp] = arr[tmp];
153 static inline struct dw_dma_platform_data *
154 dw_dma_parse_dt(struct platform_device *pdev)
160 static int dw_probe(struct platform_device *pdev)
162 struct dw_dma_chip *chip;
163 struct device *dev = &pdev->dev;
164 struct resource *mem;
165 const struct acpi_device_id *id;
166 struct dw_dma_platform_data *pdata;
169 chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
173 chip->irq = platform_get_irq(pdev, 0);
177 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
178 chip->regs = devm_ioremap_resource(dev, mem);
179 if (IS_ERR(chip->regs))
180 return PTR_ERR(chip->regs);
182 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
186 pdata = dev_get_platdata(dev);
188 pdata = dw_dma_parse_dt(pdev);
189 if (!pdata && has_acpi_companion(dev)) {
190 id = acpi_match_device(dev->driver->acpi_match_table, dev);
192 pdata = (struct dw_dma_platform_data *)id->driver_data;
197 chip->clk = devm_clk_get(chip->dev, "hclk");
198 if (IS_ERR(chip->clk))
199 return PTR_ERR(chip->clk);
200 err = clk_prepare_enable(chip->clk);
204 pm_runtime_enable(&pdev->dev);
206 err = dw_dma_probe(chip, pdata);
208 goto err_dw_dma_probe;
210 platform_set_drvdata(pdev, chip);
212 if (pdev->dev.of_node) {
213 err = of_dma_controller_register(pdev->dev.of_node,
214 dw_dma_of_xlate, chip->dw);
217 "could not register of_dma_controller\n");
220 if (ACPI_HANDLE(&pdev->dev))
221 dw_dma_acpi_controller_register(chip->dw);
226 pm_runtime_disable(&pdev->dev);
227 clk_disable_unprepare(chip->clk);
231 static int dw_remove(struct platform_device *pdev)
233 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
235 if (ACPI_HANDLE(&pdev->dev))
236 dw_dma_acpi_controller_free(chip->dw);
238 if (pdev->dev.of_node)
239 of_dma_controller_free(pdev->dev.of_node);
242 pm_runtime_disable(&pdev->dev);
243 clk_disable_unprepare(chip->clk);
248 static void dw_shutdown(struct platform_device *pdev)
250 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
252 dw_dma_disable(chip);
253 clk_disable_unprepare(chip->clk);
257 static const struct of_device_id dw_dma_of_id_table[] = {
258 { .compatible = "snps,dma-spear1340" },
261 MODULE_DEVICE_TABLE(of, dw_dma_of_id_table);
265 static struct dw_dma_platform_data dw_dma_acpi_pdata = {
268 .chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
269 .chan_priority = CHAN_PRIORITY_ASCENDING,
274 static const struct acpi_device_id dw_dma_acpi_id_table[] = {
275 { "INTL9C60", (kernel_ulong_t)&dw_dma_acpi_pdata },
278 MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table);
281 #ifdef CONFIG_PM_SLEEP
283 static int dw_suspend_late(struct device *dev)
285 struct platform_device *pdev = to_platform_device(dev);
286 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
288 dw_dma_disable(chip);
289 clk_disable_unprepare(chip->clk);
294 static int dw_resume_early(struct device *dev)
296 struct platform_device *pdev = to_platform_device(dev);
297 struct dw_dma_chip *chip = platform_get_drvdata(pdev);
299 clk_prepare_enable(chip->clk);
300 return dw_dma_enable(chip);
303 #endif /* CONFIG_PM_SLEEP */
305 static const struct dev_pm_ops dw_dev_pm_ops = {
306 SET_LATE_SYSTEM_SLEEP_PM_OPS(dw_suspend_late, dw_resume_early)
309 static struct platform_driver dw_driver = {
312 .shutdown = dw_shutdown,
315 .pm = &dw_dev_pm_ops,
316 .of_match_table = of_match_ptr(dw_dma_of_id_table),
317 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
321 static int __init dw_init(void)
323 return platform_driver_register(&dw_driver);
325 subsys_initcall(dw_init);
327 static void __exit dw_exit(void)
329 platform_driver_unregister(&dw_driver);
331 module_exit(dw_exit);
333 MODULE_LICENSE("GPL v2");
334 MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
335 MODULE_ALIAS("platform:" DRV_NAME);