2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
40 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
46 config DMA_VIRTUAL_CHANNELS
60 tristate "Altera / Intel mSGDMA Engine"
64 Enable support for Altera / Intel mSGDMA controller.
67 bool "ARM PrimeCell PL080 or PL081 support"
70 select DMA_VIRTUAL_CHANNELS
72 Say yes if your platform has a PL08x DMAC device which can
73 provide DMA engine support. This includes the original ARM
74 PL080 and PL081, Samsungs PL080 derivative and Faraday
75 Technology's FTDMAC020 PL080 derivative.
77 config AMCC_PPC440SPE_ADMA
78 tristate "AMCC PPC440SPe ADMA support"
79 depends on 440SPe || 440SP
81 select DMA_ENGINE_RAID
82 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
83 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
85 Enable support for the AMCC PPC440SPe RAID engines.
88 tristate "Atmel AHB DMA support"
92 Support the Atmel AHB DMA controller.
95 tristate "Atmel XDMA support"
99 Support the Atmel XDMA controller.
102 tristate "Analog Devices AXI-DMAC DMA support"
103 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST
105 select DMA_VIRTUAL_CHANNELS
107 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
108 controller is often used in Analog Device's reference designs for FPGA
112 tristate "Broadcom SBA RAID engine support"
113 depends on ARM64 || COMPILE_TEST
114 depends on MAILBOX && RAID6_PQ
116 select DMA_ENGINE_RAID
117 select ASYNC_TX_DISABLE_XOR_VAL_DMA
118 select ASYNC_TX_DISABLE_PQ_VAL_DMA
119 default ARCH_BCM_IPROC
121 Enable support for Broadcom SBA RAID Engine. The SBA RAID
122 engine is available on most of the Broadcom iProc SoCs. It
123 has the capability to offload memcpy, xor and pq computation
127 bool "ST-Ericsson COH901318 DMA support"
129 depends on ARCH_U300 || COMPILE_TEST
131 Enable support for ST-Ericsson COH 901 318 DMA.
134 tristate "BCM2835 DMA engine support"
135 depends on ARCH_BCM2835
137 select DMA_VIRTUAL_CHANNELS
140 tristate "JZ4740 DMA support"
141 depends on MACH_JZ4740 || COMPILE_TEST
143 select DMA_VIRTUAL_CHANNELS
146 tristate "JZ4780 DMA support"
147 depends on MIPS || COMPILE_TEST
149 select DMA_VIRTUAL_CHANNELS
151 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
152 If you have a board based on such a SoC and wish to use DMA for
153 devices which can use the DMA controller, say Y or M here.
156 tristate "OMAP DMA support"
157 depends on ARCH_OMAP || COMPILE_TEST
159 select DMA_VIRTUAL_CHANNELS
160 select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST)
163 tristate "SA-11x0 DMA support"
164 depends on ARCH_SA1100 || COMPILE_TEST
166 select DMA_VIRTUAL_CHANNELS
168 Support the DMA engine found on Intel StrongARM SA-1100 and
169 SA-1110 SoCs. This DMA engine can only be used with on-chip
173 tristate "Allwinner A10 DMA SoCs support"
174 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
175 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
177 select DMA_VIRTUAL_CHANNELS
179 Enable support for the DMA controller present in the sun4i,
180 sun5i and sun7i Allwinner ARM SoCs.
183 tristate "Allwinner A31 SoCs DMA support"
184 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
185 depends on RESET_CONTROLLER
187 select DMA_VIRTUAL_CHANNELS
189 Support for the DMA engine first found in Allwinner A31 SoCs.
192 bool "Cirrus Logic EP93xx DMA support"
193 depends on ARCH_EP93XX || COMPILE_TEST
196 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
199 tristate "Freescale Elo series DMA support"
202 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
204 Enable support for the Freescale Elo series DMA controllers.
205 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
206 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
207 some Txxx and Bxxx parts.
210 tristate "Freescale eDMA engine support"
214 select DMA_VIRTUAL_CHANNELS
216 Support the Freescale eDMA engine with programmable channel
217 multiplexing capability for DMA request sources(slot).
218 This module can be found on Freescale Vybrid and LS-1 SoCs.
221 tristate "Freescale RAID engine Support"
222 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
224 select DMA_ENGINE_RAID
226 Enable support for Freescale RAID Engine. RAID Engine is
227 available on some QorIQ SoCs (like P5020/P5040). It has
228 the capability to offload memcpy, xor and pq computation
232 tristate "IMG MDC support"
233 depends on MIPS || COMPILE_TEST
234 depends on MFD_SYSCON
236 select DMA_VIRTUAL_CHANNELS
238 Enable support for the IMG multi-threaded DMA controller (MDC).
241 tristate "i.MX DMA support"
245 Support the i.MX DMA engine. This engine is integrated into
246 Freescale i.MX1/21/27 chips.
249 tristate "i.MX SDMA support"
253 Support the i.MX SDMA engine. This engine is integrated into
254 Freescale i.MX25/31/35/51/53/6 chips.
257 tristate "Intel integrated DMA 64-bit support"
260 select DMA_VIRTUAL_CHANNELS
262 Enable DMA support for Intel Low Power Subsystem such as found on
266 tristate "Intel I/OAT DMA support"
267 depends on PCI && X86_64 && !UML
269 select DMA_ENGINE_RAID
272 Enable support for the Intel(R) I/OAT DMA engine present
273 in recent Intel Xeon chipsets.
275 Say Y here if you have such a chipset.
279 config INTEL_IOP_ADMA
280 tristate "Intel IOP ADMA support"
281 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
283 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
285 Enable support for the Intel(R) IOP Series RAID engines.
287 config INTEL_MIC_X100_DMA
288 tristate "Intel MIC X100 DMA Driver"
289 depends on 64BIT && X86 && INTEL_MIC_BUS
292 This enables DMA support for the Intel Many Integrated Core
293 (MIC) family of PCIe form factor coprocessor X100 devices that
294 run a 64 bit Linux OS. This driver will be used by both MIC
295 host and card drivers.
297 If you are building host kernel with a MIC device or a card
298 kernel for a MIC device, then say M (recommended) or Y, else
299 say N. If unsure say N.
301 More information about the Intel MIC family as well as the Linux
302 OS and tools for MIC to use with this driver are available from
303 <http://software.intel.com/en-us/mic-developer>.
306 tristate "Hisilicon K3 DMA support"
307 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
309 select DMA_VIRTUAL_CHANNELS
311 Support the DMA engine for Hisilicon K3 platform
314 config LPC18XX_DMAMUX
315 bool "NXP LPC18xx/43xx DMA MUX for PL080"
316 depends on ARCH_LPC18XX || COMPILE_TEST
317 depends on OF && AMBA_PL08X
320 Enable support for DMA on NXP LPC18xx/43xx platforms
321 with PL080 and multiplexed DMA request lines.
324 bool "MMP PDMA support"
325 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
328 Support the MMP PDMA engine for PXA and MMP platform.
331 bool "MMP Two-Channel DMA support"
332 depends on ARCH_MMP || COMPILE_TEST
334 select MMP_SRAM if ARCH_MMP
335 select GENERIC_ALLOCATOR
337 Support the MMP Two-Channel DMA engine.
338 This engine used for MMP Audio DMA and pxa910 SQU.
339 It needs sram driver under mach-mmp.
342 tristate "MOXART DMA support"
343 depends on ARCH_MOXART
345 select DMA_VIRTUAL_CHANNELS
347 Enable support for the MOXA ART SoC DMA controller.
349 Say Y here if you enabled MMP ADMA, otherwise say N.
352 tristate "Freescale MPC512x built-in DMA engine support"
353 depends on PPC_MPC512x || PPC_MPC831x
356 Enable support for the Freescale MPC512x built-in DMA engine.
359 bool "Marvell XOR engine support"
360 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
362 select DMA_ENGINE_RAID
363 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
365 Enable support for the Marvell XOR engine.
368 bool "Marvell XOR engine version 2 support "
371 select DMA_ENGINE_RAID
372 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
373 select GENERIC_MSI_IRQ_DOMAIN
375 Enable support for the Marvell version 2 XOR engine.
377 This engine provides acceleration for copy, XOR and RAID6
378 operations, and is available on Marvell Armada 7K and 8K
382 bool "MXS DMA support"
383 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
387 Support the MXS DMA engine. This engine including APBH-DMA
388 and APBX-DMA is integrated into some Freescale chips.
391 bool "MX3x Image Processing Unit support"
396 If you plan to use the Image Processing unit in the i.MX3x, say
397 Y here. If unsure, select Y.
400 int "Number of dynamically mapped interrupts for IPU"
405 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
406 To avoid bloating the irq_desc[] array we allocate a sufficient
407 number of IRQ slots and map them dynamically to specific sources.
410 tristate "Renesas Type-AXI NBPF DMA support"
412 depends on ARM || COMPILE_TEST
414 Support for "Type-AXI" NBPF DMA IPs from Renesas
417 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
418 depends on PCI && (X86_32 || COMPILE_TEST)
421 Enable support for Intel EG20T PCH DMA engine.
423 This driver also can be used for LAPIS Semiconductor IOH(Input/
424 Output Hub), ML7213, ML7223 and ML7831.
425 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
426 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
427 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
428 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
431 tristate "DMA API Driver for PL330"
435 Select if your platform has one or more PL330 DMACs.
436 You need to provide platform specific settings via
437 platform_data for a dma-pl330 device.
440 bool "PXA DMA support"
441 depends on (ARCH_MMP || ARCH_PXA)
443 select DMA_VIRTUAL_CHANNELS
445 Support the DMA engine for PXA. It is also compatible with MMP PDMA
446 platform. The internal DMA IP of all PXA variants is supported, with
447 16 to 32 channels for peripheral to memory or memory to memory
451 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
455 Enable support for the CSR SiRFprimaII DMA engine.
458 bool "ST-Ericsson DMA40 support"
459 depends on ARCH_U8500
462 Support for ST-Ericsson DMA40 controller
465 tristate "ST FDMA dmaengine support"
467 depends on REMOTEPROC
468 select ST_SLIM_REMOTEPROC
470 select DMA_VIRTUAL_CHANNELS
472 Enable support for ST FDMA controller.
473 It supports 16 independent DMA channels, accepts up to 32 DMA requests
475 Say Y here if you have such a chipset.
479 bool "STMicroelectronics STM32 DMA support"
480 depends on ARCH_STM32 || COMPILE_TEST
482 select DMA_VIRTUAL_CHANNELS
484 Enable support for the on-chip DMA controller on STMicroelectronics
486 If you have a board based on such a MCU and wish to use DMA say Y
490 bool "Samsung S3C24XX DMA support"
491 depends on ARCH_S3C24XX || COMPILE_TEST
493 select DMA_VIRTUAL_CHANNELS
495 Support for the Samsung S3C24XX DMA controller driver. The
496 DMA controller is having multiple DMA channels which can be
497 configured for different peripherals like audio, UART, SPI.
498 The DMA controller can transfer data from memory to peripheral,
499 periphal to memory, periphal to periphal and memory to memory.
502 tristate "Toshiba TXx9 SoC DMA support"
503 depends on MACH_TX49XX || MACH_TX39XX
506 Support the TXx9 SoC internal DMA controller. This can be
507 integrated in chips such as the Toshiba TX4927/38/39.
509 config TEGRA20_APB_DMA
510 bool "NVIDIA Tegra20 APB DMA support"
511 depends on ARCH_TEGRA
514 Support for the NVIDIA Tegra20 APB DMA controller driver. The
515 DMA controller is having multiple DMA channel which can be
516 configured for different peripherals like audio, UART, SPI,
517 I2C etc which is in APB bus.
518 This DMA controller transfers data from memory to peripheral fifo
519 or vice versa. It does not support memory to memory data transfer.
522 tristate "NVIDIA Tegra210 ADMA support"
523 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK
525 select DMA_VIRTUAL_CHANNELS
527 Support for the NVIDIA Tegra210 ADMA controller driver. The
528 DMA controller has multiple DMA channels and is used to service
529 various audio clients in the Tegra210 audio processing engine
530 (APE). This DMA controller transfers data from memory to
531 peripheral and vice versa. It does not support memory to
532 memory data transfer.
535 tristate "Timberdale FPGA DMA support"
536 depends on MFD_TIMBERDALE || COMPILE_TEST
539 Enable support for the Timberdale FPGA DMA engine.
542 tristate "CPPI 4.1 DMA support"
543 depends on (ARCH_OMAP || ARCH_DAVINCI_DA8XX)
546 The Communications Port Programming Interface (CPPI) 4.1 DMA engine
547 is currently used by the USB driver on AM335x and DA8xx platforms.
549 config TI_DMA_CROSSBAR
553 bool "TI EDMA support"
554 depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST
556 select DMA_VIRTUAL_CHANNELS
557 select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST)
560 Enable support for the TI EDMA controller. This DMA
561 engine is found on TI DaVinci and AM33xx parts.
564 tristate "APM X-Gene DMA support"
565 depends on ARCH_XGENE || COMPILE_TEST
567 select DMA_ENGINE_RAID
568 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
570 Enable support for the APM X-Gene SoC DMA engine.
573 tristate "Xilinx AXI DMAS Engine"
574 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
577 Enable support for Xilinx AXI VDMA Soft IP.
579 AXI VDMA engine provides high-bandwidth direct memory access
580 between memory and AXI4-Stream video type target
581 peripherals including peripherals which support AXI4-
582 Stream Video Protocol. It has two stream interfaces/
583 channels, Memory Mapped to Stream (MM2S) and Stream to
584 Memory Mapped (S2MM) for the data transfers.
585 AXI CDMA engine provides high-bandwidth direct memory access
586 between a memory-mapped source address and a memory-mapped
588 AXI DMA engine provides high-bandwidth one dimensional direct
589 memory access between memory and AXI4-Stream target peripherals.
591 config XILINX_ZYNQMP_DMA
592 tristate "Xilinx ZynqMP DMA Engine"
593 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
596 Enable support for Xilinx ZynqMP DMA controller.
599 tristate "ZTE ZX DMA support"
600 depends on ARCH_ZX || COMPILE_TEST
602 select DMA_VIRTUAL_CHANNELS
604 Support the DMA engine for ZTE ZX family platform devices.
608 source "drivers/dma/bestcomm/Kconfig"
610 source "drivers/dma/qcom/Kconfig"
612 source "drivers/dma/dw/Kconfig"
614 source "drivers/dma/hsu/Kconfig"
616 source "drivers/dma/sh/Kconfig"
619 comment "DMA Clients"
620 depends on DMA_ENGINE
623 bool "Async_tx: Offload support for the async_tx api"
624 depends on DMA_ENGINE
626 This allows the async_tx api to take advantage of offload engines for
627 memcpy, memset, xor, and raid6 p+q operations. If your platform has
628 a dma engine that can perform raid operations and you have enabled
634 tristate "DMA Test client"
635 depends on DMA_ENGINE
636 select DMA_ENGINE_RAID
638 Simple DMA test client. Say N unless you're debugging a
641 config DMA_ENGINE_RAID