1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
65 Enable support for Altera / Intel mSGDMA controller.
68 bool "ARM PrimeCell PL080 or PL081 support"
71 select DMA_VIRTUAL_CHANNELS
73 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
78 config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the AMCC PPC440SPe RAID engines.
89 tristate "Atmel AHB DMA support"
93 Support the Atmel AHB DMA controller.
96 tristate "Atmel XDMA support"
100 Support the Atmel XDMA controller.
103 tristate "Analog Devices AXI-DMAC DMA support"
104 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_INTEL_SOCFPGA || COMPILE_TEST
106 select DMA_VIRTUAL_CHANNELS
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
110 controller is often used in Analog Devices' reference designs for FPGA
114 tristate "Broadcom SBA RAID engine support"
115 depends on ARM64 || COMPILE_TEST
116 depends on MAILBOX && RAID6_PQ
118 select DMA_ENGINE_RAID
119 select ASYNC_TX_DISABLE_XOR_VAL_DMA
120 select ASYNC_TX_DISABLE_PQ_VAL_DMA
121 default m if ARCH_BCM_IPROC
123 Enable support for Broadcom SBA RAID Engine. The SBA RAID
124 engine is available on most of the Broadcom iProc SoCs. It
125 has the capability to offload memcpy, xor and pq computation
129 tristate "BCM2835 DMA engine support"
130 depends on ARCH_BCM2835
132 select DMA_VIRTUAL_CHANNELS
135 tristate "JZ4780 DMA support"
136 depends on MIPS || COMPILE_TEST
138 select DMA_VIRTUAL_CHANNELS
140 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
141 If you have a board based on such a SoC and wish to use DMA for
142 devices which can use the DMA controller, say Y or M here.
145 tristate "SA-11x0 DMA support"
146 depends on ARCH_SA1100 || COMPILE_TEST
148 select DMA_VIRTUAL_CHANNELS
150 Support the DMA engine found on Intel StrongARM SA-1100 and
151 SA-1110 SoCs. This DMA engine can only be used with on-chip
155 tristate "Allwinner A10 DMA SoCs support"
156 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
157 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
159 select DMA_VIRTUAL_CHANNELS
161 Enable support for the DMA controller present in the sun4i,
162 sun5i and sun7i Allwinner ARM SoCs.
165 tristate "Allwinner A31 SoCs DMA support"
166 depends on ARCH_SUNXI || COMPILE_TEST
167 depends on RESET_CONTROLLER
169 select DMA_VIRTUAL_CHANNELS
171 Support for the DMA engine first found in Allwinner A31 SoCs.
174 tristate "Synopsys DesignWare AXI DMA support"
175 depends on OF || COMPILE_TEST
178 select DMA_VIRTUAL_CHANNELS
180 Enable support for Synopsys DesignWare AXI DMA controller.
181 NOTE: This driver wasn't tested on 64 bit platform because
182 of lack 64 bit platform with Synopsys DW AXI DMAC.
185 bool "Cirrus Logic EP93xx DMA support"
186 depends on ARCH_EP93XX || COMPILE_TEST
189 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
192 tristate "Freescale Elo series DMA support"
195 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
197 Enable support for the Freescale Elo series DMA controllers.
198 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
199 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
200 some Txxx and Bxxx parts.
203 tristate "Freescale eDMA engine support"
206 select DMA_VIRTUAL_CHANNELS
208 Support the Freescale eDMA engine with programmable channel
209 multiplexing capability for DMA request sources(slot).
210 This module can be found on Freescale Vybrid and LS-1 SoCs.
213 tristate "NXP Layerscape qDMA engine support"
214 depends on ARM || ARM64
216 select DMA_VIRTUAL_CHANNELS
217 select DMA_ENGINE_RAID
218 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
220 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
221 Channel virtualization is supported through enqueuing of DMA jobs to,
222 or dequeuing DMA jobs from, different work queues.
223 This module can be found on NXP Layerscape SoCs.
224 The qdma driver only work on SoCs with a DPAA hardware block.
227 tristate "Freescale RAID engine Support"
228 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
230 select DMA_ENGINE_RAID
232 Enable support for Freescale RAID Engine. RAID Engine is
233 available on some QorIQ SoCs (like P5020/P5040). It has
234 the capability to offload memcpy, xor and pq computation
238 tristate "HiSilicon DMA Engine support"
239 depends on ARM64 || COMPILE_TEST
242 select DMA_VIRTUAL_CHANNELS
244 Support HiSilicon Kunpeng DMA engine.
247 tristate "IMG MDC support"
248 depends on MIPS || COMPILE_TEST
249 depends on MFD_SYSCON
251 select DMA_VIRTUAL_CHANNELS
253 Enable support for the IMG multi-threaded DMA controller (MDC).
256 tristate "i.MX DMA support"
260 Support the i.MX DMA engine. This engine is integrated into
261 Freescale i.MX1/21/27 chips.
264 tristate "i.MX SDMA support"
267 select DMA_VIRTUAL_CHANNELS
269 Support the i.MX SDMA engine. This engine is integrated into
270 Freescale i.MX25/31/35/51/53/6 chips.
273 tristate "Intel integrated DMA 64-bit support"
275 select DMA_VIRTUAL_CHANNELS
277 Enable DMA support for Intel Low Power Subsystem such as found on
280 config INTEL_IDXD_BUS
285 tristate "Intel Data Accelerators support"
286 depends on PCI && X86_64 && !UML
292 Enable support for the Intel(R) data accelerators present
295 Say Y if you have such a platform.
299 config INTEL_IDXD_COMPAT
300 bool "Legacy behavior for idxd driver"
301 depends on PCI && X86_64
302 select INTEL_IDXD_BUS
304 Compatible driver to support old /sys/bus/dsa/drivers/dsa behavior.
305 The old behavior performed driver bind/unbind for device and wq
306 devices all under the dsa driver. The compat driver will emulate
307 the legacy behavior in order to allow existing support apps (i.e.
308 accel-config) to continue function. It is expected that accel-config
309 v3.2 and earlier will need the compat mode. A distro with later
310 accel-config version can disable this compat config.
312 Say Y if you have old applications that require such behavior.
316 # Config symbol that collects all the dependencies that's necessary to
317 # support shared virtual memory for the devices supported by idxd.
318 config INTEL_IDXD_SVM
319 bool "Accelerator Shared Virtual Memory Support"
320 depends on INTEL_IDXD
321 depends on INTEL_IOMMU_SVM
326 config INTEL_IDXD_PERFMON
327 bool "Intel Data Accelerators performance monitor support"
328 depends on INTEL_IDXD
330 Enable performance monitor (pmu) support for the Intel(R)
331 data accelerators present in Intel Xeon CPU. With this
332 enabled, perf can be used to monitor the DSA (Intel Data
333 Streaming Accelerator) events described in the Intel DSA
339 tristate "Intel I/OAT DMA support"
340 depends on PCI && X86_64 && !UML
342 select DMA_ENGINE_RAID
345 Enable support for the Intel(R) I/OAT DMA engine present
346 in recent Intel Xeon chipsets.
348 Say Y here if you have such a chipset.
352 config INTEL_IOP_ADMA
353 tristate "Intel IOP32x ADMA support"
354 depends on ARCH_IOP32X || COMPILE_TEST
356 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
358 Enable support for the Intel(R) IOP Series RAID engines.
361 tristate "Hisilicon K3 DMA support"
362 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
364 select DMA_VIRTUAL_CHANNELS
366 Support the DMA engine for Hisilicon K3 platform
369 config LPC18XX_DMAMUX
370 bool "NXP LPC18xx/43xx DMA MUX for PL080"
371 depends on ARCH_LPC18XX || COMPILE_TEST
372 depends on OF && AMBA_PL08X
375 Enable support for DMA on NXP LPC18xx/43xx platforms
376 with PL080 and multiplexed DMA request lines.
379 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
380 depends on M5441x || COMPILE_TEST
382 select DMA_VIRTUAL_CHANNELS
384 Support the Freescale ColdFire eDMA engine, 64-channel
385 implementation that performs complex data transfers with
386 minimal intervention from a host processor.
387 This module can be found on Freescale ColdFire mcf5441x SoCs.
389 config MILBEAUT_HDMAC
390 tristate "Milbeaut AHB DMA support"
391 depends on ARCH_MILBEAUT || COMPILE_TEST
394 select DMA_VIRTUAL_CHANNELS
396 Say yes here to support the Socionext Milbeaut
399 config MILBEAUT_XDMAC
400 tristate "Milbeaut AXI DMA support"
401 depends on ARCH_MILBEAUT || COMPILE_TEST
404 select DMA_VIRTUAL_CHANNELS
406 Say yes here to support the Socionext Milbeaut
410 tristate "MMP PDMA support"
411 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
414 Support the MMP PDMA engine for PXA and MMP platform.
417 tristate "MMP Two-Channel DMA support"
418 depends on ARCH_MMP || COMPILE_TEST
420 select GENERIC_ALLOCATOR
422 Support the MMP Two-Channel DMA engine.
423 This engine used for MMP Audio DMA and pxa910 SQU.
426 tristate "MOXART DMA support"
427 depends on ARCH_MOXART
429 select DMA_VIRTUAL_CHANNELS
431 Enable support for the MOXA ART SoC DMA controller.
433 Say Y here if you enabled MMP ADMA, otherwise say N.
436 tristate "Freescale MPC512x built-in DMA engine support"
437 depends on PPC_MPC512x || PPC_MPC831x
440 Enable support for the Freescale MPC512x built-in DMA engine.
443 bool "Marvell XOR engine support"
444 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
446 select DMA_ENGINE_RAID
447 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
449 Enable support for the Marvell XOR engine.
452 bool "Marvell XOR engine version 2 support "
455 select DMA_ENGINE_RAID
456 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
457 select GENERIC_MSI_IRQ_DOMAIN
459 Enable support for the Marvell version 2 XOR engine.
461 This engine provides acceleration for copy, XOR and RAID6
462 operations, and is available on Marvell Armada 7K and 8K
466 bool "MXS DMA support"
467 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
471 Support the MXS DMA engine. This engine including APBH-DMA
472 and APBX-DMA is integrated into some Freescale chips.
475 bool "MX3x Image Processing Unit support"
480 If you plan to use the Image Processing unit in the i.MX3x, say
481 Y here. If unsure, select Y.
484 int "Number of dynamically mapped interrupts for IPU"
489 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
490 To avoid bloating the irq_desc[] array we allocate a sufficient
491 number of IRQ slots and map them dynamically to specific sources.
494 tristate "Renesas Type-AXI NBPF DMA support"
496 depends on ARM || COMPILE_TEST
498 Support for "Type-AXI" NBPF DMA IPs from Renesas
501 tristate "Actions Semi Owl SoCs DMA support"
502 depends on ARCH_ACTIONS
504 select DMA_VIRTUAL_CHANNELS
506 Enable support for the Actions Semi Owl SoCs DMA controller.
509 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
510 depends on PCI && (X86_32 || COMPILE_TEST)
513 Enable support for Intel EG20T PCH DMA engine.
515 This driver also can be used for LAPIS Semiconductor IOH(Input/
516 Output Hub), ML7213, ML7223 and ML7831.
517 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
518 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
519 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
520 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
523 tristate "DMA API Driver for PL330"
527 Select if your platform has one or more PL330 DMACs.
528 You need to provide platform specific settings via
529 platform_data for a dma-pl330 device.
532 bool "PXA DMA support"
533 depends on (ARCH_MMP || ARCH_PXA)
535 select DMA_VIRTUAL_CHANNELS
537 Support the DMA engine for PXA. It is also compatible with MMP PDMA
538 platform. The internal DMA IP of all PXA variants is supported, with
539 16 to 32 channels for peripheral to memory or memory to memory
543 tristate "PLX ExpressLane PEX Switch DMA Engine Support"
547 Some PLX ExpressLane PCI Switches support additional DMA engines.
548 These are exposed via extra functions on the switch's
549 upstream port. Each function exposes one DMA channel.
552 bool "ST-Ericsson DMA40 support"
553 depends on ARCH_U8500
556 Support for ST-Ericsson DMA40 controller
559 tristate "ST FDMA dmaengine support"
561 depends on REMOTEPROC
562 select ST_SLIM_REMOTEPROC
564 select DMA_VIRTUAL_CHANNELS
566 Enable support for ST FDMA controller.
567 It supports 16 independent DMA channels, accepts up to 32 DMA requests
569 Say Y here if you have such a chipset.
573 bool "STMicroelectronics STM32 DMA support"
574 depends on ARCH_STM32 || COMPILE_TEST
576 select DMA_VIRTUAL_CHANNELS
578 Enable support for the on-chip DMA controller on STMicroelectronics
580 If you have a board based on such a MCU and wish to use DMA say Y
584 bool "STMicroelectronics STM32 dma multiplexer support"
585 depends on STM32_DMA || COMPILE_TEST
587 Enable support for the on-chip DMA multiplexer on STMicroelectronics
589 If you have a board based on such a MCU and wish to use DMAMUX say Y
593 bool "STMicroelectronics STM32 master dma support"
594 depends on ARCH_STM32 || COMPILE_TEST
597 select DMA_VIRTUAL_CHANNELS
599 Enable support for the on-chip MDMA controller on STMicroelectronics
601 If you have a board based on STM32 SoC and wish to use the master DMA
605 tristate "Spreadtrum DMA support"
606 depends on ARCH_SPRD || COMPILE_TEST
608 select DMA_VIRTUAL_CHANNELS
610 Enable support for the on-chip DMA controller on Spreadtrum platform.
613 bool "Samsung S3C24XX DMA support"
614 depends on ARCH_S3C24XX || COMPILE_TEST
616 select DMA_VIRTUAL_CHANNELS
618 Support for the Samsung S3C24XX DMA controller driver. The
619 DMA controller is having multiple DMA channels which can be
620 configured for different peripherals like audio, UART, SPI.
621 The DMA controller can transfer data from memory to peripheral,
622 periphal to memory, periphal to periphal and memory to memory.
625 tristate "Toshiba TXx9 SoC DMA support"
626 depends on MACH_TX49XX
629 Support the TXx9 SoC internal DMA controller. This can be
630 integrated in chips such as the Toshiba TX4927/38/39.
632 config TEGRA186_GPC_DMA
633 tristate "NVIDIA Tegra GPC DMA support"
634 depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
638 Support for the NVIDIA Tegra General Purpose Central DMA controller.
639 The DMA controller has multiple DMA channels which can be configured
640 for different peripherals like UART, SPI, etc which are on APB bus.
641 This DMA controller transfers data from memory to peripheral FIFO
642 or vice versa. It also supports memory to memory data transfer.
644 config TEGRA20_APB_DMA
645 tristate "NVIDIA Tegra20 APB DMA support"
646 depends on ARCH_TEGRA || COMPILE_TEST
649 Support for the NVIDIA Tegra20 APB DMA controller driver. The
650 DMA controller is having multiple DMA channel which can be
651 configured for different peripherals like audio, UART, SPI,
652 I2C etc which is in APB bus.
653 This DMA controller transfers data from memory to peripheral fifo
654 or vice versa. It does not support memory to memory data transfer.
657 tristate "NVIDIA Tegra210 ADMA support"
658 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
660 select DMA_VIRTUAL_CHANNELS
662 Support for the NVIDIA Tegra210 ADMA controller driver. The
663 DMA controller has multiple DMA channels and is used to service
664 various audio clients in the Tegra210 audio processing engine
665 (APE). This DMA controller transfers data from memory to
666 peripheral and vice versa. It does not support memory to
667 memory data transfer.
670 tristate "Timberdale FPGA DMA support"
671 depends on MFD_TIMBERDALE || COMPILE_TEST
674 Enable support for the Timberdale FPGA DMA engine.
676 config UNIPHIER_MDMAC
677 tristate "UniPhier MIO DMAC"
678 depends on ARCH_UNIPHIER || COMPILE_TEST
681 select DMA_VIRTUAL_CHANNELS
683 Enable support for the MIO DMAC (Media I/O DMA controller) on the
684 UniPhier platform. This DMA controller is used as the external
685 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
687 config UNIPHIER_XDMAC
688 tristate "UniPhier XDMAC support"
689 depends on ARCH_UNIPHIER || COMPILE_TEST
692 select DMA_VIRTUAL_CHANNELS
694 Enable support for the XDMAC (external DMA controller) on the
695 UniPhier platform. This DMA controller can transfer data from
696 memory to memory, memory to peripheral and peripheral to memory.
699 tristate "APM X-Gene DMA support"
700 depends on ARCH_XGENE || COMPILE_TEST
702 select DMA_ENGINE_RAID
703 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
705 Enable support for the APM X-Gene SoC DMA engine.
708 tristate "Xilinx AXI DMAS Engine"
709 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
712 Enable support for Xilinx AXI VDMA Soft IP.
714 AXI VDMA engine provides high-bandwidth direct memory access
715 between memory and AXI4-Stream video type target
716 peripherals including peripherals which support AXI4-
717 Stream Video Protocol. It has two stream interfaces/
718 channels, Memory Mapped to Stream (MM2S) and Stream to
719 Memory Mapped (S2MM) for the data transfers.
720 AXI CDMA engine provides high-bandwidth direct memory access
721 between a memory-mapped source address and a memory-mapped
723 AXI DMA engine provides high-bandwidth one dimensional direct
724 memory access between memory and AXI4-Stream target peripherals.
725 AXI MCDMA engine provides high-bandwidth direct memory access
726 between memory and AXI4-Stream target peripherals. It provides
727 the scatter gather interface with multiple channels independent
728 configuration support.
730 config XILINX_ZYNQMP_DMA
731 tristate "Xilinx ZynqMP DMA Engine"
732 depends on ARCH_ZYNQ || MICROBLAZE || ARM64 || COMPILE_TEST
735 Enable support for Xilinx ZynqMP DMA controller.
737 config XILINX_ZYNQMP_DPDMA
738 tristate "Xilinx DPDMA Engine"
739 depends on HAS_IOMEM && OF
741 select DMA_VIRTUAL_CHANNELS
743 Enable support for Xilinx ZynqMP DisplayPort DMA. Choose this option
744 if you have a Xilinx ZynqMP SoC with a DisplayPort subsystem. The
745 driver provides the dmaengine required by the DisplayPort subsystem
749 source "drivers/dma/bestcomm/Kconfig"
751 source "drivers/dma/mediatek/Kconfig"
753 source "drivers/dma/ptdma/Kconfig"
755 source "drivers/dma/qcom/Kconfig"
757 source "drivers/dma/dw/Kconfig"
759 source "drivers/dma/dw-edma/Kconfig"
761 source "drivers/dma/hsu/Kconfig"
763 source "drivers/dma/sf-pdma/Kconfig"
765 source "drivers/dma/sh/Kconfig"
767 source "drivers/dma/ti/Kconfig"
769 source "drivers/dma/fsl-dpaa2-qdma/Kconfig"
771 source "drivers/dma/lgm/Kconfig"
774 comment "DMA Clients"
775 depends on DMA_ENGINE
778 bool "Async_tx: Offload support for the async_tx api"
779 depends on DMA_ENGINE
781 This allows the async_tx api to take advantage of offload engines for
782 memcpy, memset, xor, and raid6 p+q operations. If your platform has
783 a dma engine that can perform raid operations and you have enabled
789 tristate "DMA Test client"
790 depends on DMA_ENGINE
791 select DMA_ENGINE_RAID
793 Simple DMA test client. Say N unless you're debugging a
796 config DMA_ENGINE_RAID