1 # SPDX-License-Identifier: GPL-2.0-only
3 # DMA engine configuration
7 bool "DMA Engine support"
10 DMA engines can do asynchronous data transfers without
11 involving the host CPU. Currently, this framework can be
12 used to offload memory copies in the network stack and
13 RAID operations in the MD driver. This menu only presents
14 DMA Device drivers supported by the configured arch, it may
15 be empty in some cases.
17 config DMADEVICES_DEBUG
18 bool "DMA Engine debugging"
19 depends on DMADEVICES != n
21 This is an option for use by developers; most people should
22 say N here. This enables DMA engine core and driver debugging.
24 config DMADEVICES_VDEBUG
25 bool "DMA Engine verbose debugging"
26 depends on DMADEVICES_DEBUG != n
28 This is an option for use by developers; most people should
29 say N here. This enables deeper (more verbose) debugging of
30 the DMA engine core and drivers.
38 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
41 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
47 config DMA_VIRTUAL_CHANNELS
61 tristate "Altera / Intel mSGDMA Engine"
65 Enable support for Altera / Intel mSGDMA controller.
68 bool "ARM PrimeCell PL080 or PL081 support"
71 select DMA_VIRTUAL_CHANNELS
73 Say yes if your platform has a PL08x DMAC device which can
74 provide DMA engine support. This includes the original ARM
75 PL080 and PL081, Samsungs PL080 derivative and Faraday
76 Technology's FTDMAC020 PL080 derivative.
78 config AMCC_PPC440SPE_ADMA
79 tristate "AMCC PPC440SPe ADMA support"
80 depends on 440SPe || 440SP
82 select DMA_ENGINE_RAID
83 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
84 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
86 Enable support for the AMCC PPC440SPe RAID engines.
89 tristate "Atmel AHB DMA support"
93 Support the Atmel AHB DMA controller.
96 tristate "Atmel XDMA support"
100 Support the Atmel XDMA controller.
103 tristate "Analog Devices AXI-DMAC DMA support"
104 depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_ZYNQMP || ARCH_SOCFPGA || COMPILE_TEST
106 select DMA_VIRTUAL_CHANNELS
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
110 controller is often used in Analog Device's reference designs for FPGA
114 tristate "Broadcom SBA RAID engine support"
115 depends on ARM64 || COMPILE_TEST
116 depends on MAILBOX && RAID6_PQ
118 select DMA_ENGINE_RAID
119 select ASYNC_TX_DISABLE_XOR_VAL_DMA
120 select ASYNC_TX_DISABLE_PQ_VAL_DMA
121 default m if ARCH_BCM_IPROC
123 Enable support for Broadcom SBA RAID Engine. The SBA RAID
124 engine is available on most of the Broadcom iProc SoCs. It
125 has the capability to offload memcpy, xor and pq computation
129 bool "ST-Ericsson COH901318 DMA support"
131 depends on ARCH_U300 || COMPILE_TEST
133 Enable support for ST-Ericsson COH 901 318 DMA.
136 tristate "BCM2835 DMA engine support"
137 depends on ARCH_BCM2835
139 select DMA_VIRTUAL_CHANNELS
142 tristate "JZ4780 DMA support"
143 depends on MIPS || COMPILE_TEST
145 select DMA_VIRTUAL_CHANNELS
147 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
148 If you have a board based on such a SoC and wish to use DMA for
149 devices which can use the DMA controller, say Y or M here.
152 tristate "SA-11x0 DMA support"
153 depends on ARCH_SA1100 || COMPILE_TEST
155 select DMA_VIRTUAL_CHANNELS
157 Support the DMA engine found on Intel StrongARM SA-1100 and
158 SA-1110 SoCs. This DMA engine can only be used with on-chip
162 tristate "Allwinner A10 DMA SoCs support"
163 depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I
164 default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I)
166 select DMA_VIRTUAL_CHANNELS
168 Enable support for the DMA controller present in the sun4i,
169 sun5i and sun7i Allwinner ARM SoCs.
172 tristate "Allwinner A31 SoCs DMA support"
173 depends on MACH_SUN6I || MACH_SUN8I || (ARM64 && ARCH_SUNXI) || COMPILE_TEST
174 depends on RESET_CONTROLLER
176 select DMA_VIRTUAL_CHANNELS
178 Support for the DMA engine first found in Allwinner A31 SoCs.
181 tristate "Synopsys DesignWare AXI DMA support"
182 depends on OF || COMPILE_TEST
184 select DMA_VIRTUAL_CHANNELS
186 Enable support for Synopsys DesignWare AXI DMA controller.
187 NOTE: This driver wasn't tested on 64 bit platform because
188 of lack 64 bit platform with Synopsys DW AXI DMAC.
191 bool "Cirrus Logic EP93xx DMA support"
192 depends on ARCH_EP93XX || COMPILE_TEST
195 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
198 tristate "Freescale Elo series DMA support"
201 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
203 Enable support for the Freescale Elo series DMA controllers.
204 The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the
205 EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on
206 some Txxx and Bxxx parts.
209 tristate "Freescale eDMA engine support"
212 select DMA_VIRTUAL_CHANNELS
214 Support the Freescale eDMA engine with programmable channel
215 multiplexing capability for DMA request sources(slot).
216 This module can be found on Freescale Vybrid and LS-1 SoCs.
219 tristate "NXP Layerscape qDMA engine support"
220 depends on ARM || ARM64
222 select DMA_VIRTUAL_CHANNELS
223 select DMA_ENGINE_RAID
224 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
226 Support the NXP Layerscape qDMA engine with command queue and legacy mode.
227 Channel virtualization is supported through enqueuing of DMA jobs to,
228 or dequeuing DMA jobs from, different work queues.
229 This module can be found on NXP Layerscape SoCs.
230 The qdma driver only work on SoCs with a DPAA hardware block.
233 tristate "Freescale RAID engine Support"
234 depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH
236 select DMA_ENGINE_RAID
238 Enable support for Freescale RAID Engine. RAID Engine is
239 available on some QorIQ SoCs (like P5020/P5040). It has
240 the capability to offload memcpy, xor and pq computation
244 tristate "IMG MDC support"
245 depends on MIPS || COMPILE_TEST
246 depends on MFD_SYSCON
248 select DMA_VIRTUAL_CHANNELS
250 Enable support for the IMG multi-threaded DMA controller (MDC).
253 tristate "i.MX DMA support"
257 Support the i.MX DMA engine. This engine is integrated into
258 Freescale i.MX1/21/27 chips.
261 tristate "i.MX SDMA support"
264 select DMA_VIRTUAL_CHANNELS
266 Support the i.MX SDMA engine. This engine is integrated into
267 Freescale i.MX25/31/35/51/53/6 chips.
270 tristate "Intel integrated DMA 64-bit support"
272 select DMA_VIRTUAL_CHANNELS
274 Enable DMA support for Intel Low Power Subsystem such as found on
278 tristate "Intel I/OAT DMA support"
279 depends on PCI && X86_64 && !UML
281 select DMA_ENGINE_RAID
284 Enable support for the Intel(R) I/OAT DMA engine present
285 in recent Intel Xeon chipsets.
287 Say Y here if you have such a chipset.
291 config INTEL_IOP_ADMA
292 tristate "Intel IOP32x ADMA support"
293 depends on ARCH_IOP32X || COMPILE_TEST
295 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
297 Enable support for the Intel(R) IOP Series RAID engines.
299 config INTEL_MIC_X100_DMA
300 tristate "Intel MIC X100 DMA Driver"
301 depends on 64BIT && X86 && INTEL_MIC_BUS
304 This enables DMA support for the Intel Many Integrated Core
305 (MIC) family of PCIe form factor coprocessor X100 devices that
306 run a 64 bit Linux OS. This driver will be used by both MIC
307 host and card drivers.
309 If you are building host kernel with a MIC device or a card
310 kernel for a MIC device, then say M (recommended) or Y, else
311 say N. If unsure say N.
313 More information about the Intel MIC family as well as the Linux
314 OS and tools for MIC to use with this driver are available from
315 <http://software.intel.com/en-us/mic-developer>.
318 tristate "Hisilicon K3 DMA support"
319 depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST
321 select DMA_VIRTUAL_CHANNELS
323 Support the DMA engine for Hisilicon K3 platform
326 config LPC18XX_DMAMUX
327 bool "NXP LPC18xx/43xx DMA MUX for PL080"
328 depends on ARCH_LPC18XX || COMPILE_TEST
329 depends on OF && AMBA_PL08X
332 Enable support for DMA on NXP LPC18xx/43xx platforms
333 with PL080 and multiplexed DMA request lines.
336 tristate "Freescale eDMA engine support, ColdFire mcf5441x SoCs"
337 depends on M5441x || COMPILE_TEST
339 select DMA_VIRTUAL_CHANNELS
341 Support the Freescale ColdFire eDMA engine, 64-channel
342 implementation that performs complex data transfers with
343 minimal intervention from a host processor.
344 This module can be found on Freescale ColdFire mcf5441x SoCs.
347 bool "MMP PDMA support"
348 depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
351 Support the MMP PDMA engine for PXA and MMP platform.
354 bool "MMP Two-Channel DMA support"
355 depends on ARCH_MMP || COMPILE_TEST
357 select MMP_SRAM if ARCH_MMP
358 select GENERIC_ALLOCATOR
360 Support the MMP Two-Channel DMA engine.
361 This engine used for MMP Audio DMA and pxa910 SQU.
362 It needs sram driver under mach-mmp.
365 tristate "MOXART DMA support"
366 depends on ARCH_MOXART
368 select DMA_VIRTUAL_CHANNELS
370 Enable support for the MOXA ART SoC DMA controller.
372 Say Y here if you enabled MMP ADMA, otherwise say N.
375 tristate "Freescale MPC512x built-in DMA engine support"
376 depends on PPC_MPC512x || PPC_MPC831x
379 Enable support for the Freescale MPC512x built-in DMA engine.
382 bool "Marvell XOR engine support"
383 depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST
385 select DMA_ENGINE_RAID
386 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
388 Enable support for the Marvell XOR engine.
391 bool "Marvell XOR engine version 2 support "
394 select DMA_ENGINE_RAID
395 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
396 select GENERIC_MSI_IRQ_DOMAIN
398 Enable support for the Marvell version 2 XOR engine.
400 This engine provides acceleration for copy, XOR and RAID6
401 operations, and is available on Marvell Armada 7K and 8K
405 bool "MXS DMA support"
406 depends on ARCH_MXS || ARCH_MXC || COMPILE_TEST
410 Support the MXS DMA engine. This engine including APBH-DMA
411 and APBX-DMA is integrated into some Freescale chips.
414 bool "MX3x Image Processing Unit support"
419 If you plan to use the Image Processing unit in the i.MX3x, say
420 Y here. If unsure, select Y.
423 int "Number of dynamically mapped interrupts for IPU"
428 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
429 To avoid bloating the irq_desc[] array we allocate a sufficient
430 number of IRQ slots and map them dynamically to specific sources.
433 tristate "Renesas Type-AXI NBPF DMA support"
435 depends on ARM || COMPILE_TEST
437 Support for "Type-AXI" NBPF DMA IPs from Renesas
440 tristate "Actions Semi Owl SoCs DMA support"
441 depends on ARCH_ACTIONS
443 select DMA_VIRTUAL_CHANNELS
445 Enable support for the Actions Semi Owl SoCs DMA controller.
448 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
449 depends on PCI && (X86_32 || COMPILE_TEST)
452 Enable support for Intel EG20T PCH DMA engine.
454 This driver also can be used for LAPIS Semiconductor IOH(Input/
455 Output Hub), ML7213, ML7223 and ML7831.
456 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
457 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
458 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
459 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
462 tristate "DMA API Driver for PL330"
466 Select if your platform has one or more PL330 DMACs.
467 You need to provide platform specific settings via
468 platform_data for a dma-pl330 device.
471 bool "PXA DMA support"
472 depends on (ARCH_MMP || ARCH_PXA)
474 select DMA_VIRTUAL_CHANNELS
476 Support the DMA engine for PXA. It is also compatible with MMP PDMA
477 platform. The internal DMA IP of all PXA variants is supported, with
478 16 to 32 channels for peripheral to memory or memory to memory
482 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
486 Enable support for the CSR SiRFprimaII DMA engine.
489 bool "ST-Ericsson DMA40 support"
490 depends on ARCH_U8500
493 Support for ST-Ericsson DMA40 controller
496 tristate "ST FDMA dmaengine support"
498 depends on REMOTEPROC
499 select ST_SLIM_REMOTEPROC
501 select DMA_VIRTUAL_CHANNELS
503 Enable support for ST FDMA controller.
504 It supports 16 independent DMA channels, accepts up to 32 DMA requests
506 Say Y here if you have such a chipset.
510 bool "STMicroelectronics STM32 DMA support"
511 depends on ARCH_STM32 || COMPILE_TEST
513 select DMA_VIRTUAL_CHANNELS
515 Enable support for the on-chip DMA controller on STMicroelectronics
517 If you have a board based on such a MCU and wish to use DMA say Y
521 bool "STMicroelectronics STM32 dma multiplexer support"
522 depends on STM32_DMA || COMPILE_TEST
524 Enable support for the on-chip DMA multiplexer on STMicroelectronics
526 If you have a board based on such a MCU and wish to use DMAMUX say Y
530 bool "STMicroelectronics STM32 master dma support"
531 depends on ARCH_STM32 || COMPILE_TEST
534 select DMA_VIRTUAL_CHANNELS
536 Enable support for the on-chip MDMA controller on STMicroelectronics
538 If you have a board based on STM32 SoC and wish to use the master DMA
542 tristate "Spreadtrum DMA support"
543 depends on ARCH_SPRD || COMPILE_TEST
545 select DMA_VIRTUAL_CHANNELS
547 Enable support for the on-chip DMA controller on Spreadtrum platform.
550 bool "Samsung S3C24XX DMA support"
551 depends on ARCH_S3C24XX || COMPILE_TEST
553 select DMA_VIRTUAL_CHANNELS
555 Support for the Samsung S3C24XX DMA controller driver. The
556 DMA controller is having multiple DMA channels which can be
557 configured for different peripherals like audio, UART, SPI.
558 The DMA controller can transfer data from memory to peripheral,
559 periphal to memory, periphal to periphal and memory to memory.
562 tristate "Toshiba TXx9 SoC DMA support"
563 depends on MACH_TX49XX || MACH_TX39XX
566 Support the TXx9 SoC internal DMA controller. This can be
567 integrated in chips such as the Toshiba TX4927/38/39.
569 config TEGRA20_APB_DMA
570 bool "NVIDIA Tegra20 APB DMA support"
571 depends on ARCH_TEGRA
574 Support for the NVIDIA Tegra20 APB DMA controller driver. The
575 DMA controller is having multiple DMA channel which can be
576 configured for different peripherals like audio, UART, SPI,
577 I2C etc which is in APB bus.
578 This DMA controller transfers data from memory to peripheral fifo
579 or vice versa. It does not support memory to memory data transfer.
582 tristate "NVIDIA Tegra210 ADMA support"
583 depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST)
585 select DMA_VIRTUAL_CHANNELS
587 Support for the NVIDIA Tegra210 ADMA controller driver. The
588 DMA controller has multiple DMA channels and is used to service
589 various audio clients in the Tegra210 audio processing engine
590 (APE). This DMA controller transfers data from memory to
591 peripheral and vice versa. It does not support memory to
592 memory data transfer.
595 tristate "Timberdale FPGA DMA support"
596 depends on MFD_TIMBERDALE || COMPILE_TEST
599 Enable support for the Timberdale FPGA DMA engine.
601 config UNIPHIER_MDMAC
602 tristate "UniPhier MIO DMAC"
603 depends on ARCH_UNIPHIER || COMPILE_TEST
606 select DMA_VIRTUAL_CHANNELS
608 Enable support for the MIO DMAC (Media I/O DMA controller) on the
609 UniPhier platform. This DMA controller is used as the external
610 DMA engine of the SD/eMMC controllers of the LD4, Pro4, sLD8 SoCs.
613 tristate "APM X-Gene DMA support"
614 depends on ARCH_XGENE || COMPILE_TEST
616 select DMA_ENGINE_RAID
617 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
619 Enable support for the APM X-Gene SoC DMA engine.
622 tristate "Xilinx AXI DMAS Engine"
623 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
626 Enable support for Xilinx AXI VDMA Soft IP.
628 AXI VDMA engine provides high-bandwidth direct memory access
629 between memory and AXI4-Stream video type target
630 peripherals including peripherals which support AXI4-
631 Stream Video Protocol. It has two stream interfaces/
632 channels, Memory Mapped to Stream (MM2S) and Stream to
633 Memory Mapped (S2MM) for the data transfers.
634 AXI CDMA engine provides high-bandwidth direct memory access
635 between a memory-mapped source address and a memory-mapped
637 AXI DMA engine provides high-bandwidth one dimensional direct
638 memory access between memory and AXI4-Stream target peripherals.
640 config XILINX_ZYNQMP_DMA
641 tristate "Xilinx ZynqMP DMA Engine"
642 depends on (ARCH_ZYNQ || MICROBLAZE || ARM64)
645 Enable support for Xilinx ZynqMP DMA controller.
648 tristate "ZTE ZX DMA support"
649 depends on ARCH_ZX || COMPILE_TEST
651 select DMA_VIRTUAL_CHANNELS
653 Support the DMA engine for ZTE ZX family platform devices.
657 source "drivers/dma/bestcomm/Kconfig"
659 source "drivers/dma/mediatek/Kconfig"
661 source "drivers/dma/qcom/Kconfig"
663 source "drivers/dma/dw/Kconfig"
665 source "drivers/dma/dw-edma/Kconfig"
667 source "drivers/dma/hsu/Kconfig"
669 source "drivers/dma/sh/Kconfig"
671 source "drivers/dma/ti/Kconfig"
674 comment "DMA Clients"
675 depends on DMA_ENGINE
678 bool "Async_tx: Offload support for the async_tx api"
679 depends on DMA_ENGINE
681 This allows the async_tx api to take advantage of offload engines for
682 memcpy, memset, xor, and raid6 p+q operations. If your platform has
683 a dma engine that can perform raid operations and you have enabled
689 tristate "DMA Test client"
690 depends on DMA_ENGINE
691 select DMA_ENGINE_RAID
693 Simple DMA test client. Say N unless you're debugging a
696 config DMA_ENGINE_RAID