1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx ZynqMP AES Driver.
4 * Copyright (c) 2020 Xilinx Inc.
7 #include <crypto/aes.h>
8 #include <crypto/engine.h>
9 #include <crypto/gcm.h>
10 #include <crypto/internal/aead.h>
11 #include <crypto/scatterwalk.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/module.h>
15 #include <linux/of_device.h>
16 #include <linux/platform_device.h>
18 #include <linux/firmware/xlnx-zynqmp.h>
20 #define ZYNQMP_DMA_BIT_MASK 32U
22 #define ZYNQMP_AES_KEY_SIZE AES_KEYSIZE_256
23 #define ZYNQMP_AES_AUTH_SIZE 16U
24 #define ZYNQMP_KEY_SRC_SEL_KEY_LEN 1U
25 #define ZYNQMP_AES_BLK_SIZE 1U
26 #define ZYNQMP_AES_MIN_INPUT_BLK_SIZE 4U
27 #define ZYNQMP_AES_WORD_LEN 4U
29 #define ZYNQMP_AES_GCM_TAG_MISMATCH_ERR 0x01
30 #define ZYNQMP_AES_WRONG_KEY_SRC_ERR 0x13
31 #define ZYNQMP_AES_PUF_NOT_PROGRAMMED 0xE300
34 ZYNQMP_AES_DECRYPT = 0,
38 enum zynqmp_aead_keysrc {
39 ZYNQMP_AES_KUP_KEY = 0,
44 struct zynqmp_aead_drv_ctx {
49 struct crypto_engine *engine;
52 struct zynqmp_aead_hw_req {
62 struct zynqmp_aead_tfm_ctx {
63 struct crypto_engine_ctx engine_ctx;
65 u8 key[ZYNQMP_AES_KEY_SIZE];
69 enum zynqmp_aead_keysrc keysrc;
70 struct crypto_aead *fbk_cipher;
73 struct zynqmp_aead_req_ctx {
74 enum zynqmp_aead_op op;
77 static int zynqmp_aes_aead_cipher(struct aead_request *req)
79 struct crypto_aead *aead = crypto_aead_reqtfm(req);
80 struct zynqmp_aead_tfm_ctx *tfm_ctx = crypto_aead_ctx(aead);
81 struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req);
82 struct device *dev = tfm_ctx->dev;
83 struct zynqmp_aead_hw_req *hwreq;
84 dma_addr_t dma_addr_data, dma_addr_hw_req;
85 unsigned int data_size;
92 if (tfm_ctx->keysrc == ZYNQMP_AES_KUP_KEY)
93 dma_size = req->cryptlen + ZYNQMP_AES_KEY_SIZE
96 dma_size = req->cryptlen + GCM_AES_IV_SIZE;
98 kbuf = dma_alloc_coherent(dev, dma_size, &dma_addr_data, GFP_KERNEL);
102 hwreq = dma_alloc_coherent(dev, sizeof(struct zynqmp_aead_hw_req),
103 &dma_addr_hw_req, GFP_KERNEL);
105 dma_free_coherent(dev, dma_size, kbuf, dma_addr_data);
109 data_size = req->cryptlen;
110 scatterwalk_map_and_copy(kbuf, req->src, 0, req->cryptlen, 0);
111 memcpy(kbuf + data_size, req->iv, GCM_AES_IV_SIZE);
113 hwreq->src = dma_addr_data;
114 hwreq->dst = dma_addr_data;
115 hwreq->iv = hwreq->src + data_size;
116 hwreq->keysrc = tfm_ctx->keysrc;
117 hwreq->op = rq_ctx->op;
119 if (hwreq->op == ZYNQMP_AES_ENCRYPT)
120 hwreq->size = data_size;
122 hwreq->size = data_size - ZYNQMP_AES_AUTH_SIZE;
124 if (hwreq->keysrc == ZYNQMP_AES_KUP_KEY) {
125 memcpy(kbuf + data_size + GCM_AES_IV_SIZE,
126 tfm_ctx->key, ZYNQMP_AES_KEY_SIZE);
128 hwreq->key = hwreq->src + data_size + GCM_AES_IV_SIZE;
133 ret = zynqmp_pm_aes_engine(dma_addr_hw_req, &status);
136 dev_err(dev, "ERROR: AES PM API failed\n");
140 case ZYNQMP_AES_GCM_TAG_MISMATCH_ERR:
141 dev_err(dev, "ERROR: Gcm Tag mismatch\n");
143 case ZYNQMP_AES_WRONG_KEY_SRC_ERR:
144 dev_err(dev, "ERROR: Wrong KeySrc, enable secure mode\n");
146 case ZYNQMP_AES_PUF_NOT_PROGRAMMED:
147 dev_err(dev, "ERROR: PUF is not registered\n");
150 dev_err(dev, "ERROR: Unknown error\n");
155 if (hwreq->op == ZYNQMP_AES_ENCRYPT)
156 data_size = data_size + ZYNQMP_AES_AUTH_SIZE;
158 data_size = data_size - ZYNQMP_AES_AUTH_SIZE;
160 sg_copy_from_buffer(req->dst, sg_nents(req->dst),
166 memzero_explicit(kbuf, dma_size);
167 dma_free_coherent(dev, dma_size, kbuf, dma_addr_data);
170 memzero_explicit(hwreq, sizeof(struct zynqmp_aead_hw_req));
171 dma_free_coherent(dev, sizeof(struct zynqmp_aead_hw_req),
172 hwreq, dma_addr_hw_req);
177 static int zynqmp_fallback_check(struct zynqmp_aead_tfm_ctx *tfm_ctx,
178 struct aead_request *req)
180 int need_fallback = 0;
181 struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req);
183 if (tfm_ctx->authsize != ZYNQMP_AES_AUTH_SIZE)
186 if (tfm_ctx->keysrc == ZYNQMP_AES_KUP_KEY &&
187 tfm_ctx->keylen != ZYNQMP_AES_KEY_SIZE) {
190 if (req->assoclen != 0 ||
191 req->cryptlen < ZYNQMP_AES_MIN_INPUT_BLK_SIZE) {
194 if ((req->cryptlen % ZYNQMP_AES_WORD_LEN) != 0)
197 if (rq_ctx->op == ZYNQMP_AES_DECRYPT &&
198 req->cryptlen <= ZYNQMP_AES_AUTH_SIZE) {
201 return need_fallback;
204 static int zynqmp_handle_aes_req(struct crypto_engine *engine,
207 struct aead_request *areq =
208 container_of(req, struct aead_request, base);
209 struct crypto_aead *aead = crypto_aead_reqtfm(req);
210 struct zynqmp_aead_tfm_ctx *tfm_ctx = crypto_aead_ctx(aead);
211 struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(areq);
212 struct aead_request *subreq = aead_request_ctx(req);
216 need_fallback = zynqmp_fallback_check(tfm_ctx, areq);
219 aead_request_set_tfm(subreq, tfm_ctx->fbk_cipher);
221 aead_request_set_callback(subreq, areq->base.flags,
223 aead_request_set_crypt(subreq, areq->src, areq->dst,
224 areq->cryptlen, areq->iv);
225 aead_request_set_ad(subreq, areq->assoclen);
226 if (rq_ctx->op == ZYNQMP_AES_ENCRYPT)
227 err = crypto_aead_encrypt(subreq);
229 err = crypto_aead_decrypt(subreq);
231 err = zynqmp_aes_aead_cipher(areq);
235 crypto_finalize_aead_request(engine, areq, err);
241 static int zynqmp_aes_aead_setkey(struct crypto_aead *aead, const u8 *key,
244 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
245 struct zynqmp_aead_tfm_ctx *tfm_ctx =
246 (struct zynqmp_aead_tfm_ctx *)crypto_tfm_ctx(tfm);
247 unsigned char keysrc;
249 if (keylen == ZYNQMP_KEY_SRC_SEL_KEY_LEN) {
251 if (keysrc == ZYNQMP_AES_KUP_KEY ||
252 keysrc == ZYNQMP_AES_DEV_KEY ||
253 keysrc == ZYNQMP_AES_PUF_KEY) {
254 tfm_ctx->keysrc = (enum zynqmp_aead_keysrc)keysrc;
256 tfm_ctx->keylen = keylen;
259 tfm_ctx->keylen = keylen;
260 if (keylen == ZYNQMP_AES_KEY_SIZE) {
261 tfm_ctx->keysrc = ZYNQMP_AES_KUP_KEY;
262 memcpy(tfm_ctx->key, key, keylen);
266 tfm_ctx->fbk_cipher->base.crt_flags &= ~CRYPTO_TFM_REQ_MASK;
267 tfm_ctx->fbk_cipher->base.crt_flags |= (aead->base.crt_flags &
268 CRYPTO_TFM_REQ_MASK);
270 return crypto_aead_setkey(tfm_ctx->fbk_cipher, key, keylen);
273 static int zynqmp_aes_aead_setauthsize(struct crypto_aead *aead,
274 unsigned int authsize)
276 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
277 struct zynqmp_aead_tfm_ctx *tfm_ctx =
278 (struct zynqmp_aead_tfm_ctx *)crypto_tfm_ctx(tfm);
280 tfm_ctx->authsize = authsize;
281 return crypto_aead_setauthsize(tfm_ctx->fbk_cipher, authsize);
284 static int zynqmp_aes_aead_encrypt(struct aead_request *req)
286 struct zynqmp_aead_drv_ctx *drv_ctx;
287 struct crypto_aead *aead = crypto_aead_reqtfm(req);
288 struct aead_alg *alg = crypto_aead_alg(aead);
289 struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req);
291 rq_ctx->op = ZYNQMP_AES_ENCRYPT;
292 drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead);
294 return crypto_transfer_aead_request_to_engine(drv_ctx->engine, req);
297 static int zynqmp_aes_aead_decrypt(struct aead_request *req)
299 struct zynqmp_aead_drv_ctx *drv_ctx;
300 struct crypto_aead *aead = crypto_aead_reqtfm(req);
301 struct aead_alg *alg = crypto_aead_alg(aead);
302 struct zynqmp_aead_req_ctx *rq_ctx = aead_request_ctx(req);
304 rq_ctx->op = ZYNQMP_AES_DECRYPT;
305 drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead);
307 return crypto_transfer_aead_request_to_engine(drv_ctx->engine, req);
310 static int zynqmp_aes_aead_init(struct crypto_aead *aead)
312 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
313 struct zynqmp_aead_tfm_ctx *tfm_ctx =
314 (struct zynqmp_aead_tfm_ctx *)crypto_tfm_ctx(tfm);
315 struct zynqmp_aead_drv_ctx *drv_ctx;
316 struct aead_alg *alg = crypto_aead_alg(aead);
318 drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead);
319 tfm_ctx->dev = drv_ctx->dev;
321 tfm_ctx->engine_ctx.op.do_one_request = zynqmp_handle_aes_req;
322 tfm_ctx->engine_ctx.op.prepare_request = NULL;
323 tfm_ctx->engine_ctx.op.unprepare_request = NULL;
325 tfm_ctx->fbk_cipher = crypto_alloc_aead(drv_ctx->alg.aead.base.cra_name,
327 CRYPTO_ALG_NEED_FALLBACK);
329 if (IS_ERR(tfm_ctx->fbk_cipher)) {
330 pr_err("%s() Error: failed to allocate fallback for %s\n",
331 __func__, drv_ctx->alg.aead.base.cra_name);
332 return PTR_ERR(tfm_ctx->fbk_cipher);
335 crypto_aead_set_reqsize(aead,
336 max(sizeof(struct zynqmp_aead_req_ctx),
337 sizeof(struct aead_request) +
338 crypto_aead_reqsize(tfm_ctx->fbk_cipher)));
342 static void zynqmp_aes_aead_exit(struct crypto_aead *aead)
344 struct crypto_tfm *tfm = crypto_aead_tfm(aead);
345 struct zynqmp_aead_tfm_ctx *tfm_ctx =
346 (struct zynqmp_aead_tfm_ctx *)crypto_tfm_ctx(tfm);
348 if (tfm_ctx->fbk_cipher) {
349 crypto_free_aead(tfm_ctx->fbk_cipher);
350 tfm_ctx->fbk_cipher = NULL;
352 memzero_explicit(tfm_ctx, sizeof(struct zynqmp_aead_tfm_ctx));
355 static struct zynqmp_aead_drv_ctx aes_drv_ctx = {
357 .setkey = zynqmp_aes_aead_setkey,
358 .setauthsize = zynqmp_aes_aead_setauthsize,
359 .encrypt = zynqmp_aes_aead_encrypt,
360 .decrypt = zynqmp_aes_aead_decrypt,
361 .init = zynqmp_aes_aead_init,
362 .exit = zynqmp_aes_aead_exit,
363 .ivsize = GCM_AES_IV_SIZE,
364 .maxauthsize = ZYNQMP_AES_AUTH_SIZE,
366 .cra_name = "gcm(aes)",
367 .cra_driver_name = "xilinx-zynqmp-aes-gcm",
369 .cra_flags = CRYPTO_ALG_TYPE_AEAD |
371 CRYPTO_ALG_ALLOCATES_MEMORY |
372 CRYPTO_ALG_KERN_DRIVER_ONLY |
373 CRYPTO_ALG_NEED_FALLBACK,
374 .cra_blocksize = ZYNQMP_AES_BLK_SIZE,
375 .cra_ctxsize = sizeof(struct zynqmp_aead_tfm_ctx),
376 .cra_module = THIS_MODULE,
381 static int zynqmp_aes_aead_probe(struct platform_device *pdev)
383 struct device *dev = &pdev->dev;
386 /* ZynqMP AES driver supports only one instance */
387 if (!aes_drv_ctx.dev)
388 aes_drv_ctx.dev = dev;
392 err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK));
394 dev_err(dev, "No usable DMA configuration\n");
398 aes_drv_ctx.engine = crypto_engine_alloc_init(dev, 1);
399 if (!aes_drv_ctx.engine) {
400 dev_err(dev, "Cannot alloc AES engine\n");
405 err = crypto_engine_start(aes_drv_ctx.engine);
407 dev_err(dev, "Cannot start AES engine\n");
411 err = crypto_register_aead(&aes_drv_ctx.alg.aead);
413 dev_err(dev, "Failed to register AEAD alg.\n");
419 crypto_unregister_aead(&aes_drv_ctx.alg.aead);
422 if (aes_drv_ctx.engine)
423 crypto_engine_exit(aes_drv_ctx.engine);
428 static int zynqmp_aes_aead_remove(struct platform_device *pdev)
430 crypto_engine_exit(aes_drv_ctx.engine);
431 crypto_unregister_aead(&aes_drv_ctx.alg.aead);
436 static const struct of_device_id zynqmp_aes_dt_ids[] = {
437 { .compatible = "xlnx,zynqmp-aes" },
440 MODULE_DEVICE_TABLE(of, zynqmp_aes_dt_ids);
442 static struct platform_driver zynqmp_aes_driver = {
443 .probe = zynqmp_aes_aead_probe,
444 .remove = zynqmp_aes_aead_remove,
446 .name = "zynqmp-aes",
447 .of_match_table = zynqmp_aes_dt_ids,
451 module_platform_driver(zynqmp_aes_driver);
452 MODULE_LICENSE("GPL");