drivers/crypto/qcom-rng.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 // Copyright (c) 2017-18 Linaro Limited
   3 //
   4 // Based on msm-rng.c and downstream driver
   5
   6 #include <crypto/internal/rng.h>
   7 #include <linux/acpi.h>
   8 #include <linux/clk.h>
   9 #include <linux/crypto.h>
  10 #include <linux/iopoll.h>
  11 #include <linux/module.h>
  12 #include <linux/of.h>
  13 #include <linux/platform_device.h>
  14
  15 /* Device specific register offsets */
  16 #define PRNG_DATA_OUT           0x0000
  17 #define PRNG_STATUS             0x0004
  18 #define PRNG_LFSR_CFG           0x0100
  19 #define PRNG_CONFIG             0x0104
  20
  21 /* Device specific register masks and config values */
  22 #define PRNG_LFSR_CFG_MASK      0x0000ffff
  23 #define PRNG_LFSR_CFG_CLOCKS    0x0000dddd
  24 #define PRNG_CONFIG_HW_ENABLE   BIT(1)
  25 #define PRNG_STATUS_DATA_AVAIL  BIT(0)
  26
  27 #define WORD_SZ                 4
  28
  29 struct qcom_rng {
  30         struct mutex lock;
  31         void __iomem *base;
  32         struct clk *clk;
  33         unsigned int skip_init;
  34 };
  35
  36 struct qcom_rng_ctx {
  37         struct qcom_rng *rng;
  38 };
  39
  40 static struct qcom_rng *qcom_rng_dev;
  41
  42 static int qcom_rng_read(struct qcom_rng *rng, u8 *data, unsigned int max)
  43 {
  44         unsigned int currsize = 0;
  45         u32 val;
  46         int ret;
  47
  48         /* read random data from hardware */
  49         do {
  50                 ret = readl_poll_timeout(rng->base + PRNG_STATUS, val,
  51                                          val & PRNG_STATUS_DATA_AVAIL,
  52                                          200, 10000);
  53                 if (ret)
  54                         return ret;
  55
  56                 val = readl_relaxed(rng->base + PRNG_DATA_OUT);
  57                 if (!val)
  58                         return -EINVAL;
  59
  60                 if ((max - currsize) >= WORD_SZ) {
  61                         memcpy(data, &val, WORD_SZ);
  62                         data += WORD_SZ;
  63                         currsize += WORD_SZ;
  64                 } else {
  65                         /* copy only remaining bytes */
  66                         memcpy(data, &val, max - currsize);
  67                 }
  68         } while (currsize < max);
  69
  70         return 0;
  71 }
  72
  73 static int qcom_rng_generate(struct crypto_rng *tfm,
  74                              const u8 *src, unsigned int slen,
  75                              u8 *dstn, unsigned int dlen)
  76 {
  77         struct qcom_rng_ctx *ctx = crypto_rng_ctx(tfm);
  78         struct qcom_rng *rng = ctx->rng;
  79         int ret;
  80
  81         ret = clk_prepare_enable(rng->clk);
  82         if (ret)
  83                 return ret;
  84
  85         mutex_lock(&rng->lock);
  86
  87         ret = qcom_rng_read(rng, dstn, dlen);
  88
  89         mutex_unlock(&rng->lock);
  90         clk_disable_unprepare(rng->clk);
  91
  92         return ret;
  93 }
  94
  95 static int qcom_rng_seed(struct crypto_rng *tfm, const u8 *seed,
  96                          unsigned int slen)
  97 {
  98         return 0;
  99 }
 100
 101 static int qcom_rng_enable(struct qcom_rng *rng)
 102 {
 103         u32 val;
 104         int ret;
 105
 106         ret = clk_prepare_enable(rng->clk);
 107         if (ret)
 108                 return ret;
 109
 110         /* Enable PRNG only if it is not already enabled */
 111         val = readl_relaxed(rng->base + PRNG_CONFIG);
 112         if (val & PRNG_CONFIG_HW_ENABLE)
 113                 goto already_enabled;
 114
 115         val = readl_relaxed(rng->base + PRNG_LFSR_CFG);
 116         val &= ~PRNG_LFSR_CFG_MASK;
 117         val |= PRNG_LFSR_CFG_CLOCKS;
 118         writel(val, rng->base + PRNG_LFSR_CFG);
 119
 120         val = readl_relaxed(rng->base + PRNG_CONFIG);
 121         val |= PRNG_CONFIG_HW_ENABLE;
 122         writel(val, rng->base + PRNG_CONFIG);
 123
 124 already_enabled:
 125         clk_disable_unprepare(rng->clk);
 126
 127         return 0;
 128 }
 129
 130 static int qcom_rng_init(struct crypto_tfm *tfm)
 131 {
 132         struct qcom_rng_ctx *ctx = crypto_tfm_ctx(tfm);
 133
 134         ctx->rng = qcom_rng_dev;
 135
 136         if (!ctx->rng->skip_init)
 137                 return qcom_rng_enable(ctx->rng);
 138
 139         return 0;
 140 }
 141
 142 static struct rng_alg qcom_rng_alg = {
 143         .generate       = qcom_rng_generate,
 144         .seed           = qcom_rng_seed,
 145         .seedsize       = 0,
 146         .base           = {
 147                 .cra_name               = "stdrng",
 148                 .cra_driver_name        = "qcom-rng",
 149                 .cra_flags              = CRYPTO_ALG_TYPE_RNG,
 150                 .cra_priority           = 300,
 151                 .cra_ctxsize            = sizeof(struct qcom_rng_ctx),
 152                 .cra_module             = THIS_MODULE,
 153                 .cra_init               = qcom_rng_init,
 154         }
 155 };
 156
 157 static int qcom_rng_probe(struct platform_device *pdev)
 158 {
 159         struct resource *res;
 160         struct qcom_rng *rng;
 161         int ret;
 162
 163         rng = devm_kzalloc(&pdev->dev, sizeof(*rng), GFP_KERNEL);
 164         if (!rng)
 165                 return -ENOMEM;
 166
 167         platform_set_drvdata(pdev, rng);
 168         mutex_init(&rng->lock);
 169
 170         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 171         rng->base = devm_ioremap_resource(&pdev->dev, res);
 172         if (IS_ERR(rng->base))
 173                 return PTR_ERR(rng->base);
 174
 175         /* ACPI systems have clk already on, so skip clk_get */
 176         if (!has_acpi_companion(&pdev->dev)) {
 177                 rng->clk = devm_clk_get(&pdev->dev, "core");
 178                 if (IS_ERR(rng->clk))
 179                         return PTR_ERR(rng->clk);
 180         }
 181
 182
 183         rng->skip_init = (unsigned long)device_get_match_data(&pdev->dev);
 184
 185         qcom_rng_dev = rng;
 186         ret = crypto_register_rng(&qcom_rng_alg);
 187         if (ret) {
 188                 dev_err(&pdev->dev, "Register crypto rng failed: %d\n", ret);
 189                 qcom_rng_dev = NULL;
 190         }
 191
 192         return ret;
 193 }
 194
 195 static int qcom_rng_remove(struct platform_device *pdev)
 196 {
 197         crypto_unregister_rng(&qcom_rng_alg);
 198
 199         qcom_rng_dev = NULL;
 200
 201         return 0;
 202 }
 203
 204 #if IS_ENABLED(CONFIG_ACPI)
 205 static const struct acpi_device_id qcom_rng_acpi_match[] = {
 206         { .id = "QCOM8160", .driver_data = 1 },
 207         {}
 208 };
 209 MODULE_DEVICE_TABLE(acpi, qcom_rng_acpi_match);
 210 #endif
 211
 212 static const struct of_device_id qcom_rng_of_match[] = {
 213         { .compatible = "qcom,prng", .data = (void *)0},
 214         { .compatible = "qcom,prng-ee", .data = (void *)1},
 215         {}
 216 };
 217 MODULE_DEVICE_TABLE(of, qcom_rng_of_match);
 218
 219 static struct platform_driver qcom_rng_driver = {
 220         .probe = qcom_rng_probe,
 221         .remove =  qcom_rng_remove,
 222         .driver = {
 223                 .name = KBUILD_MODNAME,
 224                 .of_match_table = of_match_ptr(qcom_rng_of_match),
 225                 .acpi_match_table = ACPI_PTR(qcom_rng_acpi_match),
 226         }
 227 };
 228 module_platform_driver(qcom_rng_driver);
 229
 230 MODULE_ALIAS("platform:" KBUILD_MODNAME);
 231 MODULE_DESCRIPTION("Qualcomm random number generator driver");
 232 MODULE_LICENSE("GPL v2");