1 // SPDX-License-Identifier: GPL-2.0
3 * amlgoic-core.c - hardware cryptographic offloader for Amlogic GXL SoC
5 * Copyright (C) 2018-2019 Corentin Labbe <clabbe@baylibre.com>
7 * Core file which registers crypto algorithms supported by the hardware.
10 #include <linux/crypto.h>
12 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <crypto/internal/skcipher.h>
19 #include <linux/dma-mapping.h>
21 #include "amlogic-gxl.h"
23 static irqreturn_t meson_irq_handler(int irq, void *data)
25 struct meson_dev *mc = (struct meson_dev *)data;
29 for (flow = 0; flow < MAXFLOW; flow++) {
30 if (mc->irqs[flow] == irq) {
31 p = readl(mc->base + ((0x04 + flow) << 2));
33 writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2));
34 mc->chanlist[flow].status = 1;
35 complete(&mc->chanlist[flow].complete);
38 dev_err(mc->dev, "%s %d Got irq for flow %d but ctrl is empty\n", __func__, irq, flow);
42 dev_err(mc->dev, "%s %d from unknown irq\n", __func__, irq);
46 static struct meson_alg_template mc_algs[] = {
48 .type = CRYPTO_ALG_TYPE_SKCIPHER,
49 .blockmode = MESON_OPMODE_CBC,
52 .cra_name = "cbc(aes)",
53 .cra_driver_name = "cbc-aes-gxl",
55 .cra_blocksize = AES_BLOCK_SIZE,
56 .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
57 CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
58 CRYPTO_ALG_NEED_FALLBACK,
59 .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
60 .cra_module = THIS_MODULE,
62 .cra_init = meson_cipher_init,
63 .cra_exit = meson_cipher_exit,
65 .min_keysize = AES_MIN_KEY_SIZE,
66 .max_keysize = AES_MAX_KEY_SIZE,
67 .ivsize = AES_BLOCK_SIZE,
68 .setkey = meson_aes_setkey,
69 .encrypt = meson_skencrypt,
70 .decrypt = meson_skdecrypt,
74 .type = CRYPTO_ALG_TYPE_SKCIPHER,
75 .blockmode = MESON_OPMODE_ECB,
78 .cra_name = "ecb(aes)",
79 .cra_driver_name = "ecb-aes-gxl",
81 .cra_blocksize = AES_BLOCK_SIZE,
82 .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER |
83 CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY |
84 CRYPTO_ALG_NEED_FALLBACK,
85 .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx),
86 .cra_module = THIS_MODULE,
88 .cra_init = meson_cipher_init,
89 .cra_exit = meson_cipher_exit,
91 .min_keysize = AES_MIN_KEY_SIZE,
92 .max_keysize = AES_MAX_KEY_SIZE,
93 .setkey = meson_aes_setkey,
94 .encrypt = meson_skencrypt,
95 .decrypt = meson_skdecrypt,
100 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
101 static int meson_debugfs_show(struct seq_file *seq, void *v)
103 struct meson_dev *mc = seq->private;
106 for (i = 0; i < MAXFLOW; i++)
107 seq_printf(seq, "Channel %d: nreq %lu\n", i, mc->chanlist[i].stat_req);
109 for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
110 switch (mc_algs[i].type) {
111 case CRYPTO_ALG_TYPE_SKCIPHER:
112 seq_printf(seq, "%s %s %lu %lu\n",
113 mc_algs[i].alg.skcipher.base.cra_driver_name,
114 mc_algs[i].alg.skcipher.base.cra_name,
115 mc_algs[i].stat_req, mc_algs[i].stat_fb);
121 DEFINE_SHOW_ATTRIBUTE(meson_debugfs);
124 static void meson_free_chanlist(struct meson_dev *mc, int i)
127 crypto_engine_exit(mc->chanlist[i].engine);
128 if (mc->chanlist[i].tl)
129 dma_free_coherent(mc->dev, sizeof(struct meson_desc) * MAXDESC,
131 mc->chanlist[i].t_phy);
137 * Allocate the channel list structure
139 static int meson_allocate_chanlist(struct meson_dev *mc)
143 mc->chanlist = devm_kcalloc(mc->dev, MAXFLOW,
144 sizeof(struct meson_flow), GFP_KERNEL);
148 for (i = 0; i < MAXFLOW; i++) {
149 init_completion(&mc->chanlist[i].complete);
151 mc->chanlist[i].engine = crypto_engine_alloc_init(mc->dev, true);
152 if (!mc->chanlist[i].engine) {
153 dev_err(mc->dev, "Cannot allocate engine\n");
158 err = crypto_engine_start(mc->chanlist[i].engine);
160 dev_err(mc->dev, "Cannot start engine\n");
163 mc->chanlist[i].tl = dma_alloc_coherent(mc->dev,
164 sizeof(struct meson_desc) * MAXDESC,
165 &mc->chanlist[i].t_phy,
167 if (!mc->chanlist[i].tl) {
174 meson_free_chanlist(mc, i);
178 static int meson_register_algs(struct meson_dev *mc)
182 for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
184 switch (mc_algs[i].type) {
185 case CRYPTO_ALG_TYPE_SKCIPHER:
186 err = crypto_register_skcipher(&mc_algs[i].alg.skcipher);
188 dev_err(mc->dev, "Fail to register %s\n",
189 mc_algs[i].alg.skcipher.base.cra_name);
190 mc_algs[i].mc = NULL;
200 static void meson_unregister_algs(struct meson_dev *mc)
204 for (i = 0; i < ARRAY_SIZE(mc_algs); i++) {
207 switch (mc_algs[i].type) {
208 case CRYPTO_ALG_TYPE_SKCIPHER:
209 crypto_unregister_skcipher(&mc_algs[i].alg.skcipher);
215 static int meson_crypto_probe(struct platform_device *pdev)
217 struct meson_dev *mc;
220 if (!pdev->dev.of_node)
223 mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL);
227 mc->dev = &pdev->dev;
228 platform_set_drvdata(pdev, mc);
230 mc->base = devm_platform_ioremap_resource(pdev, 0);
231 if (IS_ERR(mc->base)) {
232 err = PTR_ERR(mc->base);
233 dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err);
236 mc->busclk = devm_clk_get(&pdev->dev, "blkmv");
237 if (IS_ERR(mc->busclk)) {
238 err = PTR_ERR(mc->busclk);
239 dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err);
243 mc->irqs = devm_kcalloc(mc->dev, MAXFLOW, sizeof(int), GFP_KERNEL);
244 for (i = 0; i < MAXFLOW; i++) {
245 mc->irqs[i] = platform_get_irq(pdev, i);
249 err = devm_request_irq(&pdev->dev, mc->irqs[i], meson_irq_handler, 0,
252 dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i);
257 err = clk_prepare_enable(mc->busclk);
259 dev_err(&pdev->dev, "Cannot prepare_enable busclk\n");
263 err = meson_allocate_chanlist(mc);
267 err = meson_register_algs(mc);
271 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
272 mc->dbgfs_dir = debugfs_create_dir("gxl-crypto", NULL);
273 debugfs_create_file("stats", 0444, mc->dbgfs_dir, mc, &meson_debugfs_fops);
278 meson_unregister_algs(mc);
280 meson_free_chanlist(mc, MAXFLOW - 1);
281 clk_disable_unprepare(mc->busclk);
285 static int meson_crypto_remove(struct platform_device *pdev)
287 struct meson_dev *mc = platform_get_drvdata(pdev);
289 #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG
290 debugfs_remove_recursive(mc->dbgfs_dir);
293 meson_unregister_algs(mc);
295 meson_free_chanlist(mc, MAXFLOW - 1);
297 clk_disable_unprepare(mc->busclk);
301 static const struct of_device_id meson_crypto_of_match_table[] = {
302 { .compatible = "amlogic,gxl-crypto", },
305 MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table);
307 static struct platform_driver meson_crypto_driver = {
308 .probe = meson_crypto_probe,
309 .remove = meson_crypto_remove,
311 .name = "gxl-crypto",
312 .of_match_table = meson_crypto_of_match_table,
316 module_platform_driver(meson_crypto_driver);
318 MODULE_DESCRIPTION("Amlogic GXL cryptographic offloader");
319 MODULE_LICENSE("GPL");
320 MODULE_AUTHOR("Corentin Labbe <clabbe@baylibre.com>");