2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * TODO: Need a big cleanup here. Basically, we need to have different
10 * cpufreq_driver structures for the different type of HW instead of the
11 * current mess. We also need to better deal with the detection of the
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/cpufreq.h>
25 #include <linux/init.h>
26 #include <linux/device.h>
27 #include <linux/hardirq.h>
28 #include <linux/of_device.h>
30 #include <asm/machdep.h>
32 #include <asm/pmac_feature.h>
33 #include <asm/mmu_context.h>
34 #include <asm/sections.h>
35 #include <asm/cputable.h>
38 #include <asm/keylargo.h>
39 #include <asm/switch_to.h>
41 /* WARNING !!! This will cause calibrate_delay() to be called,
42 * but this is an __init function ! So you MUST go edit
43 * init/main.c to make it non-init before enabling DEBUG_FREQ
47 extern void low_choose_7447a_dfs(int dfs);
48 extern void low_choose_750fx_pll(int pll);
49 extern void low_sleep_handler(void);
52 * Currently, PowerMac cpufreq supports only high & low frequencies
53 * that are set by the firmware
55 static unsigned int low_freq;
56 static unsigned int hi_freq;
57 static unsigned int cur_freq;
58 static unsigned int sleep_freq;
59 static unsigned long transition_latency;
62 * Different models uses different mechanisms to switch the frequency
64 static int (*set_speed_proc)(int low_speed);
65 static unsigned int (*get_speed_proc)(void);
68 * Some definitions used by the various speedprocs
70 static u32 voltage_gpio;
71 static u32 frequency_gpio;
72 static u32 slew_done_gpio;
73 static int no_schedule;
74 static int has_cpu_l2lve;
75 static int is_pmu_based;
77 /* There are only two frequency states for each processor. Values
78 * are in kHz for the time being.
80 #define CPUFREQ_HIGH 0
83 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
86 {0, 0, CPUFREQ_TABLE_END},
89 static inline void local_delay(unsigned long ms)
98 static inline void debug_calc_bogomips(void)
100 /* This will cause a recalc of bogomips and display the
101 * result. We backup/restore the value to avoid affecting the
102 * core cpufreq framework's own calculation.
104 unsigned long save_lpj = loops_per_jiffy;
106 loops_per_jiffy = save_lpj;
108 #endif /* DEBUG_FREQ */
110 /* Switch CPU speed under 750FX CPU control
112 static int cpu_750fx_cpu_speed(int low_speed)
116 if (low_speed == 0) {
117 /* ramping up, set voltage first */
118 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
119 /* Make sure we sleep for at least 1ms */
122 /* tweak L2 for high voltage */
124 hid2 = mfspr(SPRN_HID2);
126 mtspr(SPRN_HID2, hid2);
130 low_choose_750fx_pll(low_speed);
132 if (low_speed == 1) {
133 /* tweak L2 for low voltage */
135 hid2 = mfspr(SPRN_HID2);
137 mtspr(SPRN_HID2, hid2);
140 /* ramping down, set voltage last */
141 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
148 static unsigned int cpu_750fx_get_cpu_speed(void)
150 if (mfspr(SPRN_HID1) & HID1_PS)
156 /* Switch CPU speed using DFS */
157 static int dfs_set_cpu_speed(int low_speed)
159 if (low_speed == 0) {
160 /* ramping up, set voltage first */
161 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
162 /* Make sure we sleep for at least 1ms */
168 low_choose_7447a_dfs(low_speed);
172 if (low_speed == 1) {
173 /* ramping down, set voltage last */
174 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
181 static unsigned int dfs_get_cpu_speed(void)
183 if (mfspr(SPRN_HID1) & HID1_DFS)
190 /* Switch CPU speed using slewing GPIOs
192 static int gpios_set_cpu_speed(int low_speed)
194 int gpio, timeout = 0;
196 /* If ramping up, set voltage first */
197 if (low_speed == 0) {
198 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
199 /* Delay is way too big but it's ok, we schedule */
204 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
205 if (low_speed == ((gpio & 0x01) == 0))
208 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
209 low_speed ? 0x04 : 0x05);
215 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
216 } while((gpio & 0x02) == 0);
218 /* If ramping down, set voltage last */
219 if (low_speed == 1) {
220 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
221 /* Delay is way too big but it's ok, we schedule */
226 debug_calc_bogomips();
232 /* Switch CPU speed under PMU control
234 static int pmu_set_cpu_speed(int low_speed)
236 struct adb_request req;
237 unsigned long save_l2cr;
238 unsigned long save_l3cr;
239 unsigned int pic_prio;
245 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
249 /* Disable all interrupt sources on openpic */
250 pic_prio = mpic_cpu_get_priority();
251 mpic_cpu_set_priority(0xf);
253 /* Make sure the decrementer won't interrupt us */
254 asm volatile("mtdec %0" : : "r" (0x7fffffff));
255 /* Make sure any pending DEC interrupt occurring while we did
256 * the above didn't re-enable the DEC */
258 asm volatile("mtdec %0" : : "r" (0x7fffffff));
260 /* We can now disable MSR_EE */
261 local_irq_save(flags);
263 /* Giveup the FPU & vec */
266 #ifdef CONFIG_ALTIVEC
267 if (cpu_has_feature(CPU_FTR_ALTIVEC))
268 enable_kernel_altivec();
269 #endif /* CONFIG_ALTIVEC */
271 /* Save & disable L2 and L3 caches */
272 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
273 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
275 /* Send the new speed command. My assumption is that this command
276 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
278 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
279 while (!req.complete)
282 /* Prepare the northbridge for the speed transition */
283 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
285 /* Call low level code to backup CPU state and recover from
290 /* Restore the northbridge */
291 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
293 /* Restore L2 cache */
294 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
295 _set_L2CR(save_l2cr);
296 /* Restore L3 cache */
297 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
298 _set_L3CR(save_l3cr);
300 /* Restore userland MMU context */
301 switch_mmu_context(NULL, current->active_mm);
304 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
307 /* Restore low level PMU operations */
311 * Restore decrementer; we'll take a decrementer interrupt
312 * as soon as interrupts are re-enabled and the generic
313 * clockevents code will reprogram it with the right value.
317 /* Restore interrupts */
318 mpic_cpu_set_priority(pic_prio);
320 /* Let interrupts flow again ... */
321 local_irq_restore(flags);
324 debug_calc_bogomips();
334 static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)
337 static unsigned long prev_l3cr;
339 if (speed_mode == CPUFREQ_LOW &&
340 cpu_has_feature(CPU_FTR_L3CR)) {
342 if (l3cr & L3CR_L3E) {
347 set_speed_proc(speed_mode == CPUFREQ_LOW);
348 if (speed_mode == CPUFREQ_HIGH &&
349 cpu_has_feature(CPU_FTR_L3CR)) {
351 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
352 _set_L3CR(prev_l3cr);
354 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
359 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
364 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
369 rc = do_set_cpu_speed(policy, index);
371 ppc_proc_freq = cur_freq * 1000ul;
375 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
377 return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
380 static u32 read_gpio(struct device_node *np)
382 const u32 *reg = of_get_property(np, "reg", NULL);
387 /* That works for all keylargos but shall be fixed properly
388 * some day... The problem is that it seems we can't rely
389 * on the "reg" property of the GPIO nodes, they are either
390 * relative to the base of KeyLargo or to the base of the
391 * GPIO space, and the device-tree doesn't help.
394 if (offset < KEYLARGO_GPIO_LEVELS0)
395 offset += KEYLARGO_GPIO_LEVELS0;
399 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
401 /* Ok, this could be made a bit smarter, but let's be robust for now. We
402 * always force a speed change to high speed before sleep, to make sure
403 * we have appropriate voltage and/or bus speed for the wakeup process,
404 * and to make sure our loops_per_jiffies are "good enough", that is will
405 * not cause too short delays if we sleep in low speed and wake in high
409 sleep_freq = cur_freq;
410 if (cur_freq == low_freq && !is_pmu_based)
411 do_set_cpu_speed(policy, CPUFREQ_HIGH);
415 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
417 /* If we resume, first check if we have a get() function */
419 cur_freq = get_speed_proc();
423 /* We don't, hrm... we don't really know our speed here, best
424 * is that we force a switch to whatever it was, which is
425 * probably high speed due to our suspend() routine
427 do_set_cpu_speed(policy, sleep_freq == low_freq ?
428 CPUFREQ_LOW : CPUFREQ_HIGH);
430 ppc_proc_freq = cur_freq * 1000ul;
436 static struct cpufreq_driver pmac_cpufreq_driver = {
437 .verify = cpufreq_generic_frequency_table_verify,
438 .target_index = pmac_cpufreq_target,
439 .get = pmac_cpufreq_get_speed,
440 .init = pmac_cpufreq_cpu_init,
441 .suspend = pmac_cpufreq_suspend,
442 .resume = pmac_cpufreq_resume,
443 .flags = CPUFREQ_PM_NO_WARN,
444 .attr = cpufreq_generic_attr,
449 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
451 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
453 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
455 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
460 * Check to see if it's GPIO driven or PMU only
462 * The way we extract the GPIO address is slightly hackish, but it
463 * works well enough for now. We need to abstract the whole GPIO
464 * stuff sooner or later anyway
468 voltage_gpio = read_gpio(volt_gpio_np);
470 frequency_gpio = read_gpio(freq_gpio_np);
471 if (slew_done_gpio_np)
472 slew_done_gpio = read_gpio(slew_done_gpio_np);
474 /* If we use the frequency GPIOs, calculate the min/max speeds based
475 * on the bus frequencies
477 if (frequency_gpio && slew_done_gpio) {
479 const u32 *freqs, *ratio;
481 freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
483 if (freqs == NULL || lenp != 2) {
484 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
487 ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
490 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
494 /* Get the min/max bus frequencies */
495 low_freq = min(freqs[0], freqs[1]);
496 hi_freq = max(freqs[0], freqs[1]);
498 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
499 * frequency, it claims it to be around 84Mhz on some models while
500 * it appears to be approx. 101Mhz on all. Let's hack around here...
501 * fortunately, we don't need to be too precise
503 if (low_freq < 98000000)
504 low_freq = 101000000;
506 /* Convert those to CPU core clocks */
507 low_freq = (low_freq * (*ratio)) / 2000;
508 hi_freq = (hi_freq * (*ratio)) / 2000;
510 /* Now we get the frequencies, we read the GPIO to see what is out current
513 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
514 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
516 set_speed_proc = gpios_set_cpu_speed;
520 /* If we use the PMU, look for the min & max frequencies in the
523 value = of_get_property(cpunode, "min-clock-frequency", NULL);
526 low_freq = (*value) / 1000;
527 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
529 if (low_freq < 100000)
532 value = of_get_property(cpunode, "max-clock-frequency", NULL);
535 hi_freq = (*value) / 1000;
536 set_speed_proc = pmu_set_cpu_speed;
542 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
544 struct device_node *volt_gpio_np;
546 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
549 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
551 voltage_gpio = read_gpio(volt_gpio_np);
552 of_node_put(volt_gpio_np);
554 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
558 /* OF only reports the high frequency */
560 low_freq = cur_freq/2;
562 /* Read actual frequency from CPU */
563 cur_freq = dfs_get_cpu_speed();
564 set_speed_proc = dfs_set_cpu_speed;
565 get_speed_proc = dfs_get_cpu_speed;
570 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
572 struct device_node *volt_gpio_np;
576 if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
580 value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
583 low_freq = (*value) / 1000;
585 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
587 voltage_gpio = read_gpio(volt_gpio_np);
589 of_node_put(volt_gpio_np);
590 pvr = mfspr(SPRN_PVR);
591 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
593 set_speed_proc = cpu_750fx_cpu_speed;
594 get_speed_proc = cpu_750fx_get_cpu_speed;
595 cur_freq = cpu_750fx_get_cpu_speed();
600 /* Currently, we support the following machines:
602 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
603 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
604 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
605 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
606 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
607 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
608 * - Recent MacRISC3 laptops
609 * - All new machines with 7447A CPUs
611 static int __init pmac_cpufreq_setup(void)
613 struct device_node *cpunode;
616 if (strstr(boot_command_line, "nocpufreq"))
619 /* Get first CPU node */
620 cpunode = of_cpu_device_node_get(0);
624 /* Get current cpu clock freq */
625 value = of_get_property(cpunode, "clock-frequency", NULL);
628 cur_freq = (*value) / 1000;
629 transition_latency = CPUFREQ_ETERNAL;
631 /* Check for 7447A based MacRISC3 */
632 if (of_machine_is_compatible("MacRISC3") &&
633 of_get_property(cpunode, "dynamic-power-step", NULL) &&
634 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
635 pmac_cpufreq_init_7447A(cpunode);
636 transition_latency = 8000000;
637 /* Check for other MacRISC3 machines */
638 } else if (of_machine_is_compatible("PowerBook3,4") ||
639 of_machine_is_compatible("PowerBook3,5") ||
640 of_machine_is_compatible("MacRISC3")) {
641 pmac_cpufreq_init_MacRISC3(cpunode);
642 /* Else check for iBook2 500/600 */
643 } else if (of_machine_is_compatible("PowerBook4,1")) {
646 set_speed_proc = pmu_set_cpu_speed;
649 /* Else check for TiPb 550 */
650 else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
653 set_speed_proc = pmu_set_cpu_speed;
656 /* Else check for TiPb 400 & 500 */
657 else if (of_machine_is_compatible("PowerBook3,2")) {
658 /* We only know about the 400 MHz and the 500Mhz model
659 * they both have 300 MHz as low frequency
661 if (cur_freq < 350000 || cur_freq > 550000)
665 set_speed_proc = pmu_set_cpu_speed;
668 /* Else check for 750FX */
669 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
670 pmac_cpufreq_init_750FX(cpunode);
672 of_node_put(cpunode);
673 if (set_speed_proc == NULL)
676 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
677 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
678 ppc_proc_freq = cur_freq * 1000ul;
680 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
681 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
682 low_freq/1000, hi_freq/1000, cur_freq/1000);
684 return cpufreq_register_driver(&pmac_cpufreq_driver);
687 module_init(pmac_cpufreq_setup);