GNU Linux-libre 5.19-rc6-gnu
[releases.git] / drivers / cpufreq / cpufreq-dt-platdev.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2016 Linaro.
4  * Viresh Kumar <viresh.kumar@linaro.org>
5  */
6
7 #include <linux/err.h>
8 #include <linux/of.h>
9 #include <linux/of_device.h>
10 #include <linux/platform_device.h>
11
12 #include "cpufreq-dt.h"
13
14 /*
15  * Machines for which the cpufreq device is *always* created, mostly used for
16  * platforms using "operating-points" (V1) property.
17  */
18 static const struct of_device_id allowlist[] __initconst = {
19         { .compatible = "allwinner,sun4i-a10", },
20         { .compatible = "allwinner,sun5i-a10s", },
21         { .compatible = "allwinner,sun5i-a13", },
22         { .compatible = "allwinner,sun5i-r8", },
23         { .compatible = "allwinner,sun6i-a31", },
24         { .compatible = "allwinner,sun6i-a31s", },
25         { .compatible = "allwinner,sun7i-a20", },
26         { .compatible = "allwinner,sun8i-a23", },
27         { .compatible = "allwinner,sun8i-a83t", },
28         { .compatible = "allwinner,sun8i-h3", },
29
30         { .compatible = "apm,xgene-shadowcat", },
31
32         { .compatible = "arm,integrator-ap", },
33         { .compatible = "arm,integrator-cp", },
34
35         { .compatible = "hisilicon,hi3660", },
36
37         { .compatible = "fsl,imx27", },
38         { .compatible = "fsl,imx51", },
39         { .compatible = "fsl,imx53", },
40
41         { .compatible = "marvell,berlin", },
42         { .compatible = "marvell,pxa250", },
43         { .compatible = "marvell,pxa270", },
44
45         { .compatible = "samsung,exynos3250", },
46         { .compatible = "samsung,exynos4210", },
47         { .compatible = "samsung,exynos5250", },
48 #ifndef CONFIG_BL_SWITCHER
49         { .compatible = "samsung,exynos5800", },
50 #endif
51
52         { .compatible = "renesas,emev2", },
53         { .compatible = "renesas,r7s72100", },
54         { .compatible = "renesas,r8a73a4", },
55         { .compatible = "renesas,r8a7740", },
56         { .compatible = "renesas,r8a7742", },
57         { .compatible = "renesas,r8a7743", },
58         { .compatible = "renesas,r8a7744", },
59         { .compatible = "renesas,r8a7745", },
60         { .compatible = "renesas,r8a7778", },
61         { .compatible = "renesas,r8a7779", },
62         { .compatible = "renesas,r8a7790", },
63         { .compatible = "renesas,r8a7791", },
64         { .compatible = "renesas,r8a7792", },
65         { .compatible = "renesas,r8a7793", },
66         { .compatible = "renesas,r8a7794", },
67         { .compatible = "renesas,sh73a0", },
68
69         { .compatible = "rockchip,rk2928", },
70         { .compatible = "rockchip,rk3036", },
71         { .compatible = "rockchip,rk3066a", },
72         { .compatible = "rockchip,rk3066b", },
73         { .compatible = "rockchip,rk3188", },
74         { .compatible = "rockchip,rk3228", },
75         { .compatible = "rockchip,rk3288", },
76         { .compatible = "rockchip,rk3328", },
77         { .compatible = "rockchip,rk3366", },
78         { .compatible = "rockchip,rk3368", },
79         { .compatible = "rockchip,rk3399",
80           .data = &(struct cpufreq_dt_platform_data)
81                 { .have_governor_per_policy = true, },
82         },
83
84         { .compatible = "st-ericsson,u8500", },
85         { .compatible = "st-ericsson,u8540", },
86         { .compatible = "st-ericsson,u9500", },
87         { .compatible = "st-ericsson,u9540", },
88
89         { .compatible = "ti,omap2", },
90         { .compatible = "ti,omap4", },
91         { .compatible = "ti,omap5", },
92
93         { .compatible = "xlnx,zynq-7000", },
94         { .compatible = "xlnx,zynqmp", },
95
96         { }
97 };
98
99 /*
100  * Machines for which the cpufreq device is *not* created, mostly used for
101  * platforms using "operating-points-v2" property.
102  */
103 static const struct of_device_id blocklist[] __initconst = {
104         { .compatible = "allwinner,sun50i-h6", },
105
106         { .compatible = "arm,vexpress", },
107
108         { .compatible = "calxeda,highbank", },
109         { .compatible = "calxeda,ecx-2000", },
110
111         { .compatible = "fsl,imx7ulp", },
112         { .compatible = "fsl,imx7d", },
113         { .compatible = "fsl,imx7s", },
114         { .compatible = "fsl,imx8mq", },
115         { .compatible = "fsl,imx8mm", },
116         { .compatible = "fsl,imx8mn", },
117         { .compatible = "fsl,imx8mp", },
118
119         { .compatible = "marvell,armadaxp", },
120
121         { .compatible = "mediatek,mt2701", },
122         { .compatible = "mediatek,mt2712", },
123         { .compatible = "mediatek,mt7622", },
124         { .compatible = "mediatek,mt7623", },
125         { .compatible = "mediatek,mt8167", },
126         { .compatible = "mediatek,mt817x", },
127         { .compatible = "mediatek,mt8173", },
128         { .compatible = "mediatek,mt8176", },
129         { .compatible = "mediatek,mt8183", },
130         { .compatible = "mediatek,mt8186", },
131         { .compatible = "mediatek,mt8365", },
132         { .compatible = "mediatek,mt8516", },
133
134         { .compatible = "nvidia,tegra20", },
135         { .compatible = "nvidia,tegra30", },
136         { .compatible = "nvidia,tegra124", },
137         { .compatible = "nvidia,tegra210", },
138
139         { .compatible = "qcom,apq8096", },
140         { .compatible = "qcom,msm8996", },
141         { .compatible = "qcom,qcs404", },
142         { .compatible = "qcom,sa8155p" },
143         { .compatible = "qcom,sa8540p" },
144         { .compatible = "qcom,sc7180", },
145         { .compatible = "qcom,sc7280", },
146         { .compatible = "qcom,sc8180x", },
147         { .compatible = "qcom,sc8280xp", },
148         { .compatible = "qcom,sdm845", },
149         { .compatible = "qcom,sm6350", },
150         { .compatible = "qcom,sm8150", },
151         { .compatible = "qcom,sm8250", },
152         { .compatible = "qcom,sm8350", },
153
154         { .compatible = "st,stih407", },
155         { .compatible = "st,stih410", },
156         { .compatible = "st,stih418", },
157
158         { .compatible = "ti,am33xx", },
159         { .compatible = "ti,am43", },
160         { .compatible = "ti,dra7", },
161         { .compatible = "ti,omap3", },
162
163         { .compatible = "qcom,ipq8064", },
164         { .compatible = "qcom,apq8064", },
165         { .compatible = "qcom,msm8974", },
166         { .compatible = "qcom,msm8960", },
167
168         { }
169 };
170
171 static bool __init cpu0_node_has_opp_v2_prop(void)
172 {
173         struct device_node *np = of_cpu_device_node_get(0);
174         bool ret = false;
175
176         if (of_get_property(np, "operating-points-v2", NULL))
177                 ret = true;
178
179         of_node_put(np);
180         return ret;
181 }
182
183 static int __init cpufreq_dt_platdev_init(void)
184 {
185         struct device_node *np = of_find_node_by_path("/");
186         const struct of_device_id *match;
187         const void *data = NULL;
188
189         if (!np)
190                 return -ENODEV;
191
192         match = of_match_node(allowlist, np);
193         if (match) {
194                 data = match->data;
195                 goto create_pdev;
196         }
197
198         if (cpu0_node_has_opp_v2_prop() && !of_match_node(blocklist, np))
199                 goto create_pdev;
200
201         of_node_put(np);
202         return -ENODEV;
203
204 create_pdev:
205         of_node_put(np);
206         return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
207                                -1, data,
208                                sizeof(struct cpufreq_dt_platform_data)));
209 }
210 core_initcall(cpufreq_dt_platdev_init);