1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * acpi-cpufreq.c - ACPI Processor P-States Driver
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/smp.h>
17 #include <linux/sched.h>
18 #include <linux/cpufreq.h>
19 #include <linux/compiler.h>
20 #include <linux/dmi.h>
21 #include <linux/slab.h>
23 #include <linux/acpi.h>
25 #include <linux/delay.h>
26 #include <linux/uaccess.h>
28 #include <acpi/processor.h>
29 #include <acpi/cppc_acpi.h>
32 #include <asm/processor.h>
33 #include <asm/cpufeature.h>
34 #include <asm/cpu_device_id.h>
36 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
37 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
38 MODULE_LICENSE("GPL");
41 UNDEFINED_CAPABLE = 0,
42 SYSTEM_INTEL_MSR_CAPABLE,
43 SYSTEM_AMD_MSR_CAPABLE,
47 #define INTEL_MSR_RANGE (0xffff)
48 #define AMD_MSR_RANGE (0x7)
49 #define HYGON_MSR_RANGE (0x7)
51 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
53 struct acpi_cpufreq_data {
55 unsigned int cpu_feature;
56 unsigned int acpi_perf_cpu;
57 cpumask_var_t freqdomain_cpus;
58 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
59 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
62 /* acpi_perf_data is a pointer to percpu data. */
63 static struct acpi_processor_performance __percpu *acpi_perf_data;
65 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
67 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
70 static struct cpufreq_driver acpi_cpufreq_driver;
72 static unsigned int acpi_pstate_strict;
74 static bool boost_state(unsigned int cpu)
79 switch (boot_cpu_data.x86_vendor) {
80 case X86_VENDOR_INTEL:
81 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
82 msr = lo | ((u64)hi << 32);
83 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
84 case X86_VENDOR_HYGON:
86 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
87 msr = lo | ((u64)hi << 32);
88 return !(msr & MSR_K7_HWCR_CPB_DIS);
93 static int boost_set_msr(bool enable)
98 switch (boot_cpu_data.x86_vendor) {
99 case X86_VENDOR_INTEL:
100 msr_addr = MSR_IA32_MISC_ENABLE;
101 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
103 case X86_VENDOR_HYGON:
105 msr_addr = MSR_K7_HWCR;
106 msr_mask = MSR_K7_HWCR_CPB_DIS;
112 rdmsrl(msr_addr, val);
119 wrmsrl(msr_addr, val);
123 static void boost_set_msr_each(void *p_en)
125 bool enable = (bool) p_en;
127 boost_set_msr(enable);
130 static int set_boost(struct cpufreq_policy *policy, int val)
132 on_each_cpu_mask(policy->cpus, boost_set_msr_each,
133 (void *)(long)val, 1);
134 pr_debug("CPU %*pbl: Core Boosting %sabled.\n",
135 cpumask_pr_args(policy->cpus), val ? "en" : "dis");
140 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
142 struct acpi_cpufreq_data *data = policy->driver_data;
147 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
150 cpufreq_freq_attr_ro(freqdomain_cpus);
152 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
153 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
157 unsigned int val = 0;
159 if (!acpi_cpufreq_driver.set_boost)
162 ret = kstrtouint(buf, 10, &val);
167 set_boost(policy, val);
173 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
175 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
178 cpufreq_freq_attr_rw(cpb);
181 static int check_est_cpu(unsigned int cpuid)
183 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
185 return cpu_has(cpu, X86_FEATURE_EST);
188 static int check_amd_hwpstate_cpu(unsigned int cpuid)
190 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
192 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
195 static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
197 struct acpi_cpufreq_data *data = policy->driver_data;
198 struct acpi_processor_performance *perf;
201 perf = to_perf_data(data);
203 for (i = 0; i < perf->state_count; i++) {
204 if (value == perf->states[i].status)
205 return policy->freq_table[i].frequency;
210 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
212 struct acpi_cpufreq_data *data = policy->driver_data;
213 struct cpufreq_frequency_table *pos;
214 struct acpi_processor_performance *perf;
216 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
217 msr &= AMD_MSR_RANGE;
218 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
219 msr &= HYGON_MSR_RANGE;
221 msr &= INTEL_MSR_RANGE;
223 perf = to_perf_data(data);
225 cpufreq_for_each_entry(pos, policy->freq_table)
226 if (msr == perf->states[pos->driver_data].status)
227 return pos->frequency;
228 return policy->freq_table[0].frequency;
231 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
233 struct acpi_cpufreq_data *data = policy->driver_data;
235 switch (data->cpu_feature) {
236 case SYSTEM_INTEL_MSR_CAPABLE:
237 case SYSTEM_AMD_MSR_CAPABLE:
238 return extract_msr(policy, val);
239 case SYSTEM_IO_CAPABLE:
240 return extract_io(policy, val);
246 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
248 u32 val, dummy __always_unused;
250 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
254 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
258 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
259 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
260 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
263 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
265 u32 val, dummy __always_unused;
267 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
271 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
273 wrmsr(MSR_AMD_PERF_CTL, val, 0);
276 static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
280 acpi_os_read_port(reg->address, &val, reg->bit_width);
284 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
286 acpi_os_write_port(reg->address, val, reg->bit_width);
290 struct acpi_pct_register *reg;
293 void (*write)(struct acpi_pct_register *reg, u32 val);
294 u32 (*read)(struct acpi_pct_register *reg);
298 /* Called via smp_call_function_single(), on the target CPU */
299 static void do_drv_read(void *_cmd)
301 struct drv_cmd *cmd = _cmd;
303 cmd->val = cmd->func.read(cmd->reg);
306 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
308 struct acpi_processor_performance *perf = to_perf_data(data);
309 struct drv_cmd cmd = {
310 .reg = &perf->control_register,
311 .func.read = data->cpu_freq_read,
315 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
316 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
320 /* Called via smp_call_function_many(), on the target CPUs */
321 static void do_drv_write(void *_cmd)
323 struct drv_cmd *cmd = _cmd;
325 cmd->func.write(cmd->reg, cmd->val);
328 static void drv_write(struct acpi_cpufreq_data *data,
329 const struct cpumask *mask, u32 val)
331 struct acpi_processor_performance *perf = to_perf_data(data);
332 struct drv_cmd cmd = {
333 .reg = &perf->control_register,
335 .func.write = data->cpu_freq_write,
339 this_cpu = get_cpu();
340 if (cpumask_test_cpu(this_cpu, mask))
343 smp_call_function_many(mask, do_drv_write, &cmd, 1);
347 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
351 if (unlikely(cpumask_empty(mask)))
354 val = drv_read(data, mask);
356 pr_debug("%s = %u\n", __func__, val);
361 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
363 struct acpi_cpufreq_data *data;
364 struct cpufreq_policy *policy;
366 unsigned int cached_freq;
368 pr_debug("%s (%d)\n", __func__, cpu);
370 policy = cpufreq_cpu_get_raw(cpu);
371 if (unlikely(!policy))
374 data = policy->driver_data;
375 if (unlikely(!data || !policy->freq_table))
378 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
379 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
380 if (freq != cached_freq) {
382 * The dreaded BIOS frequency change behind our back.
383 * Force set the frequency on next target call.
388 pr_debug("cur freq = %u\n", freq);
393 static unsigned int check_freqs(struct cpufreq_policy *policy,
394 const struct cpumask *mask, unsigned int freq)
396 struct acpi_cpufreq_data *data = policy->driver_data;
397 unsigned int cur_freq;
400 for (i = 0; i < 100; i++) {
401 cur_freq = extract_freq(policy, get_cur_val(mask, data));
402 if (cur_freq == freq)
409 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
412 struct acpi_cpufreq_data *data = policy->driver_data;
413 struct acpi_processor_performance *perf;
414 const struct cpumask *mask;
415 unsigned int next_perf_state = 0; /* Index into perf table */
418 if (unlikely(!data)) {
422 perf = to_perf_data(data);
423 next_perf_state = policy->freq_table[index].driver_data;
424 if (perf->state == next_perf_state) {
425 if (unlikely(data->resume)) {
426 pr_debug("Called after resume, resetting to P%d\n",
430 pr_debug("Already at target state (P%d)\n",
437 * The core won't allow CPUs to go away until the governor has been
438 * stopped, so we can rely on the stability of policy->cpus.
440 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
441 cpumask_of(policy->cpu) : policy->cpus;
443 drv_write(data, mask, perf->states[next_perf_state].control);
445 if (acpi_pstate_strict) {
446 if (!check_freqs(policy, mask,
447 policy->freq_table[index].frequency)) {
448 pr_debug("%s (%d)\n", __func__, policy->cpu);
454 perf->state = next_perf_state;
459 static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
460 unsigned int target_freq)
462 struct acpi_cpufreq_data *data = policy->driver_data;
463 struct acpi_processor_performance *perf;
464 struct cpufreq_frequency_table *entry;
465 unsigned int next_perf_state, next_freq, index;
468 * Find the closest frequency above target_freq.
470 if (policy->cached_target_freq == target_freq)
471 index = policy->cached_resolved_idx;
473 index = cpufreq_table_find_index_dl(policy, target_freq,
476 entry = &policy->freq_table[index];
477 next_freq = entry->frequency;
478 next_perf_state = entry->driver_data;
480 perf = to_perf_data(data);
481 if (perf->state == next_perf_state) {
482 if (unlikely(data->resume))
488 data->cpu_freq_write(&perf->control_register,
489 perf->states[next_perf_state].control);
490 perf->state = next_perf_state;
495 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
497 struct acpi_processor_performance *perf;
499 perf = to_perf_data(data);
501 /* search the closest match to cpu_khz */
504 unsigned long freqn = perf->states[0].core_frequency * 1000;
506 for (i = 0; i < (perf->state_count-1); i++) {
508 freqn = perf->states[i+1].core_frequency * 1000;
509 if ((2 * cpu_khz) > (freqn + freq)) {
514 perf->state = perf->state_count-1;
517 /* assume CPU is at P0... */
519 return perf->states[0].core_frequency * 1000;
523 static void free_acpi_perf_data(void)
527 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
528 for_each_possible_cpu(i)
529 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
531 free_percpu(acpi_perf_data);
534 static int cpufreq_boost_online(unsigned int cpu)
537 * On the CPU_UP path we simply keep the boost-disable flag
538 * in sync with the current global state.
540 return boost_set_msr(acpi_cpufreq_driver.boost_enabled);
543 static int cpufreq_boost_down_prep(unsigned int cpu)
546 * Clear the boost-disable bit on the CPU_DOWN path so that
547 * this cpu cannot block the remaining ones from boosting.
549 return boost_set_msr(1);
553 * acpi_cpufreq_early_init - initialize ACPI P-States library
555 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
556 * in order to determine correct frequency and voltage pairings. We can
557 * do _PDC and _PSD and find out the processor dependency for the
558 * actual init that will happen later...
560 static int __init acpi_cpufreq_early_init(void)
563 pr_debug("%s\n", __func__);
565 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
566 if (!acpi_perf_data) {
567 pr_debug("Memory allocation error for acpi_perf_data.\n");
570 for_each_possible_cpu(i) {
571 if (!zalloc_cpumask_var_node(
572 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
573 GFP_KERNEL, cpu_to_node(i))) {
575 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
576 free_acpi_perf_data();
581 /* Do initialization in ACPI core */
582 acpi_processor_preregister_performance(acpi_perf_data);
588 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
589 * or do it in BIOS firmware and won't inform about it to OS. If not
590 * detected, this has a side effect of making CPU run at a different speed
591 * than OS intended it to run at. Detect it and handle it cleanly.
593 static int bios_with_sw_any_bug;
595 static int sw_any_bug_found(const struct dmi_system_id *d)
597 bios_with_sw_any_bug = 1;
601 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
603 .callback = sw_any_bug_found,
604 .ident = "Supermicro Server X6DLP",
606 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
607 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
608 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
614 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
616 /* Intel Xeon Processor 7100 Series Specification Update
617 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf
618 * AL30: A Machine Check Exception (MCE) Occurring during an
619 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
620 * Both Processor Cores to Lock Up. */
621 if (c->x86_vendor == X86_VENDOR_INTEL) {
622 if ((c->x86 == 15) &&
623 (c->x86_model == 6) &&
624 (c->x86_stepping == 8)) {
625 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
633 #ifdef CONFIG_ACPI_CPPC_LIB
634 static u64 get_max_boost_ratio(unsigned int cpu)
636 struct cppc_perf_caps perf_caps;
637 u64 highest_perf, nominal_perf;
640 if (acpi_pstate_strict)
643 ret = cppc_get_perf_caps(cpu, &perf_caps);
645 pr_debug("CPU%d: Unable to get performance capabilities (%d)\n",
650 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
651 highest_perf = amd_get_highest_perf();
653 highest_perf = perf_caps.highest_perf;
655 nominal_perf = perf_caps.nominal_perf;
657 if (!highest_perf || !nominal_perf) {
658 pr_debug("CPU%d: highest or nominal performance missing\n", cpu);
662 if (highest_perf < nominal_perf) {
663 pr_debug("CPU%d: nominal performance above highest\n", cpu);
667 return div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf);
670 static inline u64 get_max_boost_ratio(unsigned int cpu) { return 0; }
673 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
675 struct cpufreq_frequency_table *freq_table;
676 struct acpi_processor_performance *perf;
677 struct acpi_cpufreq_data *data;
678 unsigned int cpu = policy->cpu;
679 struct cpuinfo_x86 *c = &cpu_data(cpu);
680 unsigned int valid_states = 0;
681 unsigned int result = 0;
685 static int blacklisted;
688 pr_debug("%s\n", __func__);
693 blacklisted = acpi_cpufreq_blacklist(c);
698 data = kzalloc(sizeof(*data), GFP_KERNEL);
702 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
707 perf = per_cpu_ptr(acpi_perf_data, cpu);
708 data->acpi_perf_cpu = cpu;
709 policy->driver_data = data;
711 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
712 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
714 result = acpi_processor_register_performance(perf, cpu);
718 policy->shared_type = perf->shared_type;
721 * Will let policy->cpus know about dependency only when software
722 * coordination is required.
724 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
725 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
726 cpumask_copy(policy->cpus, perf->shared_cpu_map);
728 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
731 dmi_check_system(sw_any_bug_dmi_table);
732 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
733 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
734 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
737 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 &&
738 !acpi_pstate_strict) {
739 cpumask_clear(policy->cpus);
740 cpumask_set_cpu(cpu, policy->cpus);
741 cpumask_copy(data->freqdomain_cpus,
742 topology_sibling_cpumask(cpu));
743 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
744 pr_info_once("overriding BIOS provided _PSD data\n");
748 /* capability check */
749 if (perf->state_count <= 1) {
750 pr_debug("No P-States\n");
755 if (perf->control_register.space_id != perf->status_register.space_id) {
760 switch (perf->control_register.space_id) {
761 case ACPI_ADR_SPACE_SYSTEM_IO:
762 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
763 boot_cpu_data.x86 == 0xf) {
764 pr_debug("AMD K8 systems must use native drivers.\n");
768 pr_debug("SYSTEM IO addr space\n");
769 data->cpu_feature = SYSTEM_IO_CAPABLE;
770 data->cpu_freq_read = cpu_freq_read_io;
771 data->cpu_freq_write = cpu_freq_write_io;
773 case ACPI_ADR_SPACE_FIXED_HARDWARE:
774 pr_debug("HARDWARE addr space\n");
775 if (check_est_cpu(cpu)) {
776 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
777 data->cpu_freq_read = cpu_freq_read_intel;
778 data->cpu_freq_write = cpu_freq_write_intel;
781 if (check_amd_hwpstate_cpu(cpu)) {
782 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
783 data->cpu_freq_read = cpu_freq_read_amd;
784 data->cpu_freq_write = cpu_freq_write_amd;
790 pr_debug("Unknown addr space %d\n",
791 (u32) (perf->control_register.space_id));
796 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
803 /* detect transition latency */
804 policy->cpuinfo.transition_latency = 0;
805 for (i = 0; i < perf->state_count; i++) {
806 if ((perf->states[i].transition_latency * 1000) >
807 policy->cpuinfo.transition_latency)
808 policy->cpuinfo.transition_latency =
809 perf->states[i].transition_latency * 1000;
812 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
813 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
814 policy->cpuinfo.transition_latency > 20 * 1000) {
815 policy->cpuinfo.transition_latency = 20 * 1000;
816 pr_info_once("P-state transition latency capped at 20 uS\n");
820 for (i = 0; i < perf->state_count; i++) {
821 if (i > 0 && perf->states[i].core_frequency >=
822 freq_table[valid_states-1].frequency / 1000)
825 freq_table[valid_states].driver_data = i;
826 freq_table[valid_states].frequency =
827 perf->states[i].core_frequency * 1000;
830 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
832 max_boost_ratio = get_max_boost_ratio(cpu);
833 if (max_boost_ratio) {
834 unsigned int freq = freq_table[0].frequency;
837 * Because the loop above sorts the freq_table entries in the
838 * descending order, freq is the maximum frequency in the table.
839 * Assume that it corresponds to the CPPC nominal frequency and
840 * use it to set cpuinfo.max_freq.
842 policy->cpuinfo.max_freq = freq * max_boost_ratio >> SCHED_CAPACITY_SHIFT;
845 * If the maximum "boost" frequency is unknown, ask the arch
846 * scale-invariance code to use the "nominal" performance for
847 * CPU utilization scaling so as to prevent the schedutil
848 * governor from selecting inadequate CPU frequencies.
850 arch_set_max_freq_ratio(true);
853 policy->freq_table = freq_table;
856 switch (perf->control_register.space_id) {
857 case ACPI_ADR_SPACE_SYSTEM_IO:
859 * The core will not set policy->cur, because
860 * cpufreq_driver->get is NULL, so we need to set it here.
861 * However, we have to guess it, because the current speed is
862 * unknown and not detectable via IO ports.
864 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
866 case ACPI_ADR_SPACE_FIXED_HARDWARE:
867 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
873 /* notify BIOS that we exist */
874 acpi_processor_notify_smm(THIS_MODULE);
876 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
877 for (i = 0; i < perf->state_count; i++)
878 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
879 (i == perf->state ? '*' : ' '), i,
880 (u32) perf->states[i].core_frequency,
881 (u32) perf->states[i].power,
882 (u32) perf->states[i].transition_latency);
885 * the first call to ->target() should result in us actually
886 * writing something to the appropriate registers.
890 policy->fast_switch_possible = !acpi_pstate_strict &&
891 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
893 if (perf->states[0].core_frequency * 1000 != freq_table[0].frequency)
894 pr_warn(FW_WARN "P-state 0 is not max freq\n");
899 acpi_processor_unregister_performance(cpu);
901 free_cpumask_var(data->freqdomain_cpus);
904 policy->driver_data = NULL;
909 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
911 struct acpi_cpufreq_data *data = policy->driver_data;
913 pr_debug("%s\n", __func__);
915 policy->fast_switch_possible = false;
916 policy->driver_data = NULL;
917 acpi_processor_unregister_performance(data->acpi_perf_cpu);
918 free_cpumask_var(data->freqdomain_cpus);
919 kfree(policy->freq_table);
925 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
927 struct acpi_cpufreq_data *data = policy->driver_data;
929 pr_debug("%s\n", __func__);
936 static struct freq_attr *acpi_cpufreq_attr[] = {
937 &cpufreq_freq_attr_scaling_available_freqs,
939 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
945 static struct cpufreq_driver acpi_cpufreq_driver = {
946 .verify = cpufreq_generic_frequency_table_verify,
947 .target_index = acpi_cpufreq_target,
948 .fast_switch = acpi_cpufreq_fast_switch,
949 .bios_limit = acpi_processor_get_bios_limit,
950 .init = acpi_cpufreq_cpu_init,
951 .exit = acpi_cpufreq_cpu_exit,
952 .resume = acpi_cpufreq_resume,
953 .name = "acpi-cpufreq",
954 .attr = acpi_cpufreq_attr,
957 static enum cpuhp_state acpi_cpufreq_online;
959 static void __init acpi_cpufreq_boost_init(void)
963 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) {
964 pr_debug("Boost capabilities not present in the processor\n");
968 acpi_cpufreq_driver.set_boost = set_boost;
969 acpi_cpufreq_driver.boost_enabled = boost_state(0);
972 * This calls the online callback on all online cpu and forces all
973 * MSRs to the same value.
975 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online",
976 cpufreq_boost_online, cpufreq_boost_down_prep);
978 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n");
981 acpi_cpufreq_online = ret;
984 static void acpi_cpufreq_boost_exit(void)
986 if (acpi_cpufreq_online > 0)
987 cpuhp_remove_state_nocalls(acpi_cpufreq_online);
990 static int __init acpi_cpufreq_init(void)
997 /* don't keep reloading if cpufreq_driver exists */
998 if (cpufreq_get_current_driver())
1001 pr_debug("%s\n", __func__);
1003 ret = acpi_cpufreq_early_init();
1007 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
1008 /* this is a sysfs file with a strange name and an even stranger
1009 * semantic - per CPU instantiation, but system global effect.
1010 * Lets enable it only on AMD CPUs for compatibility reasons and
1011 * only if configured. This is considered legacy code, which
1012 * will probably be removed at some point in the future.
1014 if (!check_amd_hwpstate_cpu(0)) {
1015 struct freq_attr **attr;
1017 pr_debug("CPB unsupported, do not expose it\n");
1019 for (attr = acpi_cpufreq_attr; *attr; attr++)
1020 if (*attr == &cpb) {
1026 acpi_cpufreq_boost_init();
1028 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
1030 free_acpi_perf_data();
1031 acpi_cpufreq_boost_exit();
1036 static void __exit acpi_cpufreq_exit(void)
1038 pr_debug("%s\n", __func__);
1040 acpi_cpufreq_boost_exit();
1042 cpufreq_unregister_driver(&acpi_cpufreq_driver);
1044 free_acpi_perf_data();
1047 module_param(acpi_pstate_strict, uint, 0644);
1048 MODULE_PARM_DESC(acpi_pstate_strict,
1049 "value 0 or non-zero. non-zero -> strict ACPI checks are "
1050 "performed during frequency changes.");
1052 late_initcall(acpi_cpufreq_init);
1053 module_exit(acpi_cpufreq_exit);
1055 static const struct x86_cpu_id __maybe_unused acpi_cpufreq_ids[] = {
1056 X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL),
1057 X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL),
1060 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1062 static const struct acpi_device_id __maybe_unused processor_device_ids[] = {
1063 {ACPI_PROCESSOR_OBJECT_HID, },
1064 {ACPI_PROCESSOR_DEVICE_HID, },
1067 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1069 MODULE_ALIAS("acpi");