2 * i8253 PIT clocksource
4 #include <linux/clockchips.h>
5 #include <linux/init.h>
7 #include <linux/spinlock.h>
8 #include <linux/timex.h>
9 #include <linux/module.h>
10 #include <linux/i8253.h>
11 #include <linux/smp.h>
14 * Protects access to I/O ports
16 * 0040-0043 : timer0, i8253 / i8254
17 * 0061-0061 : NMI Control Register which contains two speaker control bits.
19 DEFINE_RAW_SPINLOCK(i8253_lock);
20 EXPORT_SYMBOL(i8253_lock);
23 * Handle PIT quirk in pit_shutdown() where zeroing the counter register
24 * restarts the PIT, negating the shutdown. On platforms with the quirk,
25 * platform specific code can set this to false.
27 bool i8253_clear_counter_on_shutdown __ro_after_init = true;
29 #ifdef CONFIG_CLKSRC_I8253
31 * Since the PIT overflows every tick, its not very useful
32 * to just read by itself. So use jiffies to emulate a free
35 static cycle_t i8253_read(struct clocksource *cs)
43 raw_spin_lock_irqsave(&i8253_lock, flags);
45 * Although our caller may have the read side of jiffies_lock,
46 * this is now a seqlock, and we are cheating in this routine
47 * by having side effects on state that we cannot undo if
48 * there is a collision on the seqlock and our caller has to
49 * retry. (Namely, old_jifs and old_count.) So we must treat
50 * jiffies as volatile despite the lock. We read jiffies
51 * before latching the timer count to guarantee that although
52 * the jiffies value might be older than the count (that is,
53 * the counter may underflow between the last point where
54 * jiffies was incremented and the point where we latch the
55 * count), it cannot be newer.
58 outb_p(0x00, PIT_MODE); /* latch the count ASAP */
59 count = inb_p(PIT_CH0); /* read the latched count */
60 count |= inb_p(PIT_CH0) << 8;
62 /* VIA686a test code... reset the latch if count > max + 1 */
63 if (count > PIT_LATCH) {
64 outb_p(0x34, PIT_MODE);
65 outb_p(PIT_LATCH & 0xff, PIT_CH0);
66 outb_p(PIT_LATCH >> 8, PIT_CH0);
67 count = PIT_LATCH - 1;
71 * It's possible for count to appear to go the wrong way for a
74 * 1. The timer counter underflows, but we haven't handled the
75 * resulting interrupt and incremented jiffies yet.
76 * 2. Hardware problem with the timer, not giving us continuous time,
77 * the counter does small "jumps" upwards on some Pentium systems,
78 * (see c't 95/10 page 335 for Neptun bug.)
80 * Previous attempts to handle these cases intelligently were
81 * buggy, so we just do the simple thing now.
83 if (count > old_count && jifs == old_jifs)
89 raw_spin_unlock_irqrestore(&i8253_lock, flags);
91 count = (PIT_LATCH - 1) - count;
93 return (cycle_t)(jifs * PIT_LATCH) + count;
96 static struct clocksource i8253_cs = {
100 .mask = CLOCKSOURCE_MASK(32),
103 int __init clocksource_i8253_init(void)
105 return clocksource_register_hz(&i8253_cs, PIT_TICK_RATE);
109 #ifdef CONFIG_CLKEVT_I8253
110 static int pit_shutdown(struct clock_event_device *evt)
112 if (!clockevent_state_oneshot(evt) && !clockevent_state_periodic(evt))
115 raw_spin_lock(&i8253_lock);
117 outb_p(0x30, PIT_MODE);
119 if (i8253_clear_counter_on_shutdown) {
124 raw_spin_unlock(&i8253_lock);
128 static int pit_set_oneshot(struct clock_event_device *evt)
130 raw_spin_lock(&i8253_lock);
131 outb_p(0x38, PIT_MODE);
132 raw_spin_unlock(&i8253_lock);
136 static int pit_set_periodic(struct clock_event_device *evt)
138 raw_spin_lock(&i8253_lock);
140 /* binary, mode 2, LSB/MSB, ch 0 */
141 outb_p(0x34, PIT_MODE);
142 outb_p(PIT_LATCH & 0xff, PIT_CH0); /* LSB */
143 outb_p(PIT_LATCH >> 8, PIT_CH0); /* MSB */
145 raw_spin_unlock(&i8253_lock);
150 * Program the next event in oneshot mode
152 * Delta is given in PIT ticks
154 static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
156 raw_spin_lock(&i8253_lock);
157 outb_p(delta & 0xff , PIT_CH0); /* LSB */
158 outb_p(delta >> 8 , PIT_CH0); /* MSB */
159 raw_spin_unlock(&i8253_lock);
165 * On UP the PIT can serve all of the possible timer functions. On SMP systems
166 * it can be solely used for the global tick.
168 struct clock_event_device i8253_clockevent = {
170 .features = CLOCK_EVT_FEAT_PERIODIC,
171 .set_state_shutdown = pit_shutdown,
172 .set_state_periodic = pit_set_periodic,
173 .set_next_event = pit_next_event,
177 * Initialize the conversion factor and the min/max deltas of the clock event
178 * structure and register the clock event source with the framework.
180 void __init clockevent_i8253_init(bool oneshot)
183 i8253_clockevent.features |= CLOCK_EVT_FEAT_ONESHOT;
184 i8253_clockevent.set_state_oneshot = pit_set_oneshot;
187 * Start pit with the boot cpu mask. x86 might make it global
188 * when it is used as broadcast device later.
190 i8253_clockevent.cpumask = cpumask_of(smp_processor_id());
192 clockevents_config_and_register(&i8253_clockevent, PIT_TICK_RATE,