1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2016-2018 Xilinx
6 #ifndef __LINUX_CLK_ZYNQMP_H_
7 #define __LINUX_CLK_ZYNQMP_H_
9 #include <linux/spinlock.h>
11 #include <linux/firmware/xlnx-zynqmp.h>
24 * struct clock_topology - Clock topology
25 * @type: Type of topology
26 * @flag: Topology flags
27 * @type_flag: Topology type specific flag
29 struct clock_topology {
36 struct clk_hw *zynqmp_clk_register_pll(const char *name, u32 clk_id,
37 const char * const *parents,
39 const struct clock_topology *nodes);
41 struct clk_hw *zynqmp_clk_register_gate(const char *name, u32 clk_id,
42 const char * const *parents,
44 const struct clock_topology *nodes);
46 struct clk_hw *zynqmp_clk_register_divider(const char *name,
48 const char * const *parents,
50 const struct clock_topology *nodes);
52 struct clk_hw *zynqmp_clk_register_mux(const char *name, u32 clk_id,
53 const char * const *parents,
55 const struct clock_topology *nodes);
57 struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name,
59 const char * const *parents,
61 const struct clock_topology *nodes);