1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2015 Linaro Ltd.
4 * Copyright (C) 2014 ZTE Corporation.
9 #include <linux/clk-provider.h>
10 #include <linux/spinlock.h>
12 #define PNAME(x) static const char *x[]
14 struct zx_pll_config {
22 void __iomem *reg_base;
23 const struct zx_pll_config *lookup_table; /* order by rate asc */
26 u8 pd_bit; /* power down bit */
27 u8 lock_bit; /* pll lock flag bit */
30 #define PLL_RATE(_rate, _cfg0, _cfg1) \
37 #define ZX_PLL(_name, _parent, _reg, _table, _pd, _lock) \
39 .reg_base = (void __iomem *) _reg, \
40 .lookup_table = _table, \
41 .count = ARRAY_SIZE(_table), \
44 .hw.init = CLK_HW_INIT(_name, _parent, &zx_pll_ops, \
45 CLK_GET_RATE_NOCACHE), \
49 * The pd_bit is not available on ZX296718, so let's pass something
50 * bigger than 31, e.g. 0xff, to indicate that.
52 #define ZX296718_PLL(_name, _parent, _reg, _table) \
53 ZX_PLL(_name, _parent, _reg, _table, 0xff, 30)
60 #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags) \
63 .reg = (void __iomem *) _reg, \
67 .hw.init = CLK_HW_INIT(_name, \
70 _flag | CLK_IGNORE_UNUSED), \
75 struct zx_clk_fixed_factor {
76 struct clk_fixed_factor factor;
80 #define FFACTOR(_id, _name, _parent, _mult, _div, _flag) \
85 .hw.init = CLK_HW_INIT(_name, \
87 &clk_fixed_factor_ops, \
98 #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag) \
101 .reg = (void __iomem *) _reg, \
102 .mask = BIT(_width) - 1, \
106 .hw.init = CLK_HW_INIT_PARENTS(_name, \
114 #define MUX(_id, _name, _parent, _reg, _shift, _width) \
115 MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0)
118 struct clk_divider div;
122 #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table) \
125 .reg = (void __iomem *) _reg, \
131 .hw.init = CLK_HW_INIT(_name, \
139 struct clk_zx_audio_divider {
141 void __iomem *reg_base;
142 unsigned int rate_count;
147 #define AUDIO_DIV(_id, _name, _parent, _reg) \
149 .reg_base = (void __iomem *) _reg, \
151 .hw.init = CLK_HW_INIT(_name, \
158 struct clk *clk_register_zx_pll(const char *name, const char *parent_name,
159 unsigned long flags, void __iomem *reg_base,
160 const struct zx_pll_config *lookup_table, int count, spinlock_t *lock);
162 struct clk_zx_audio {
164 void __iomem *reg_base;
167 struct clk *clk_register_zx_audio(const char *name,
168 const char * const parent_name,
169 unsigned long flags, void __iomem *reg_base);
171 extern const struct clk_ops zx_pll_ops;
172 extern const struct clk_ops zx_audio_div_ops;