2 * Copyright 2015 Linaro Ltd.
3 * Copyright (C) 2014 ZTE Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
12 #include <linux/clk-provider.h>
13 #include <linux/spinlock.h>
15 #define PNAME(x) static const char *x[]
17 #define CLK_HW_INIT(_name, _parent, _ops, _flags) \
18 &(struct clk_init_data) { \
21 .parent_names = (const char *[]) { _parent }, \
26 #define CLK_HW_INIT_PARENTS(_name, _parents, _ops, _flags) \
27 &(struct clk_init_data) { \
30 .parent_names = _parents, \
31 .num_parents = ARRAY_SIZE(_parents), \
35 struct zx_pll_config {
43 void __iomem *reg_base;
44 const struct zx_pll_config *lookup_table; /* order by rate asc */
47 u8 pd_bit; /* power down bit */
48 u8 lock_bit; /* pll lock flag bit */
51 #define PLL_RATE(_rate, _cfg0, _cfg1) \
58 #define ZX_PLL(_name, _parent, _reg, _table, _pd, _lock) \
60 .reg_base = (void __iomem *) _reg, \
61 .lookup_table = _table, \
62 .count = ARRAY_SIZE(_table), \
65 .hw.init = CLK_HW_INIT(_name, _parent, &zx_pll_ops, \
66 CLK_GET_RATE_NOCACHE), \
69 #define ZX296718_PLL(_name, _parent, _reg, _table) \
70 ZX_PLL(_name, _parent, _reg, _table, 0, 30)
77 #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags) \
80 .reg = (void __iomem *) _reg, \
84 .hw.init = CLK_HW_INIT(_name, \
87 _flag | CLK_IGNORE_UNUSED), \
92 struct zx_clk_fixed_factor {
93 struct clk_fixed_factor factor;
97 #define FFACTOR(_id, _name, _parent, _mult, _div, _flag) \
102 .hw.init = CLK_HW_INIT(_name, \
104 &clk_fixed_factor_ops, \
115 #define MUX_F(_id, _name, _parent, _reg, _shift, _width, _flag, _mflag) \
118 .reg = (void __iomem *) _reg, \
119 .mask = BIT(_width) - 1, \
123 .hw.init = CLK_HW_INIT_PARENTS(_name, \
131 #define MUX(_id, _name, _parent, _reg, _shift, _width) \
132 MUX_F(_id, _name, _parent, _reg, _shift, _width, 0, 0)
135 struct clk_divider div;
139 #define DIV_T(_id, _name, _parent, _reg, _shift, _width, _flag, _table) \
142 .reg = (void __iomem *) _reg, \
148 .hw.init = CLK_HW_INIT(_name, \
156 struct clk *clk_register_zx_pll(const char *name, const char *parent_name,
157 unsigned long flags, void __iomem *reg_base,
158 const struct zx_pll_config *lookup_table, int count, spinlock_t *lock);
160 struct clk_zx_audio {
162 void __iomem *reg_base;
165 struct clk *clk_register_zx_audio(const char *name,
166 const char * const parent_name,
167 unsigned long flags, void __iomem *reg_base);
169 extern const struct clk_ops zx_pll_ops;