1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides IDs for clocks common between several Tegra SoCs
5 #ifndef _TEGRA_CLK_ID_H
6 #define _TEGRA_CLK_ID_H
94 tegra_clk_hda2codec_2x,
95 tegra_clk_hda2codec_2x_8,
147 tegra_clk_pll_a_out0,
153 tegra_clk_pll_c4_out0,
154 tegra_clk_pll_c4_out1,
155 tegra_clk_pll_c4_out2,
156 tegra_clk_pll_c4_out3,
157 tegra_clk_pll_c_out1,
160 tegra_clk_pll_d2_out0,
161 tegra_clk_pll_d_out0,
163 tegra_clk_pll_e_out0,
166 tegra_clk_pll_m_out1,
169 tegra_clk_pll_p_out1,
170 tegra_clk_pll_p_out2,
171 tegra_clk_pll_p_out2_int,
172 tegra_clk_pll_p_out3,
173 tegra_clk_pll_p_out4,
174 tegra_clk_pll_p_out4_cpu,
175 tegra_clk_pll_p_out5,
176 tegra_clk_pll_p_out_hsio,
177 tegra_clk_pll_p_out_xusb,
178 tegra_clk_pll_p_out_cpu,
179 tegra_clk_pll_p_out_adsp,
181 tegra_clk_pll_re_out,
182 tegra_clk_pll_re_vco,
185 tegra_clk_pll_u_out1,
186 tegra_clk_pll_u_out2,
188 tegra_clk_pll_u_480m,
192 tegra_clk_pll_x_out0,
200 tegra_clk_sata_oob_8,
218 tegra_clk_sdmmc_legacy,
232 tegra_clk_soc_therm_8,
240 tegra_clk_spdif_in_8,
241 tegra_clk_spdif_in_sync,
264 tegra_clk_usb2_hsic_trk,
280 tegra_clk_vimclk_sync,
282 tegra_clk_vi_sensor_8,
283 tegra_clk_vi_sensor_9,
284 tegra_clk_vi_sensor2,
285 tegra_clk_vi_sensor2_8,
287 tegra_clk_xusb_dev_src,
288 tegra_clk_xusb_dev_src_8,
289 tegra_clk_xusb_falcon_src,
290 tegra_clk_xusb_falcon_src_8,
291 tegra_clk_xusb_fs_src,
294 tegra_clk_xusb_host_src,
295 tegra_clk_xusb_host_src_8,
296 tegra_clk_xusb_hs_src,
297 tegra_clk_xusb_hs_src_4,
299 tegra_clk_xusb_ss_src,
300 tegra_clk_xusb_ss_src_8,
301 tegra_clk_xusb_ss_div2,
302 tegra_clk_xusb_ssp_src,
310 tegra_clk_dmic1_sync_clk,
311 tegra_clk_dmic2_sync_clk,
312 tegra_clk_dmic3_sync_clk,
313 tegra_clk_dmic1_sync_clk_mux,
314 tegra_clk_dmic2_sync_clk_mux,
315 tegra_clk_dmic3_sync_clk_mux,
318 tegra_clk_pll_a_out_adsp,
319 tegra_clk_pll_a_out0_out_adsp,
325 #endif /* _TEGRA_CLK_ID_H */