drivers/clk/socfpga/Makefile

   1 # SPDX-License-Identifier: GPL-2.0
   2 obj-$(CONFIG_CLK_INTEL_SOCFPGA32) += clk.o clk-gate.o clk-pll.o clk-periph.o \
   3                                      clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
   4 obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \
   5                                      clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \
   6                                      clk-agilex.o