1 # SPDX-License-Identifier: GPL-2.0
4 bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
5 default y if ARCH_RENESAS
6 select CLK_EMEV2 if ARCH_EMEV2
7 select CLK_RZA1 if ARCH_R7S72100
8 select CLK_R7S9210 if ARCH_R7S9210
9 select CLK_R8A73A4 if ARCH_R8A73A4
10 select CLK_R8A7740 if ARCH_R8A7740
11 select CLK_R8A7742 if ARCH_R8A7742
12 select CLK_R8A7743 if ARCH_R8A7743 || ARCH_R8A7744
13 select CLK_R8A7745 if ARCH_R8A7745
14 select CLK_R8A77470 if ARCH_R8A77470
15 select CLK_R8A774A1 if ARCH_R8A774A1
16 select CLK_R8A774B1 if ARCH_R8A774B1
17 select CLK_R8A774C0 if ARCH_R8A774C0
18 select CLK_R8A774E1 if ARCH_R8A774E1
19 select CLK_R8A7778 if ARCH_R8A7778
20 select CLK_R8A7779 if ARCH_R8A7779
21 select CLK_R8A7790 if ARCH_R8A7790
22 select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
23 select CLK_R8A7792 if ARCH_R8A7792
24 select CLK_R8A7794 if ARCH_R8A7794
25 select CLK_R8A7795 if ARCH_R8A77951
26 select CLK_R8A77960 if ARCH_R8A77960
27 select CLK_R8A77961 if ARCH_R8A77961
28 select CLK_R8A77965 if ARCH_R8A77965
29 select CLK_R8A77970 if ARCH_R8A77970
30 select CLK_R8A77980 if ARCH_R8A77980
31 select CLK_R8A77990 if ARCH_R8A77990
32 select CLK_R8A77995 if ARCH_R8A77995
33 select CLK_R8A779A0 if ARCH_R8A779A0
34 select CLK_R8A779F0 if ARCH_R8A779F0
35 select CLK_R8A779G0 if ARCH_R8A779G0
36 select CLK_R9A06G032 if ARCH_R9A06G032
37 select CLK_R9A07G043 if ARCH_R9A07G043
38 select CLK_R9A07G044 if ARCH_R9A07G044
39 select CLK_R9A07G054 if ARCH_R9A07G054
40 select CLK_R9A08G045 if ARCH_R9A08G045
41 select CLK_R9A09G011 if ARCH_R9A09G011
42 select CLK_SH73A0 if ARCH_SH73A0
48 bool "Emma Mobile EV2 clock support" if COMPILE_TEST
51 bool "RZ/A1H clock support" if COMPILE_TEST
52 select CLK_RENESAS_CPG_MSTP
55 bool "RZ/A2 clock support" if COMPILE_TEST
56 select CLK_RENESAS_CPG_MSSR
59 bool "R-Mobile APE6 clock support" if COMPILE_TEST
60 select CLK_RENESAS_CPG_MSTP
61 select CLK_RENESAS_DIV6
64 bool "R-Mobile A1 clock support" if COMPILE_TEST
65 select CLK_RENESAS_CPG_MSTP
66 select CLK_RENESAS_DIV6
69 bool "RZ/G1H clock support" if COMPILE_TEST
70 select CLK_RCAR_GEN2_CPG
73 bool "RZ/G1M clock support" if COMPILE_TEST
74 select CLK_RCAR_GEN2_CPG
77 bool "RZ/G1E clock support" if COMPILE_TEST
78 select CLK_RCAR_GEN2_CPG
81 bool "RZ/G1C clock support" if COMPILE_TEST
82 select CLK_RCAR_GEN2_CPG
85 bool "RZ/G2M clock support" if COMPILE_TEST
86 select CLK_RCAR_GEN3_CPG
89 bool "RZ/G2N clock support" if COMPILE_TEST
90 select CLK_RCAR_GEN3_CPG
93 bool "RZ/G2E clock support" if COMPILE_TEST
94 select CLK_RCAR_GEN3_CPG
97 bool "RZ/G2H clock support" if COMPILE_TEST
98 select CLK_RCAR_GEN3_CPG
101 bool "R-Car M1A clock support" if COMPILE_TEST
102 select CLK_RENESAS_CPG_MSTP
105 bool "R-Car H1 clock support" if COMPILE_TEST
106 select CLK_RENESAS_CPG_MSTP
109 bool "R-Car H2 clock support" if COMPILE_TEST
110 select CLK_RCAR_GEN2_CPG
113 bool "R-Car M2-W/N clock support" if COMPILE_TEST
114 select CLK_RCAR_GEN2_CPG
117 bool "R-Car V2H clock support" if COMPILE_TEST
118 select CLK_RCAR_GEN2_CPG
121 bool "R-Car E2 clock support" if COMPILE_TEST
122 select CLK_RCAR_GEN2_CPG
125 bool "R-Car H3 clock support" if COMPILE_TEST
126 select CLK_RCAR_GEN3_CPG
129 bool "R-Car M3-W clock support" if COMPILE_TEST
130 select CLK_RCAR_GEN3_CPG
133 bool "R-Car M3-W+ clock support" if COMPILE_TEST
134 select CLK_RCAR_GEN3_CPG
137 bool "R-Car M3-N clock support" if COMPILE_TEST
138 select CLK_RCAR_GEN3_CPG
141 bool "R-Car V3M clock support" if COMPILE_TEST
142 select CLK_RCAR_GEN3_CPG
145 bool "R-Car V3H clock support" if COMPILE_TEST
146 select CLK_RCAR_GEN3_CPG
149 bool "R-Car E3 clock support" if COMPILE_TEST
150 select CLK_RCAR_GEN3_CPG
153 bool "R-Car D3 clock support" if COMPILE_TEST
154 select CLK_RCAR_GEN3_CPG
157 bool "R-Car V3U clock support" if COMPILE_TEST
158 select CLK_RCAR_GEN4_CPG
161 bool "R-Car S4-8 clock support" if COMPILE_TEST
162 select CLK_RCAR_GEN4_CPG
165 bool "R-Car V4H clock support" if COMPILE_TEST
166 select CLK_RCAR_GEN4_CPG
169 bool "RZ/N1D clock support" if COMPILE_TEST
172 bool "RZ/G2UL clock support" if COMPILE_TEST
176 bool "RZ/G2L clock support" if COMPILE_TEST
180 bool "RZ/V2L clock support" if COMPILE_TEST
184 bool "RZ/G3S clock support" if COMPILE_TEST
188 bool "RZ/V2M clock support" if COMPILE_TEST
192 bool "SH-Mobile AG5 clock support" if COMPILE_TEST
193 select CLK_RENESAS_CPG_MSTP
194 select CLK_RENESAS_DIV6
198 config CLK_RCAR_CPG_LIB
199 bool "CPG/MSSR library functions" if COMPILE_TEST
201 config CLK_RCAR_GEN2_CPG
202 bool "R-Car Gen2 CPG clock support" if COMPILE_TEST
203 select CLK_RENESAS_CPG_MSSR
205 config CLK_RCAR_GEN3_CPG
206 bool "R-Car Gen3 and RZ/G2 CPG clock support" if COMPILE_TEST
207 select CLK_RCAR_CPG_LIB
208 select CLK_RENESAS_CPG_MSSR
210 config CLK_RCAR_GEN4_CPG
211 bool "R-Car Gen4 clock support" if COMPILE_TEST
212 select CLK_RCAR_CPG_LIB
213 select CLK_RENESAS_CPG_MSSR
215 config CLK_RCAR_USB2_CLOCK_SEL
216 bool "Renesas R-Car USB2 clock selector support"
217 depends on ARCH_RENESAS || COMPILE_TEST
218 select RESET_CONTROLLER
220 This is a driver for R-Car USB2 clock selector
223 bool "Renesas RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST
224 select RESET_CONTROLLER
227 config CLK_RENESAS_CPG_MSSR
228 bool "CPG/MSSR clock support" if COMPILE_TEST
229 select CLK_RENESAS_DIV6
231 config CLK_RENESAS_CPG_MSTP
232 bool "MSTP clock support" if COMPILE_TEST
234 config CLK_RENESAS_DIV6
235 bool "DIV6 clock support" if COMPILE_TEST