1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2015, 2017-2018, 2022, The Linux Foundation. All rights reserved.
6 #ifndef __QCOM_GDSC_H__
7 #define __QCOM_GDSC_H__
10 #include <linux/pm_domain.h>
14 struct reset_controller_dev;
17 * struct gdsc - Globally Distributed Switch Controller
18 * @pd: generic power domain
19 * @regmap: regmap for MMIO accesses
20 * @gdscr: gsdc control register
21 * @gds_hw_ctrl: gds_hw_ctrl register
22 * @cxcs: offsets of branch registers to toggle mem/periph bits in
23 * @cxc_count: number of @cxcs
24 * @pwrsts: Possible powerdomain power states
25 * @en_rest_wait_val: transition delay value for receiving enr ack signal
26 * @en_few_wait_val: transition delay value for receiving enf ack signal
27 * @clk_dis_wait_val: transition delay value for halting clock
28 * @resets: ids of resets associated with this gdsc
29 * @reset_count: number of @resets
30 * @rcdev: reset controller
33 struct generic_pm_domain pd;
34 struct generic_pm_domain *parent;
35 struct regmap *regmap;
37 unsigned int gds_hw_ctrl;
38 unsigned int clamp_io_ctrl;
40 unsigned int cxc_count;
41 unsigned int en_rest_wait_val;
42 unsigned int en_few_wait_val;
43 unsigned int clk_dis_wait_val;
45 /* Powerdomain allowable state bitfields */
46 #define PWRSTS_OFF BIT(0)
47 #define PWRSTS_RET BIT(1)
48 #define PWRSTS_ON BIT(2)
49 #define PWRSTS_OFF_ON (PWRSTS_OFF | PWRSTS_ON)
50 #define PWRSTS_RET_ON (PWRSTS_RET | PWRSTS_ON)
52 #define VOTABLE BIT(0)
53 #define CLAMP_IO BIT(1)
54 #define HW_CTRL BIT(2)
55 #define SW_RESET BIT(3)
56 #define AON_RESET BIT(4)
57 #define POLL_CFG_GDSCR BIT(5)
58 #define ALWAYS_ON BIT(6)
59 #define RETAIN_FF_ENABLE BIT(7)
60 #define NO_RET_PERIPH BIT(8)
61 struct reset_controller_dev *rcdev;
63 unsigned int reset_count;
66 struct regulator *rsupply;
75 #ifdef CONFIG_QCOM_GDSC
76 int gdsc_register(struct gdsc_desc *desc, struct reset_controller_dev *,
78 void gdsc_unregister(struct gdsc_desc *desc);
79 int gdsc_gx_do_nothing_enable(struct generic_pm_domain *domain);
81 static inline int gdsc_register(struct gdsc_desc *desc,
82 struct reset_controller_dev *rcdev,
88 static inline void gdsc_unregister(struct gdsc_desc *desc) {};
89 #endif /* CONFIG_QCOM_GDSC */
90 #endif /* __QCOM_GDSC_H__ */