1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
6 #include <linux/export.h>
7 #include <linux/module.h>
8 #include <linux/regmap.h>
9 #include <linux/platform_device.h>
10 #include <linux/clk-provider.h>
11 #include <linux/reset-controller.h>
16 #include "clk-regmap.h"
21 struct qcom_reset_controller reset;
22 struct clk_regmap **rclks;
27 struct freq_tbl *qcom_find_freq(const struct freq_tbl *f, unsigned long rate)
39 /* Default to our fastest rate */
42 EXPORT_SYMBOL_GPL(qcom_find_freq);
44 const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
47 const struct freq_tbl *best = NULL;
49 for ( ; f->freq; f++) {
58 EXPORT_SYMBOL_GPL(qcom_find_freq_floor);
60 int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
62 int i, num_parents = clk_hw_get_num_parents(hw);
64 for (i = 0; i < num_parents; i++)
65 if (src == map[i].src)
70 EXPORT_SYMBOL_GPL(qcom_find_src_index);
72 int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map, u8 cfg)
74 int i, num_parents = clk_hw_get_num_parents(hw);
76 for (i = 0; i < num_parents; i++)
77 if (cfg == map[i].cfg)
82 EXPORT_SYMBOL_GPL(qcom_find_cfg_index);
85 qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
89 struct device *dev = &pdev->dev;
91 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
92 base = devm_ioremap_resource(dev, res);
94 return ERR_CAST(base);
96 return devm_regmap_init_mmio(dev, base, desc->config);
98 EXPORT_SYMBOL_GPL(qcom_cc_map);
101 qcom_pll_set_fsm_mode(struct regmap *map, u32 reg, u8 bias_count, u8 lock_count)
106 /* De-assert reset to FSM */
107 regmap_update_bits(map, reg, PLL_VOTE_FSM_RESET, 0);
109 /* Program bias count and lock count */
110 val = bias_count << PLL_BIAS_COUNT_SHIFT |
111 lock_count << PLL_LOCK_COUNT_SHIFT;
112 mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT;
113 mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT;
114 regmap_update_bits(map, reg, mask, val);
116 /* Enable PLL FSM voting */
117 regmap_update_bits(map, reg, PLL_VOTE_FSM_ENA, PLL_VOTE_FSM_ENA);
119 EXPORT_SYMBOL_GPL(qcom_pll_set_fsm_mode);
121 static void qcom_cc_gdsc_unregister(void *data)
123 gdsc_unregister(data);
127 * Backwards compatibility with old DTs. Register a pass-through factor 1/1
128 * clock to translate 'path' clk into 'name' clk and register the 'path'
129 * clk as a fixed rate clock if it isn't present.
131 static int _qcom_cc_register_board_clk(struct device *dev, const char *path,
132 const char *name, unsigned long rate,
135 struct device_node *node = NULL;
136 struct device_node *clocks_node;
137 struct clk_fixed_factor *factor;
138 struct clk_fixed_rate *fixed;
139 struct clk_init_data init_data = { };
142 clocks_node = of_find_node_by_path("/clocks");
144 node = of_get_child_by_name(clocks_node, path);
145 of_node_put(clocks_node);
149 fixed = devm_kzalloc(dev, sizeof(*fixed), GFP_KERNEL);
153 fixed->fixed_rate = rate;
154 fixed->hw.init = &init_data;
156 init_data.name = path;
157 init_data.ops = &clk_fixed_rate_ops;
159 ret = devm_clk_hw_register(dev, &fixed->hw);
166 factor = devm_kzalloc(dev, sizeof(*factor), GFP_KERNEL);
170 factor->mult = factor->div = 1;
171 factor->hw.init = &init_data;
173 init_data.name = name;
174 init_data.parent_names = &path;
175 init_data.num_parents = 1;
177 init_data.ops = &clk_fixed_factor_ops;
179 ret = devm_clk_hw_register(dev, &factor->hw);
187 int qcom_cc_register_board_clk(struct device *dev, const char *path,
188 const char *name, unsigned long rate)
190 bool add_factor = true;
193 * TODO: The RPM clock driver currently does not support the xo clock.
194 * When xo is added to the RPM clock driver, we should change this
195 * function to skip registration of xo factor clocks.
198 return _qcom_cc_register_board_clk(dev, path, name, rate, add_factor);
200 EXPORT_SYMBOL_GPL(qcom_cc_register_board_clk);
202 int qcom_cc_register_sleep_clk(struct device *dev)
204 return _qcom_cc_register_board_clk(dev, "sleep_clk", "sleep_clk_src",
207 EXPORT_SYMBOL_GPL(qcom_cc_register_sleep_clk);
209 /* Drop 'protected-clocks' from the list of clocks to register */
210 static void qcom_cc_drop_protected(struct device *dev, struct qcom_cc *cc)
212 struct device_node *np = dev->of_node;
213 struct property *prop;
217 of_property_for_each_u32(np, "protected-clocks", prop, p, i) {
218 if (i >= cc->num_rclks)
225 static struct clk_hw *qcom_cc_clk_hw_get(struct of_phandle_args *clkspec,
228 struct qcom_cc *cc = data;
229 unsigned int idx = clkspec->args[0];
231 if (idx >= cc->num_rclks) {
232 pr_err("%s: invalid index %u\n", __func__, idx);
233 return ERR_PTR(-EINVAL);
236 return cc->rclks[idx] ? &cc->rclks[idx]->hw : NULL;
239 int qcom_cc_really_probe(struct platform_device *pdev,
240 const struct qcom_cc_desc *desc, struct regmap *regmap)
243 struct device *dev = &pdev->dev;
244 struct qcom_reset_controller *reset;
246 struct gdsc_desc *scd;
247 size_t num_clks = desc->num_clks;
248 struct clk_regmap **rclks = desc->clks;
249 size_t num_clk_hws = desc->num_clk_hws;
250 struct clk_hw **clk_hws = desc->clk_hws;
252 cc = devm_kzalloc(dev, sizeof(*cc), GFP_KERNEL);
257 reset->rcdev.of_node = dev->of_node;
258 reset->rcdev.ops = &qcom_reset_ops;
259 reset->rcdev.owner = dev->driver->owner;
260 reset->rcdev.nr_resets = desc->num_resets;
261 reset->regmap = regmap;
262 reset->reset_map = desc->resets;
264 ret = devm_reset_controller_register(dev, &reset->rcdev);
268 if (desc->gdscs && desc->num_gdscs) {
269 scd = devm_kzalloc(dev, sizeof(*scd), GFP_KERNEL);
273 scd->scs = desc->gdscs;
274 scd->num = desc->num_gdscs;
275 ret = gdsc_register(scd, &reset->rcdev, regmap);
278 ret = devm_add_action_or_reset(dev, qcom_cc_gdsc_unregister,
285 cc->num_rclks = num_clks;
287 qcom_cc_drop_protected(dev, cc);
289 for (i = 0; i < num_clk_hws; i++) {
290 ret = devm_clk_hw_register(dev, clk_hws[i]);
295 for (i = 0; i < num_clks; i++) {
299 ret = devm_clk_register_regmap(dev, rclks[i]);
304 ret = devm_of_clk_add_hw_provider(dev, qcom_cc_clk_hw_get, cc);
310 EXPORT_SYMBOL_GPL(qcom_cc_really_probe);
312 int qcom_cc_probe(struct platform_device *pdev, const struct qcom_cc_desc *desc)
314 struct regmap *regmap;
316 regmap = qcom_cc_map(pdev, desc);
318 return PTR_ERR(regmap);
320 return qcom_cc_really_probe(pdev, desc, regmap);
322 EXPORT_SYMBOL_GPL(qcom_cc_probe);
324 int qcom_cc_probe_by_index(struct platform_device *pdev, int index,
325 const struct qcom_cc_desc *desc)
327 struct regmap *regmap;
328 struct resource *res;
331 res = platform_get_resource(pdev, IORESOURCE_MEM, index);
332 base = devm_ioremap_resource(&pdev->dev, res);
336 regmap = devm_regmap_init_mmio(&pdev->dev, base, desc->config);
338 return PTR_ERR(regmap);
340 return qcom_cc_really_probe(pdev, desc, regmap);
342 EXPORT_SYMBOL_GPL(qcom_cc_probe_by_index);
344 MODULE_LICENSE("GPL v2");