1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022 MediaTek Inc.
6 #include <dt-bindings/clock/mediatek,mt8365-clk.h>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 static const struct mtk_gate_regs venc_cg_regs = {
19 #define GATE_VENC(_id, _name, _parent, _shift) \
20 GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, \
21 &mtk_clk_gate_ops_setclr_inv)
23 static const struct mtk_gate venc_clks[] = {
25 GATE_VENC(CLK_VENC, "venc_fvenc_ck", "mm_sel", 4),
26 GATE_VENC(CLK_VENC_JPGENC, "venc_jpgenc_ck", "mm_sel", 8),
29 static const struct mtk_clk_desc venc_desc = {
31 .num_clks = ARRAY_SIZE(venc_clks),
34 static const struct of_device_id of_match_clk_mt8365_venc[] = {
36 .compatible = "mediatek,mt8365-vencsys",
42 MODULE_DEVICE_TABLE(of, of_match_clk_mt8365_venc);
44 static struct platform_driver clk_mt8365_venc_drv = {
45 .probe = mtk_clk_simple_probe,
46 .remove_new = mtk_clk_simple_remove,
48 .name = "clk-mt8365-venc",
49 .of_match_table = of_match_clk_mt8365_venc,
52 module_platform_driver(clk_mt8365_venc_drv);
53 MODULE_LICENSE("GPL");