1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2022 MediaTek Inc.
6 #include <dt-bindings/clock/mediatek,mt8365-clk.h>
7 #include <linux/clk-provider.h>
8 #include <linux/platform_device.h>
13 static const struct mtk_gate_regs apu_cg_regs = {
19 #define GATE_APU(_id, _name, _parent, _shift) \
20 GATE_MTK(_id, _name, _parent, &apu_cg_regs, _shift, \
21 &mtk_clk_gate_ops_setclr)
23 static const struct mtk_gate apu_clks[] = {
24 GATE_APU(CLK_APU_AHB, "apu_ahb", "ifr_apu_axi", 5),
25 GATE_APU(CLK_APU_EDMA, "apu_edma", "apu_sel", 4),
26 GATE_APU(CLK_APU_IF_CK, "apu_if_ck", "apu_if_sel", 3),
27 GATE_APU(CLK_APU_JTAG, "apu_jtag", "clk26m", 2),
28 GATE_APU(CLK_APU_AXI, "apu_axi", "apu_sel", 1),
29 GATE_APU(CLK_APU_IPU_CK, "apu_ck", "apu_sel", 0),
32 static const struct mtk_clk_desc apu_desc = {
34 .num_clks = ARRAY_SIZE(apu_clks),
37 static const struct of_device_id of_match_clk_mt8365_apu[] = {
39 .compatible = "mediatek,mt8365-apu",
45 MODULE_DEVICE_TABLE(of, of_match_clk_mt8365_apu);
47 static struct platform_driver clk_mt8365_apu_drv = {
48 .probe = mtk_clk_simple_probe,
49 .remove_new = mtk_clk_simple_remove,
51 .name = "clk-mt8365-apu",
52 .of_match_table = of_match_clk_mt8365_apu,
55 module_platform_driver(clk_mt8365_apu_drv);
56 MODULE_LICENSE("GPL");