2 * Copyright (c) 2014 MediaTek Inc.
3 * Author: James Liao <jamesjj.liao@mediatek.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include <linux/of_address.h>
19 #include <linux/slab.h>
20 #include <linux/delay.h>
21 #include <linux/clkdev.h>
26 static int mtk_cg_bit_is_cleared(struct clk_hw *hw)
28 struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
31 regmap_read(cg->regmap, cg->sta_ofs, &val);
38 static int mtk_cg_bit_is_set(struct clk_hw *hw)
40 struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
43 regmap_read(cg->regmap, cg->sta_ofs, &val);
50 static void mtk_cg_set_bit(struct clk_hw *hw)
52 struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
54 regmap_write(cg->regmap, cg->set_ofs, BIT(cg->bit));
57 static void mtk_cg_clr_bit(struct clk_hw *hw)
59 struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
61 regmap_write(cg->regmap, cg->clr_ofs, BIT(cg->bit));
64 static void mtk_cg_set_bit_no_setclr(struct clk_hw *hw)
66 struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
67 u32 cgbit = BIT(cg->bit);
69 regmap_update_bits(cg->regmap, cg->sta_ofs, cgbit, cgbit);
72 static void mtk_cg_clr_bit_no_setclr(struct clk_hw *hw)
74 struct mtk_clk_gate *cg = to_mtk_clk_gate(hw);
75 u32 cgbit = BIT(cg->bit);
77 regmap_update_bits(cg->regmap, cg->sta_ofs, cgbit, 0);
80 static int mtk_cg_enable(struct clk_hw *hw)
87 static void mtk_cg_disable(struct clk_hw *hw)
92 static int mtk_cg_enable_inv(struct clk_hw *hw)
99 static void mtk_cg_disable_inv(struct clk_hw *hw)
104 static int mtk_cg_enable_no_setclr(struct clk_hw *hw)
106 mtk_cg_clr_bit_no_setclr(hw);
111 static void mtk_cg_disable_no_setclr(struct clk_hw *hw)
113 mtk_cg_set_bit_no_setclr(hw);
116 static int mtk_cg_enable_inv_no_setclr(struct clk_hw *hw)
118 mtk_cg_set_bit_no_setclr(hw);
123 static void mtk_cg_disable_inv_no_setclr(struct clk_hw *hw)
125 mtk_cg_clr_bit_no_setclr(hw);
128 const struct clk_ops mtk_clk_gate_ops_setclr = {
129 .is_enabled = mtk_cg_bit_is_cleared,
130 .enable = mtk_cg_enable,
131 .disable = mtk_cg_disable,
134 const struct clk_ops mtk_clk_gate_ops_setclr_inv = {
135 .is_enabled = mtk_cg_bit_is_set,
136 .enable = mtk_cg_enable_inv,
137 .disable = mtk_cg_disable_inv,
140 const struct clk_ops mtk_clk_gate_ops_no_setclr = {
141 .is_enabled = mtk_cg_bit_is_cleared,
142 .enable = mtk_cg_enable_no_setclr,
143 .disable = mtk_cg_disable_no_setclr,
146 const struct clk_ops mtk_clk_gate_ops_no_setclr_inv = {
147 .is_enabled = mtk_cg_bit_is_set,
148 .enable = mtk_cg_enable_inv_no_setclr,
149 .disable = mtk_cg_disable_inv_no_setclr,
152 struct clk *mtk_clk_register_gate(
154 const char *parent_name,
155 struct regmap *regmap,
160 const struct clk_ops *ops)
162 struct mtk_clk_gate *cg;
164 struct clk_init_data init = {};
166 cg = kzalloc(sizeof(*cg), GFP_KERNEL);
168 return ERR_PTR(-ENOMEM);
171 init.flags = CLK_SET_RATE_PARENT;
172 init.parent_names = parent_name ? &parent_name : NULL;
173 init.num_parents = parent_name ? 1 : 0;
177 cg->set_ofs = set_ofs;
178 cg->clr_ofs = clr_ofs;
179 cg->sta_ofs = sta_ofs;
184 clk = clk_register(NULL, &cg->hw);