1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __MACH_IMX_CLK_H
3 #define __MACH_IMX_CLK_H
5 #include <linux/spinlock.h>
6 #include <linux/clk-provider.h>
8 extern spinlock_t imx_ccm_lock;
10 void imx_check_clocks(struct clk *clks[], unsigned int count);
11 void imx_register_uart_clocks(struct clk ** const clks[]);
13 extern void imx_cscmr1_fixup(u32 *val);
24 struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
25 const char *parent, void __iomem *base);
27 struct clk *imx_clk_pllv2(const char *name, const char *parent,
42 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
43 const char *parent_name, void __iomem *base, u32 div_mask);
45 struct clk *clk_register_gate2(struct device *dev, const char *name,
46 const char *parent_name, unsigned long flags,
47 void __iomem *reg, u8 bit_idx, u8 cgr_val,
48 u8 clk_gate_flags, spinlock_t *lock,
49 unsigned int *share_count);
51 struct clk * imx_obtain_fixed_clock(
52 const char *name, unsigned long rate);
54 struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
55 void __iomem *reg, u8 shift, u32 exclusive_mask);
57 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
58 void __iomem *reg, u8 idx);
60 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
61 void __iomem *reg, u8 shift, u8 width,
62 void __iomem *busy_reg, u8 busy_shift);
64 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
65 u8 width, void __iomem *busy_reg, u8 busy_shift,
66 const char * const *parent_names, int num_parents);
68 struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
69 void __iomem *reg, u8 shift, u8 width,
70 void (*fixup)(u32 *val));
72 struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
73 u8 shift, u8 width, const char * const *parents,
74 int num_parents, void (*fixup)(u32 *val));
76 static inline struct clk *imx_clk_fixed(const char *name, int rate)
78 return clk_register_fixed_rate(NULL, name, NULL, 0, rate);
81 static inline struct clk *imx_clk_mux_ldb(const char *name, void __iomem *reg,
82 u8 shift, u8 width, const char * const *parents,
85 return clk_register_mux(NULL, name, parents, num_parents,
86 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT, reg,
87 shift, width, CLK_MUX_READ_ONLY, &imx_ccm_lock);
90 static inline struct clk *imx_clk_fixed_factor(const char *name,
91 const char *parent, unsigned int mult, unsigned int div)
93 return clk_register_fixed_factor(NULL, name, parent,
94 CLK_SET_RATE_PARENT, mult, div);
97 static inline struct clk *imx_clk_divider(const char *name, const char *parent,
98 void __iomem *reg, u8 shift, u8 width)
100 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
101 reg, shift, width, 0, &imx_ccm_lock);
104 static inline struct clk *imx_clk_divider_flags(const char *name,
105 const char *parent, void __iomem *reg, u8 shift, u8 width,
108 return clk_register_divider(NULL, name, parent, flags,
109 reg, shift, width, 0, &imx_ccm_lock);
112 static inline struct clk *imx_clk_divider2(const char *name, const char *parent,
113 void __iomem *reg, u8 shift, u8 width)
115 return clk_register_divider(NULL, name, parent,
116 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
117 reg, shift, width, 0, &imx_ccm_lock);
120 static inline struct clk *imx_clk_gate(const char *name, const char *parent,
121 void __iomem *reg, u8 shift)
123 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
124 shift, 0, &imx_ccm_lock);
127 static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
128 void __iomem *reg, u8 shift)
130 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
131 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
134 static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
135 void __iomem *reg, u8 shift)
137 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
138 shift, 0x3, 0, &imx_ccm_lock, NULL);
141 static inline struct clk *imx_clk_gate2_shared(const char *name,
142 const char *parent, void __iomem *reg, u8 shift,
143 unsigned int *share_count)
145 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
146 shift, 0x3, 0, &imx_ccm_lock, share_count);
149 static inline struct clk *imx_clk_gate2_shared2(const char *name,
150 const char *parent, void __iomem *reg, u8 shift,
151 unsigned int *share_count)
153 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT |
154 CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, 0,
155 &imx_ccm_lock, share_count);
158 static inline struct clk *imx_clk_gate2_cgr(const char *name,
159 const char *parent, void __iomem *reg, u8 shift, u8 cgr_val)
161 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
162 shift, cgr_val, 0, &imx_ccm_lock, NULL);
165 static inline struct clk *imx_clk_gate3(const char *name, const char *parent,
166 void __iomem *reg, u8 shift)
168 return clk_register_gate(NULL, name, parent,
169 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
170 reg, shift, 0, &imx_ccm_lock);
173 static inline struct clk *imx_clk_gate4(const char *name, const char *parent,
174 void __iomem *reg, u8 shift)
176 return clk_register_gate2(NULL, name, parent,
177 CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE,
178 reg, shift, 0x3, 0, &imx_ccm_lock, NULL);
181 static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
182 u8 shift, u8 width, const char * const *parents,
185 return clk_register_mux(NULL, name, parents, num_parents,
186 CLK_SET_RATE_NO_REPARENT, reg, shift,
187 width, 0, &imx_ccm_lock);
190 static inline struct clk *imx_clk_mux2(const char *name, void __iomem *reg,
191 u8 shift, u8 width, const char * const *parents,
194 return clk_register_mux(NULL, name, parents, num_parents,
195 CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE,
196 reg, shift, width, 0, &imx_ccm_lock);
199 static inline struct clk *imx_clk_mux_flags(const char *name,
200 void __iomem *reg, u8 shift, u8 width,
201 const char * const *parents, int num_parents,
204 return clk_register_mux(NULL, name, parents, num_parents,
205 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
209 struct clk *imx_clk_cpu(const char *name, const char *parent_name,
210 struct clk *div, struct clk *mux, struct clk *pll,