4 #include <linux/slab.h>
5 #include <linux/spinlock.h>
8 DEFINE_SPINLOCK(imx_ccm_lock);
10 void __init imx_check_clocks(struct clk *clks[], unsigned int count)
14 for (i = 0; i < count; i++)
16 pr_err("i.MX clk %u: register failed with %ld\n",
20 static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name)
22 struct of_phandle_args phandle;
23 struct clk *clk = ERR_PTR(-ENODEV);
26 path = kasprintf(GFP_KERNEL, "/clocks/%s", name);
28 return ERR_PTR(-ENOMEM);
30 phandle.np = of_find_node_by_path(path);
34 clk = of_clk_get_from_provider(&phandle);
35 of_node_put(phandle.np);
40 struct clk * __init imx_obtain_fixed_clock(
41 const char *name, unsigned long rate)
45 clk = imx_obtain_fixed_clock_from_dt(name);
47 clk = imx_clk_fixed(name, rate);
52 * This fixups the register CCM_CSCMR1 write value.
53 * The write/read/divider values of the aclk_podf field
54 * of that register have the relationship described by
55 * the following table:
57 * write value read value divider
65 * 3b'111 3b'001 2(default)
67 * That's why we do the xor operation below.
69 #define CSCMR1_FIXUP 0x00600000
71 void imx_cscmr1_fixup(u32 *val)
77 static int imx_keep_uart_clocks __initdata;
78 static struct clk ** const *imx_uart_clocks __initdata;
80 static int __init imx_keep_uart_clocks_param(char *str)
82 imx_keep_uart_clocks = 1;
86 __setup_param("earlycon", imx_keep_uart_earlycon,
87 imx_keep_uart_clocks_param, 0);
88 __setup_param("earlyprintk", imx_keep_uart_earlyprintk,
89 imx_keep_uart_clocks_param, 0);
91 void __init imx_register_uart_clocks(struct clk ** const clks[])
93 if (imx_keep_uart_clocks) {
96 imx_uart_clocks = clks;
97 for (i = 0; imx_uart_clocks[i]; i++)
98 clk_prepare_enable(*imx_uart_clocks[i]);
102 static int __init imx_clk_disable_uart(void)
104 if (imx_keep_uart_clocks && imx_uart_clocks) {
107 for (i = 0; imx_uart_clocks[i]; i++)
108 clk_disable_unprepare(*imx_uart_clocks[i]);
113 late_initcall_sync(imx_clk_disable_uart);