1 // SPDX-License-Identifier: GPL-2.0+
4 * Dong Aisheng <aisheng.dong@nxp.com>
7 #include <linux/bits.h>
8 #include <linux/clk-provider.h>
11 #include <linux/slab.h>
12 #include <linux/spinlock.h>
16 static DEFINE_SPINLOCK(imx_lpcg_scu_lock);
18 #define CLK_GATE_SCU_LPCG_MASK 0x3
19 #define CLK_GATE_SCU_LPCG_HW_SEL BIT(0)
20 #define CLK_GATE_SCU_LPCG_SW_SEL BIT(1)
23 * struct clk_lpcg_scu - Description of LPCG clock
25 * @hw: clk_hw of this LPCG
26 * @reg: register of this LPCG clock
27 * @bit_idx: bit index of this LPCG clock
28 * @hw_gate: HW auto gate enable
30 * This structure describes one LPCG clock
39 #define to_clk_lpcg_scu(_hw) container_of(_hw, struct clk_lpcg_scu, hw)
41 static int clk_lpcg_scu_enable(struct clk_hw *hw)
43 struct clk_lpcg_scu *clk = to_clk_lpcg_scu(hw);
47 spin_lock_irqsave(&imx_lpcg_scu_lock, flags);
49 reg = readl_relaxed(clk->reg);
50 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);
52 val = CLK_GATE_SCU_LPCG_SW_SEL;
54 val |= CLK_GATE_SCU_LPCG_HW_SEL;
56 reg |= val << clk->bit_idx;
57 writel(reg, clk->reg);
59 spin_unlock_irqrestore(&imx_lpcg_scu_lock, flags);
64 static void clk_lpcg_scu_disable(struct clk_hw *hw)
66 struct clk_lpcg_scu *clk = to_clk_lpcg_scu(hw);
70 spin_lock_irqsave(&imx_lpcg_scu_lock, flags);
72 reg = readl_relaxed(clk->reg);
73 reg &= ~(CLK_GATE_SCU_LPCG_MASK << clk->bit_idx);
74 writel(reg, clk->reg);
76 spin_unlock_irqrestore(&imx_lpcg_scu_lock, flags);
79 static const struct clk_ops clk_lpcg_scu_ops = {
80 .enable = clk_lpcg_scu_enable,
81 .disable = clk_lpcg_scu_disable,
84 struct clk_hw *imx_clk_lpcg_scu(const char *name, const char *parent_name,
85 unsigned long flags, void __iomem *reg,
86 u8 bit_idx, bool hw_gate)
88 struct clk_lpcg_scu *clk;
89 struct clk_init_data init;
93 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
95 return ERR_PTR(-ENOMEM);
98 clk->bit_idx = bit_idx;
99 clk->hw_gate = hw_gate;
102 init.ops = &clk_lpcg_scu_ops;
103 init.flags = CLK_SET_RATE_PARENT | flags;
104 init.parent_names = parent_name ? &parent_name : NULL;
105 init.num_parents = parent_name ? 1 : 0;
107 clk->hw.init = &init;
110 ret = clk_hw_register(NULL, hw);