1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 * Copyright 2017~2018 NXP
8 #include <linux/bits.h>
9 #include <linux/clk-provider.h>
10 #include <linux/err.h>
11 #include <linux/slab.h>
13 #include "../clk-fractional-divider.h"
16 #define PCG_PCS_SHIFT 24
17 #define PCG_PCS_MASK 0x7
18 #define PCG_CGC_SHIFT 30
19 #define PCG_FRAC_SHIFT 3
20 #define PCG_FRAC_WIDTH 1
21 #define PCG_FRAC_MASK BIT(3)
22 #define PCG_PCD_SHIFT 0
23 #define PCG_PCD_WIDTH 3
24 #define PCG_PCD_MASK 0x7
26 struct clk_hw *imx7ulp_clk_hw_composite(const char *name,
27 const char * const *parent_names,
28 int num_parents, bool mux_present,
29 bool rate_present, bool gate_present,
32 struct clk_hw *mux_hw = NULL, *fd_hw = NULL, *gate_hw = NULL;
33 struct clk_fractional_divider *fd = NULL;
34 struct clk_gate *gate = NULL;
35 struct clk_mux *mux = NULL;
39 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
41 return ERR_PTR(-ENOMEM);
44 mux->shift = PCG_PCS_SHIFT;
45 mux->mask = PCG_PCS_MASK;
49 fd = kzalloc(sizeof(*fd), GFP_KERNEL);
52 return ERR_PTR(-ENOMEM);
56 fd->mshift = PCG_FRAC_SHIFT;
57 fd->mwidth = PCG_FRAC_WIDTH;
58 fd->mmask = PCG_FRAC_MASK;
59 fd->nshift = PCG_PCD_SHIFT;
60 fd->nwidth = PCG_PCD_WIDTH;
61 fd->nmask = PCG_PCD_MASK;
62 fd->flags = CLK_FRAC_DIVIDER_ZERO_BASED;
66 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
70 return ERR_PTR(-ENOMEM);
74 gate->bit_idx = PCG_CGC_SHIFT;
77 hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
78 mux_hw, &clk_mux_ops, fd_hw,
79 &clk_fractional_divider_ops, gate_hw,
80 &clk_gate_ops, CLK_SET_RATE_GATE |