drivers/clk/at91/clk-usb.c

   1 /*
   2  *  Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  */
  10
  11 #include <linux/clk-provider.h>
  12 #include <linux/clkdev.h>
  13 #include <linux/clk/at91_pmc.h>
  14 #include <linux/of.h>
  15 #include <linux/mfd/syscon.h>
  16 #include <linux/regmap.h>
  17
  18 #include "pmc.h"
  19
  20 #define USB_SOURCE_MAX          2
  21
  22 #define SAM9X5_USB_DIV_SHIFT    8
  23 #define SAM9X5_USB_MAX_DIV      0xf
  24
  25 #define RM9200_USB_DIV_SHIFT    28
  26 #define RM9200_USB_DIV_TAB_SIZE 4
  27
  28 struct at91sam9x5_clk_usb {
  29         struct clk_hw hw;
  30         struct regmap *regmap;
  31 };
  32
  33 #define to_at91sam9x5_clk_usb(hw) \
  34         container_of(hw, struct at91sam9x5_clk_usb, hw)
  35
  36 struct at91rm9200_clk_usb {
  37         struct clk_hw hw;
  38         struct regmap *regmap;
  39         u32 divisors[4];
  40 };
  41
  42 #define to_at91rm9200_clk_usb(hw) \
  43         container_of(hw, struct at91rm9200_clk_usb, hw)
  44
  45 static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw,
  46                                                     unsigned long parent_rate)
  47 {
  48         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
  49         unsigned int usbr;
  50         u8 usbdiv;
  51
  52         regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
  53         usbdiv = (usbr & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT;
  54
  55         return DIV_ROUND_CLOSEST(parent_rate, (usbdiv + 1));
  56 }
  57
  58 static int at91sam9x5_clk_usb_determine_rate(struct clk_hw *hw,
  59                                              struct clk_rate_request *req)
  60 {
  61         struct clk_hw *parent;
  62         long best_rate = -EINVAL;
  63         unsigned long tmp_rate;
  64         int best_diff = -1;
  65         int tmp_diff;
  66         int i;
  67
  68         for (i = 0; i < clk_hw_get_num_parents(hw); i++) {
  69                 int div;
  70
  71                 parent = clk_hw_get_parent_by_index(hw, i);
  72                 if (!parent)
  73                         continue;
  74
  75                 for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) {
  76                         unsigned long tmp_parent_rate;
  77
  78                         tmp_parent_rate = req->rate * div;
  79                         tmp_parent_rate = clk_hw_round_rate(parent,
  80                                                            tmp_parent_rate);
  81                         if (!tmp_parent_rate)
  82                                 continue;
  83
  84                         tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div);
  85                         if (tmp_rate < req->rate)
  86                                 tmp_diff = req->rate - tmp_rate;
  87                         else
  88                                 tmp_diff = tmp_rate - req->rate;
  89
  90                         if (best_diff < 0 || best_diff > tmp_diff) {
  91                                 best_rate = tmp_rate;
  92                                 best_diff = tmp_diff;
  93                                 req->best_parent_rate = tmp_parent_rate;
  94                                 req->best_parent_hw = parent;
  95                         }
  96
  97                         if (!best_diff || tmp_rate < req->rate)
  98                                 break;
  99                 }
 100
 101                 if (!best_diff)
 102                         break;
 103         }
 104
 105         if (best_rate < 0)
 106                 return best_rate;
 107
 108         req->rate = best_rate;
 109         return 0;
 110 }
 111
 112 static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index)
 113 {
 114         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
 115
 116         if (index > 1)
 117                 return -EINVAL;
 118
 119         regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
 120                            index ? AT91_PMC_USBS : 0);
 121
 122         return 0;
 123 }
 124
 125 static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw)
 126 {
 127         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
 128         unsigned int usbr;
 129
 130         regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
 131
 132         return usbr & AT91_PMC_USBS;
 133 }
 134
 135 static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
 136                                        unsigned long parent_rate)
 137 {
 138         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
 139         unsigned long div;
 140
 141         if (!rate)
 142                 return -EINVAL;
 143
 144         div = DIV_ROUND_CLOSEST(parent_rate, rate);
 145         if (div > SAM9X5_USB_MAX_DIV + 1 || !div)
 146                 return -EINVAL;
 147
 148         regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_OHCIUSBDIV,
 149                            (div - 1) << SAM9X5_USB_DIV_SHIFT);
 150
 151         return 0;
 152 }
 153
 154 static const struct clk_ops at91sam9x5_usb_ops = {
 155         .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
 156         .determine_rate = at91sam9x5_clk_usb_determine_rate,
 157         .get_parent = at91sam9x5_clk_usb_get_parent,
 158         .set_parent = at91sam9x5_clk_usb_set_parent,
 159         .set_rate = at91sam9x5_clk_usb_set_rate,
 160 };
 161
 162 static int at91sam9n12_clk_usb_enable(struct clk_hw *hw)
 163 {
 164         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
 165
 166         regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS,
 167                            AT91_PMC_USBS);
 168
 169         return 0;
 170 }
 171
 172 static void at91sam9n12_clk_usb_disable(struct clk_hw *hw)
 173 {
 174         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
 175
 176         regmap_update_bits(usb->regmap, AT91_PMC_USB, AT91_PMC_USBS, 0);
 177 }
 178
 179 static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw)
 180 {
 181         struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw);
 182         unsigned int usbr;
 183
 184         regmap_read(usb->regmap, AT91_PMC_USB, &usbr);
 185
 186         return usbr & AT91_PMC_USBS;
 187 }
 188
 189 static const struct clk_ops at91sam9n12_usb_ops = {
 190         .enable = at91sam9n12_clk_usb_enable,
 191         .disable = at91sam9n12_clk_usb_disable,
 192         .is_enabled = at91sam9n12_clk_usb_is_enabled,
 193         .recalc_rate = at91sam9x5_clk_usb_recalc_rate,
 194         .determine_rate = at91sam9x5_clk_usb_determine_rate,
 195         .set_rate = at91sam9x5_clk_usb_set_rate,
 196 };
 197
 198 static struct clk_hw * __init
 199 at91sam9x5_clk_register_usb(struct regmap *regmap, const char *name,
 200                             const char **parent_names, u8 num_parents)
 201 {
 202         struct at91sam9x5_clk_usb *usb;
 203         struct clk_hw *hw;
 204         struct clk_init_data init;
 205         int ret;
 206
 207         usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 208         if (!usb)
 209                 return ERR_PTR(-ENOMEM);
 210
 211         init.name = name;
 212         init.ops = &at91sam9x5_usb_ops;
 213         init.parent_names = parent_names;
 214         init.num_parents = num_parents;
 215         init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE |
 216                      CLK_SET_RATE_PARENT;
 217
 218         usb->hw.init = &init;
 219         usb->regmap = regmap;
 220
 221         hw = &usb->hw;
 222         ret = clk_hw_register(NULL, &usb->hw);
 223         if (ret) {
 224                 kfree(usb);
 225                 hw = ERR_PTR(ret);
 226         }
 227
 228         return hw;
 229 }
 230
 231 static struct clk_hw * __init
 232 at91sam9n12_clk_register_usb(struct regmap *regmap, const char *name,
 233                              const char *parent_name)
 234 {
 235         struct at91sam9x5_clk_usb *usb;
 236         struct clk_hw *hw;
 237         struct clk_init_data init;
 238         int ret;
 239
 240         usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 241         if (!usb)
 242                 return ERR_PTR(-ENOMEM);
 243
 244         init.name = name;
 245         init.ops = &at91sam9n12_usb_ops;
 246         init.parent_names = &parent_name;
 247         init.num_parents = 1;
 248         init.flags = CLK_SET_RATE_GATE | CLK_SET_RATE_PARENT;
 249
 250         usb->hw.init = &init;
 251         usb->regmap = regmap;
 252
 253         hw = &usb->hw;
 254         ret = clk_hw_register(NULL, &usb->hw);
 255         if (ret) {
 256                 kfree(usb);
 257                 hw = ERR_PTR(ret);
 258         }
 259
 260         return hw;
 261 }
 262
 263 static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw,
 264                                                     unsigned long parent_rate)
 265 {
 266         struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
 267         unsigned int pllbr;
 268         u8 usbdiv;
 269
 270         regmap_read(usb->regmap, AT91_CKGR_PLLBR, &pllbr);
 271
 272         usbdiv = (pllbr & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT;
 273         if (usb->divisors[usbdiv])
 274                 return parent_rate / usb->divisors[usbdiv];
 275
 276         return 0;
 277 }
 278
 279 static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate,
 280                                           unsigned long *parent_rate)
 281 {
 282         struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
 283         struct clk_hw *parent = clk_hw_get_parent(hw);
 284         unsigned long bestrate = 0;
 285         int bestdiff = -1;
 286         unsigned long tmprate;
 287         int tmpdiff;
 288         int i = 0;
 289
 290         for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
 291                 unsigned long tmp_parent_rate;
 292
 293                 if (!usb->divisors[i])
 294                         continue;
 295
 296                 tmp_parent_rate = rate * usb->divisors[i];
 297                 tmp_parent_rate = clk_hw_round_rate(parent, tmp_parent_rate);
 298                 tmprate = DIV_ROUND_CLOSEST(tmp_parent_rate, usb->divisors[i]);
 299                 if (tmprate < rate)
 300                         tmpdiff = rate - tmprate;
 301                 else
 302                         tmpdiff = tmprate - rate;
 303
 304                 if (bestdiff < 0 || bestdiff > tmpdiff) {
 305                         bestrate = tmprate;
 306                         bestdiff = tmpdiff;
 307                         *parent_rate = tmp_parent_rate;
 308                 }
 309
 310                 if (!bestdiff)
 311                         break;
 312         }
 313
 314         return bestrate;
 315 }
 316
 317 static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate,
 318                                        unsigned long parent_rate)
 319 {
 320         int i;
 321         struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw);
 322         unsigned long div;
 323
 324         if (!rate)
 325                 return -EINVAL;
 326
 327         div = DIV_ROUND_CLOSEST(parent_rate, rate);
 328
 329         for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) {
 330                 if (usb->divisors[i] == div) {
 331                         regmap_update_bits(usb->regmap, AT91_CKGR_PLLBR,
 332                                            AT91_PMC_USBDIV,
 333                                            i << RM9200_USB_DIV_SHIFT);
 334
 335                         return 0;
 336                 }
 337         }
 338
 339         return -EINVAL;
 340 }
 341
 342 static const struct clk_ops at91rm9200_usb_ops = {
 343         .recalc_rate = at91rm9200_clk_usb_recalc_rate,
 344         .round_rate = at91rm9200_clk_usb_round_rate,
 345         .set_rate = at91rm9200_clk_usb_set_rate,
 346 };
 347
 348 static struct clk_hw * __init
 349 at91rm9200_clk_register_usb(struct regmap *regmap, const char *name,
 350                             const char *parent_name, const u32 *divisors)
 351 {
 352         struct at91rm9200_clk_usb *usb;
 353         struct clk_hw *hw;
 354         struct clk_init_data init;
 355         int ret;
 356
 357         usb = kzalloc(sizeof(*usb), GFP_KERNEL);
 358         if (!usb)
 359                 return ERR_PTR(-ENOMEM);
 360
 361         init.name = name;
 362         init.ops = &at91rm9200_usb_ops;
 363         init.parent_names = &parent_name;
 364         init.num_parents = 1;
 365         init.flags = CLK_SET_RATE_PARENT;
 366
 367         usb->hw.init = &init;
 368         usb->regmap = regmap;
 369         memcpy(usb->divisors, divisors, sizeof(usb->divisors));
 370
 371         hw = &usb->hw;
 372         ret = clk_hw_register(NULL, &usb->hw);
 373         if (ret) {
 374                 kfree(usb);
 375                 hw = ERR_PTR(ret);
 376         }
 377
 378         return hw;
 379 }
 380
 381 static void __init of_at91sam9x5_clk_usb_setup(struct device_node *np)
 382 {
 383         struct clk_hw *hw;
 384         unsigned int num_parents;
 385         const char *parent_names[USB_SOURCE_MAX];
 386         const char *name = np->name;
 387         struct regmap *regmap;
 388
 389         num_parents = of_clk_get_parent_count(np);
 390         if (num_parents == 0 || num_parents > USB_SOURCE_MAX)
 391                 return;
 392
 393         of_clk_parent_fill(np, parent_names, num_parents);
 394
 395         of_property_read_string(np, "clock-output-names", &name);
 396
 397         regmap = syscon_node_to_regmap(of_get_parent(np));
 398         if (IS_ERR(regmap))
 399                 return;
 400
 401         hw = at91sam9x5_clk_register_usb(regmap, name, parent_names,
 402                                          num_parents);
 403         if (IS_ERR(hw))
 404                 return;
 405
 406         of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 407 }
 408 CLK_OF_DECLARE(at91sam9x5_clk_usb, "atmel,at91sam9x5-clk-usb",
 409                of_at91sam9x5_clk_usb_setup);
 410
 411 static void __init of_at91sam9n12_clk_usb_setup(struct device_node *np)
 412 {
 413         struct clk_hw *hw;
 414         const char *parent_name;
 415         const char *name = np->name;
 416         struct regmap *regmap;
 417
 418         parent_name = of_clk_get_parent_name(np, 0);
 419         if (!parent_name)
 420                 return;
 421
 422         of_property_read_string(np, "clock-output-names", &name);
 423
 424         regmap = syscon_node_to_regmap(of_get_parent(np));
 425         if (IS_ERR(regmap))
 426                 return;
 427
 428         hw = at91sam9n12_clk_register_usb(regmap, name, parent_name);
 429         if (IS_ERR(hw))
 430                 return;
 431
 432         of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 433 }
 434 CLK_OF_DECLARE(at91sam9n12_clk_usb, "atmel,at91sam9n12-clk-usb",
 435                of_at91sam9n12_clk_usb_setup);
 436
 437 static void __init of_at91rm9200_clk_usb_setup(struct device_node *np)
 438 {
 439         struct clk_hw *hw;
 440         const char *parent_name;
 441         const char *name = np->name;
 442         u32 divisors[4] = {0, 0, 0, 0};
 443         struct regmap *regmap;
 444
 445         parent_name = of_clk_get_parent_name(np, 0);
 446         if (!parent_name)
 447                 return;
 448
 449         of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4);
 450         if (!divisors[0])
 451                 return;
 452
 453         of_property_read_string(np, "clock-output-names", &name);
 454
 455         regmap = syscon_node_to_regmap(of_get_parent(np));
 456         if (IS_ERR(regmap))
 457                 return;
 458         hw = at91rm9200_clk_register_usb(regmap, name, parent_name, divisors);
 459         if (IS_ERR(hw))
 460                 return;
 461
 462         of_clk_add_hw_provider(np, of_clk_hw_simple_get, hw);
 463 }
 464 CLK_OF_DECLARE(at91rm9200_clk_usb, "atmel,at91rm9200-clk-usb",
 465                of_at91rm9200_clk_usb_setup);