2 * Copyright (C) 2005, 2006 IBM Corporation
3 * Copyright (C) 2014, 2015 Intel Corporation
6 * Leendert van Doorn <leendert@watson.ibm.com>
7 * Kylene Hall <kjhall@us.ibm.com>
9 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
11 * Device driver for TCG/TCPA TPM (trusted platform module).
12 * Specifications at www.trustedcomputinggroup.org
14 * This device driver implements the TPM interface as defined in
15 * the TCG TPM Interface Spec version 1.2, revision 1.0.
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation, version 2 of the
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pnp.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/wait.h>
29 #include <linux/acpi.h>
30 #include <linux/freezer.h>
32 #include "tpm_tis_core.h"
34 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
36 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
37 bool check_cancel, bool *canceled)
39 u8 status = chip->ops->status(chip);
42 if ((status & mask) == mask)
44 if (check_cancel && chip->ops->req_canceled(chip, status)) {
51 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
52 unsigned long timeout, wait_queue_head_t *queue,
58 bool canceled = false;
60 /* check current status */
61 status = chip->ops->status(chip);
62 if ((status & mask) == mask)
65 stop = jiffies + timeout;
67 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
69 timeout = stop - jiffies;
70 if ((long)timeout <= 0)
72 rc = wait_event_interruptible_timeout(*queue,
73 wait_for_tpm_stat_cond(chip, mask, check_cancel,
81 if (rc == -ERESTARTSYS && freezing(current)) {
82 clear_thread_flag(TIF_SIGPENDING);
87 usleep_range(TPM_TIMEOUT_USECS_MIN,
88 TPM_TIMEOUT_USECS_MAX);
89 status = chip->ops->status(chip);
90 if ((status & mask) == mask)
92 } while (time_before(jiffies, stop));
97 /* Before we attempt to access the TPM we must see that the valid bit is set.
98 * The specification says that this bit is 0 at reset and remains 0 until the
99 * 'TPM has gone through its self test and initialization and has established
100 * correct values in the other bits.'
102 static int wait_startup(struct tpm_chip *chip, int l)
104 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
105 unsigned long stop = jiffies + chip->timeout_a;
111 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
115 if (access & TPM_ACCESS_VALID)
117 tpm_msleep(TPM_TIMEOUT);
118 } while (time_before(jiffies, stop));
122 static bool check_locality(struct tpm_chip *chip, int l)
124 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
128 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
132 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
133 | TPM_ACCESS_REQUEST_USE)) ==
134 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
142 static int release_locality(struct tpm_chip *chip, int l)
144 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
146 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
151 static int request_locality(struct tpm_chip *chip, int l)
153 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
154 unsigned long stop, timeout;
157 if (check_locality(chip, l))
160 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
164 stop = jiffies + chip->timeout_a;
166 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
168 timeout = stop - jiffies;
169 if ((long)timeout <= 0)
171 rc = wait_event_interruptible_timeout(priv->int_queue,
177 if (rc == -ERESTARTSYS && freezing(current)) {
178 clear_thread_flag(TIF_SIGPENDING);
182 /* wait for burstcount */
184 if (check_locality(chip, l))
186 tpm_msleep(TPM_TIMEOUT);
187 } while (time_before(jiffies, stop));
192 static u8 tpm_tis_status(struct tpm_chip *chip)
194 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
198 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
205 static void tpm_tis_ready(struct tpm_chip *chip)
207 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
209 /* this causes the current command to be aborted */
210 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
213 static int get_burstcount(struct tpm_chip *chip)
215 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
220 /* wait for burstcount */
221 if (chip->flags & TPM_CHIP_FLAG_TPM2)
222 stop = jiffies + chip->timeout_a;
224 stop = jiffies + chip->timeout_d;
226 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
230 burstcnt = (value >> 8) & 0xFFFF;
233 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
234 } while (time_before(jiffies, stop));
238 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
240 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
241 int size = 0, burstcnt, rc;
243 while (size < count) {
244 rc = wait_for_tpm_stat(chip,
245 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
247 &priv->read_queue, true);
250 burstcnt = get_burstcount(chip);
252 dev_err(&chip->dev, "Unable to read burstcount\n");
255 burstcnt = min_t(int, burstcnt, count - size);
257 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
258 burstcnt, buf + size);
267 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
269 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
274 if (count < TPM_HEADER_SIZE) {
279 size = recv_data(chip, buf, TPM_HEADER_SIZE);
280 /* read first 10 bytes, including tag, paramsize, and result */
281 if (size < TPM_HEADER_SIZE) {
282 dev_err(&chip->dev, "Unable to read header\n");
286 expected = be32_to_cpu(*(__be32 *) (buf + 2));
287 if (expected > count || expected < TPM_HEADER_SIZE) {
292 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
293 expected - TPM_HEADER_SIZE);
294 if (size < expected) {
295 dev_err(&chip->dev, "Unable to read remainder of result\n");
300 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
301 &priv->int_queue, false) < 0) {
305 status = tpm_tis_status(chip);
306 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
307 dev_err(&chip->dev, "Error left over data\n");
318 * If interrupts are used (signaled by an irq set in the vendor structure)
319 * tpm.c can skip polling for the data to be available as the interrupt is
322 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
324 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
325 int rc, status, burstcnt;
327 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
329 status = tpm_tis_status(chip);
330 if ((status & TPM_STS_COMMAND_READY) == 0) {
332 if (wait_for_tpm_stat
333 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
334 &priv->int_queue, false) < 0) {
340 while (count < len - 1) {
341 burstcnt = get_burstcount(chip);
343 dev_err(&chip->dev, "Unable to read burstcount\n");
347 burstcnt = min_t(int, burstcnt, len - count - 1);
348 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
349 burstcnt, buf + count);
355 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
356 &priv->int_queue, false) < 0) {
360 status = tpm_tis_status(chip);
361 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
367 /* write last byte */
368 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
372 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
373 &priv->int_queue, false) < 0) {
377 status = tpm_tis_status(chip);
378 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
390 static void disable_interrupts(struct tpm_chip *chip)
392 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
399 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
403 intmask &= ~TPM_GLOBAL_INT_ENABLE;
404 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
406 devm_free_irq(chip->dev.parent, priv->irq, chip);
408 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
412 * If interrupts are used (signaled by an irq set in the vendor structure)
413 * tpm.c can skip polling for the data to be available as the interrupt is
416 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
418 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
423 rc = tpm_tis_send_data(chip, buf, len);
428 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
432 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
433 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
435 if (chip->flags & TPM_CHIP_FLAG_TPM2)
436 dur = tpm2_calc_ordinal_duration(chip, ordinal);
438 dur = tpm_calc_ordinal_duration(chip, ordinal);
440 if (wait_for_tpm_stat
441 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
442 &priv->read_queue, false) < 0) {
453 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
456 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
458 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
459 return tpm_tis_send_main(chip, buf, len);
461 /* Verify receipt of the expected IRQ */
464 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
465 rc = tpm_tis_send_main(chip, buf, len);
467 chip->flags |= TPM_CHIP_FLAG_IRQ;
468 if (!priv->irq_tested)
470 if (!priv->irq_tested)
471 disable_interrupts(chip);
472 priv->irq_tested = true;
476 struct tis_vendor_timeout_override {
478 unsigned long timeout_us[4];
481 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
483 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
484 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
487 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
488 unsigned long *timeout_cap)
490 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
494 if (chip->ops->clk_enable != NULL)
495 chip->ops->clk_enable(chip, true);
497 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
501 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
502 if (vendor_timeout_overrides[i].did_vid != did_vid)
504 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
505 sizeof(vendor_timeout_overrides[i].timeout_us));
512 if (chip->ops->clk_enable != NULL)
513 chip->ops->clk_enable(chip, false);
519 * Early probing for iTPM with STS_DATA_EXPECT flaw.
520 * Try sending command without itpm flag set and if that
521 * fails, repeat with itpm flag set.
523 static int probe_itpm(struct tpm_chip *chip)
525 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
527 static const u8 cmd_getticks[] = {
528 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
529 0x00, 0x00, 0x00, 0xf1
531 size_t len = sizeof(cmd_getticks);
534 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
537 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
541 /* probe only iTPMS */
542 if (vendor != TPM_VID_INTEL)
545 if (request_locality(chip, 0) != 0)
548 rc = tpm_tis_send_data(chip, cmd_getticks, len);
554 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
556 rc = tpm_tis_send_data(chip, cmd_getticks, len);
558 dev_info(&chip->dev, "Detected an iTPM.\n");
560 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
566 release_locality(chip, priv->locality);
571 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
573 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
575 switch (priv->manufacturer_id) {
576 case TPM_VID_WINBOND:
577 return ((status == TPM_STS_VALID) ||
578 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
580 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
582 return (status == TPM_STS_COMMAND_READY);
586 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
588 struct tpm_chip *chip = dev_id;
589 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
593 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
600 priv->irq_tested = true;
601 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
602 wake_up_interruptible(&priv->read_queue);
603 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
604 for (i = 0; i < 5; i++)
605 if (check_locality(chip, i))
608 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
609 TPM_INTF_CMD_READY_INT))
610 wake_up_interruptible(&priv->int_queue);
612 /* Clear interrupts handled with TPM_EOI */
613 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
617 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
621 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
623 const char *desc = "attempting to generate an interrupt";
627 if (chip->flags & TPM_CHIP_FLAG_TPM2)
628 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
630 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
634 /* Register the IRQ and issue a command that will cause an interrupt. If an
635 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
636 * everything and leave in polling mode. Returns 0 on success.
638 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
641 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
646 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
647 dev_name(&chip->dev), chip) != 0) {
648 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
654 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
659 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
663 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
667 /* Clear all existing */
668 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
673 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
674 intmask | TPM_GLOBAL_INT_ENABLE);
678 priv->irq_tested = false;
680 /* Generate an interrupt by having the core call through to
683 rc = tpm_tis_gen_interrupt(chip);
687 /* tpm_tis_send will either confirm the interrupt is working or it
688 * will call disable_irq which undoes all of the above.
690 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
691 rc = tpm_tis_write8(priv, original_int_vec,
692 TPM_INT_VECTOR(priv->locality));
702 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
703 * do not have ACPI/etc. We typically expect the interrupt to be declared if
706 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
708 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
712 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
717 if (!original_int_vec) {
718 if (IS_ENABLED(CONFIG_X86))
719 for (i = 3; i <= 15; i++)
720 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
723 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
728 void tpm_tis_remove(struct tpm_chip *chip)
730 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
731 u32 reg = TPM_INT_ENABLE(priv->locality);
735 tpm_tis_clkrun_enable(chip, true);
737 rc = tpm_tis_read32(priv, reg, &interrupt);
741 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
743 tpm_tis_clkrun_enable(chip, false);
745 if (priv->ilb_base_addr)
746 iounmap(priv->ilb_base_addr);
748 EXPORT_SYMBOL_GPL(tpm_tis_remove);
751 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
752 * of a single TPM command
753 * @chip: TPM chip to use
754 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
755 * 0 - Enable CLKRUN protocol
756 * Call this function directly in tpm_tis_remove() in error or driver removal
757 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
759 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
761 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
764 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
765 !data->ilb_base_addr)
769 data->clkrun_enabled++;
770 if (data->clkrun_enabled > 1)
772 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
774 /* Disable LPC CLKRUN# */
775 clkrun_val &= ~LPC_CLKRUN_EN;
776 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
779 * Write any random value on port 0x80 which is on LPC, to make
780 * sure LPC clock is running before sending any TPM command.
784 data->clkrun_enabled--;
785 if (data->clkrun_enabled)
788 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
790 /* Enable LPC CLKRUN# */
791 clkrun_val |= LPC_CLKRUN_EN;
792 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
795 * Write any random value on port 0x80 which is on LPC, to make
796 * sure LPC clock is running before sending any TPM command.
802 static const struct tpm_class_ops tpm_tis = {
803 .flags = TPM_OPS_AUTO_STARTUP,
804 .status = tpm_tis_status,
805 .recv = tpm_tis_recv,
806 .send = tpm_tis_send,
807 .cancel = tpm_tis_ready,
808 .update_timeouts = tpm_tis_update_timeouts,
809 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
810 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
811 .req_canceled = tpm_tis_req_canceled,
812 .request_locality = request_locality,
813 .relinquish_locality = release_locality,
814 .clk_enable = tpm_tis_clkrun_enable,
817 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
818 const struct tpm_tis_phy_ops *phy_ops,
819 acpi_handle acpi_dev_handle)
827 struct tpm_chip *chip;
829 chip = tpmm_chip_alloc(dev, &tpm_tis);
831 return PTR_ERR(chip);
834 chip->acpi_dev_handle = acpi_dev_handle;
837 chip->hwrng.quality = priv->rng_quality;
839 /* Maximum timeouts */
840 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
841 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
842 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
843 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
844 priv->phy_ops = phy_ops;
845 dev_set_drvdata(&chip->dev, priv);
848 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
850 if (!priv->ilb_base_addr)
853 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
854 /* Check if CLKRUN# is already not enabled in the LPC bus */
855 if (!(clkrun_val & LPC_CLKRUN_EN)) {
856 iounmap(priv->ilb_base_addr);
857 priv->ilb_base_addr = NULL;
861 if (chip->ops->clk_enable != NULL)
862 chip->ops->clk_enable(chip, true);
864 if (wait_startup(chip, 0) != 0) {
869 /* Take control of the TPM's interrupt hardware and shut it off */
870 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
874 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
875 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
876 intmask &= ~TPM_GLOBAL_INT_ENABLE;
877 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
879 rc = tpm2_probe(chip);
883 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
887 priv->manufacturer_id = vendor;
889 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
893 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
894 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
897 probe = probe_itpm(chip);
903 /* Figure out the capabilities */
904 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
908 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
910 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
911 dev_dbg(dev, "\tBurst Count Static\n");
912 if (intfcaps & TPM_INTF_CMD_READY_INT)
913 dev_dbg(dev, "\tCommand Ready Int Support\n");
914 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
915 dev_dbg(dev, "\tInterrupt Edge Falling\n");
916 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
917 dev_dbg(dev, "\tInterrupt Edge Rising\n");
918 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
919 dev_dbg(dev, "\tInterrupt Level Low\n");
920 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
921 dev_dbg(dev, "\tInterrupt Level High\n");
922 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
923 dev_dbg(dev, "\tLocality Change Int Support\n");
924 if (intfcaps & TPM_INTF_STS_VALID_INT)
925 dev_dbg(dev, "\tSts Valid Int Support\n");
926 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
927 dev_dbg(dev, "\tData Avail Int Support\n");
929 /* INTERRUPT Setup */
930 init_waitqueue_head(&priv->read_queue);
931 init_waitqueue_head(&priv->int_queue);
933 /* Before doing irq testing issue a command to the TPM in polling mode
934 * to make sure it works. May as well use that command to set the
935 * proper timeouts for the driver.
937 if (tpm_get_timeouts(chip)) {
938 dev_err(dev, "Could not get TPM timeouts and durations\n");
944 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
946 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
947 dev_err(&chip->dev, FW_BUG
948 "TPM interrupt not working, polling instead\n");
950 disable_interrupts(chip);
953 tpm_tis_probe_irq(chip, intmask);
957 rc = tpm_chip_register(chip);
961 if (chip->ops->clk_enable != NULL)
962 chip->ops->clk_enable(chip, false);
966 if (chip->ops->clk_enable != NULL)
967 chip->ops->clk_enable(chip, false);
969 tpm_tis_remove(chip);
973 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
975 #ifdef CONFIG_PM_SLEEP
976 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
978 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
982 if (chip->ops->clk_enable != NULL)
983 chip->ops->clk_enable(chip, true);
985 /* reenable interrupts that device may have lost or
986 * BIOS/firmware may have disabled
988 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
992 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
996 intmask |= TPM_INTF_CMD_READY_INT
997 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
998 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1000 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1003 if (chip->ops->clk_enable != NULL)
1004 chip->ops->clk_enable(chip, false);
1009 int tpm_tis_resume(struct device *dev)
1011 struct tpm_chip *chip = dev_get_drvdata(dev);
1014 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1015 tpm_tis_reenable_interrupts(chip);
1017 ret = tpm_pm_resume(dev);
1021 /* TPM 1.2 requires self-test on resume. This function actually returns
1022 * an error code but for unknown reason it isn't handled.
1024 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1025 tpm_do_selftest(chip);
1029 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1032 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
1033 MODULE_DESCRIPTION("TPM Driver");
1034 MODULE_VERSION("2.0");
1035 MODULE_LICENSE("GPL");