GNU Linux-libre 4.14.332-gnu1
[releases.git] / drivers / char / tpm / tpm_tis_core.c
1 /*
2  * Copyright (C) 2005, 2006 IBM Corporation
3  * Copyright (C) 2014, 2015 Intel Corporation
4  *
5  * Authors:
6  * Leendert van Doorn <leendert@watson.ibm.com>
7  * Kylene Hall <kjhall@us.ibm.com>
8  *
9  * Maintained by: <tpmdd-devel@lists.sourceforge.net>
10  *
11  * Device driver for TCG/TCPA TPM (trusted platform module).
12  * Specifications at www.trustedcomputinggroup.org
13  *
14  * This device driver implements the TPM interface as defined in
15  * the TCG TPM Interface Spec version 1.2, revision 1.0.
16  *
17  * This program is free software; you can redistribute it and/or
18  * modify it under the terms of the GNU General Public License as
19  * published by the Free Software Foundation, version 2 of the
20  * License.
21  */
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/pnp.h>
26 #include <linux/slab.h>
27 #include <linux/interrupt.h>
28 #include <linux/wait.h>
29 #include <linux/acpi.h>
30 #include <linux/freezer.h>
31 #include "tpm.h"
32 #include "tpm_tis_core.h"
33
34 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
35
36 /* Before we attempt to access the TPM we must see that the valid bit is set.
37  * The specification says that this bit is 0 at reset and remains 0 until the
38  * 'TPM has gone through its self test and initialization and has established
39  * correct values in the other bits.'
40  */
41 static int wait_startup(struct tpm_chip *chip, int l)
42 {
43         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
44         unsigned long stop = jiffies + chip->timeout_a;
45
46         do {
47                 int rc;
48                 u8 access;
49
50                 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
51                 if (rc < 0)
52                         return rc;
53
54                 if (access & TPM_ACCESS_VALID)
55                         return 0;
56                 tpm_msleep(TPM_TIMEOUT);
57         } while (time_before(jiffies, stop));
58         return -1;
59 }
60
61 static bool check_locality(struct tpm_chip *chip, int l)
62 {
63         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
64         int rc;
65         u8 access;
66
67         rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
68         if (rc < 0)
69                 return false;
70
71         if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID
72                        | TPM_ACCESS_REQUEST_USE)) ==
73             (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
74                 priv->locality = l;
75                 return true;
76         }
77
78         return false;
79 }
80
81 static int release_locality(struct tpm_chip *chip, int l)
82 {
83         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
84
85         tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
86
87         return 0;
88 }
89
90 static int request_locality(struct tpm_chip *chip, int l)
91 {
92         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
93         unsigned long stop, timeout;
94         long rc;
95
96         if (check_locality(chip, l))
97                 return l;
98
99         rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
100         if (rc < 0)
101                 return rc;
102
103         stop = jiffies + chip->timeout_a;
104
105         if (chip->flags & TPM_CHIP_FLAG_IRQ) {
106 again:
107                 timeout = stop - jiffies;
108                 if ((long)timeout <= 0)
109                         return -1;
110                 rc = wait_event_interruptible_timeout(priv->int_queue,
111                                                       (check_locality
112                                                        (chip, l)),
113                                                       timeout);
114                 if (rc > 0)
115                         return l;
116                 if (rc == -ERESTARTSYS && freezing(current)) {
117                         clear_thread_flag(TIF_SIGPENDING);
118                         goto again;
119                 }
120         } else {
121                 /* wait for burstcount */
122                 do {
123                         if (check_locality(chip, l))
124                                 return l;
125                         tpm_msleep(TPM_TIMEOUT);
126                 } while (time_before(jiffies, stop));
127         }
128         return -1;
129 }
130
131 static u8 tpm_tis_status(struct tpm_chip *chip)
132 {
133         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
134         int rc;
135         u8 status;
136
137         rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
138         if (rc < 0)
139                 return 0;
140
141         return status;
142 }
143
144 static void tpm_tis_ready(struct tpm_chip *chip)
145 {
146         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
147
148         /* this causes the current command to be aborted */
149         tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
150 }
151
152 static int get_burstcount(struct tpm_chip *chip)
153 {
154         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
155         unsigned long stop;
156         int burstcnt, rc;
157         u32 value;
158
159         /* wait for burstcount */
160         if (chip->flags & TPM_CHIP_FLAG_TPM2)
161                 stop = jiffies + chip->timeout_a;
162         else
163                 stop = jiffies + chip->timeout_d;
164         do {
165                 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
166                 if (rc < 0)
167                         return rc;
168
169                 burstcnt = (value >> 8) & 0xFFFF;
170                 if (burstcnt)
171                         return burstcnt;
172                 tpm_msleep(TPM_TIMEOUT);
173         } while (time_before(jiffies, stop));
174         return -EBUSY;
175 }
176
177 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
178 {
179         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
180         int size = 0, burstcnt, rc;
181
182         while (size < count) {
183                 rc = wait_for_tpm_stat(chip,
184                                  TPM_STS_DATA_AVAIL | TPM_STS_VALID,
185                                  chip->timeout_c,
186                                  &priv->read_queue, true);
187                 if (rc < 0)
188                         return rc;
189                 burstcnt = get_burstcount(chip);
190                 if (burstcnt < 0) {
191                         dev_err(&chip->dev, "Unable to read burstcount\n");
192                         return burstcnt;
193                 }
194                 burstcnt = min_t(int, burstcnt, count - size);
195
196                 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
197                                         burstcnt, buf + size);
198                 if (rc < 0)
199                         return rc;
200
201                 size += burstcnt;
202         }
203         return size;
204 }
205
206 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
207 {
208         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
209         int size = 0;
210         int status;
211         u32 expected;
212         int rc;
213
214         if (count < TPM_HEADER_SIZE) {
215                 size = -EIO;
216                 goto out;
217         }
218
219         size = recv_data(chip, buf, TPM_HEADER_SIZE);
220         /* read first 10 bytes, including tag, paramsize, and result */
221         if (size < TPM_HEADER_SIZE) {
222                 dev_err(&chip->dev, "Unable to read header\n");
223                 goto out;
224         }
225
226         expected = be32_to_cpu(*(__be32 *) (buf + 2));
227         if (expected > count || expected < TPM_HEADER_SIZE) {
228                 size = -EIO;
229                 goto out;
230         }
231
232         rc = recv_data(chip, &buf[TPM_HEADER_SIZE],
233                        expected - TPM_HEADER_SIZE);
234         if (rc < 0) {
235                 size = rc;
236                 goto out;
237         }
238         size += rc;
239         if (size < expected) {
240                 dev_err(&chip->dev, "Unable to read remainder of result\n");
241                 size = -ETIME;
242                 goto out;
243         }
244
245         if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
246                                 &priv->int_queue, false) < 0) {
247                 size = -ETIME;
248                 goto out;
249         }
250         status = tpm_tis_status(chip);
251         if (status & TPM_STS_DATA_AVAIL) {      /* retry? */
252                 dev_err(&chip->dev, "Error left over data\n");
253                 size = -EIO;
254                 goto out;
255         }
256
257 out:
258         tpm_tis_ready(chip);
259         return size;
260 }
261
262 /*
263  * If interrupts are used (signaled by an irq set in the vendor structure)
264  * tpm.c can skip polling for the data to be available as the interrupt is
265  * waited for here
266  */
267 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
268 {
269         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
270         int rc, status, burstcnt;
271         size_t count = 0;
272         bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
273
274         status = tpm_tis_status(chip);
275         if ((status & TPM_STS_COMMAND_READY) == 0) {
276                 tpm_tis_ready(chip);
277                 if (wait_for_tpm_stat
278                     (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
279                      &priv->int_queue, false) < 0) {
280                         rc = -ETIME;
281                         goto out_err;
282                 }
283         }
284
285         while (count < len - 1) {
286                 burstcnt = get_burstcount(chip);
287                 if (burstcnt < 0) {
288                         dev_err(&chip->dev, "Unable to read burstcount\n");
289                         rc = burstcnt;
290                         goto out_err;
291                 }
292                 burstcnt = min_t(int, burstcnt, len - count - 1);
293                 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
294                                          burstcnt, buf + count);
295                 if (rc < 0)
296                         goto out_err;
297
298                 count += burstcnt;
299
300                 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
301                                         &priv->int_queue, false) < 0) {
302                         rc = -ETIME;
303                         goto out_err;
304                 }
305                 status = tpm_tis_status(chip);
306                 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
307                         rc = -EIO;
308                         goto out_err;
309                 }
310         }
311
312         /* write last byte */
313         rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
314         if (rc < 0)
315                 goto out_err;
316
317         if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
318                                 &priv->int_queue, false) < 0) {
319                 rc = -ETIME;
320                 goto out_err;
321         }
322         status = tpm_tis_status(chip);
323         if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
324                 rc = -EIO;
325                 goto out_err;
326         }
327
328         return 0;
329
330 out_err:
331         tpm_tis_ready(chip);
332         return rc;
333 }
334
335 static void disable_interrupts(struct tpm_chip *chip)
336 {
337         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
338         u32 intmask;
339         int rc;
340
341         if (priv->irq == 0)
342                 return;
343
344         rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
345         if (rc < 0)
346                 intmask = 0;
347
348         intmask &= ~TPM_GLOBAL_INT_ENABLE;
349         rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
350
351         devm_free_irq(chip->dev.parent, priv->irq, chip);
352         priv->irq = 0;
353         chip->flags &= ~TPM_CHIP_FLAG_IRQ;
354 }
355
356 /*
357  * If interrupts are used (signaled by an irq set in the vendor structure)
358  * tpm.c can skip polling for the data to be available as the interrupt is
359  * waited for here
360  */
361 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
362 {
363         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
364         int rc;
365         u32 ordinal;
366         unsigned long dur;
367         unsigned int try;
368
369         for (try = 0; try < TPM_RETRY; try++) {
370                 rc = tpm_tis_send_data(chip, buf, len);
371                 if (rc >= 0)
372                         /* Data transfer done successfully */
373                         break;
374                 else if (rc != -EIO)
375                         /* Data transfer failed, not recoverable */
376                         return rc;
377         }
378
379         /* go and do it */
380         rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
381         if (rc < 0)
382                 goto out_err;
383
384         if (chip->flags & TPM_CHIP_FLAG_IRQ) {
385                 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
386
387                 if (chip->flags & TPM_CHIP_FLAG_TPM2)
388                         dur = tpm2_calc_ordinal_duration(chip, ordinal);
389                 else
390                         dur = tpm_calc_ordinal_duration(chip, ordinal);
391
392                 if (wait_for_tpm_stat
393                     (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
394                      &priv->read_queue, false) < 0) {
395                         rc = -ETIME;
396                         goto out_err;
397                 }
398         }
399         return 0;
400 out_err:
401         tpm_tis_ready(chip);
402         return rc;
403 }
404
405 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
406 {
407         int rc, irq;
408         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
409
410         if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
411                 return tpm_tis_send_main(chip, buf, len);
412
413         /* Verify receipt of the expected IRQ */
414         irq = priv->irq;
415         priv->irq = 0;
416         chip->flags &= ~TPM_CHIP_FLAG_IRQ;
417         rc = tpm_tis_send_main(chip, buf, len);
418         priv->irq = irq;
419         chip->flags |= TPM_CHIP_FLAG_IRQ;
420         if (!priv->irq_tested)
421                 tpm_msleep(1);
422         if (!priv->irq_tested)
423                 disable_interrupts(chip);
424         priv->irq_tested = true;
425         return rc;
426 }
427
428 struct tis_vendor_timeout_override {
429         u32 did_vid;
430         unsigned long timeout_us[4];
431 };
432
433 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
434         /* Atmel 3204 */
435         { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
436                         (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
437 };
438
439 static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
440                                     unsigned long *timeout_cap)
441 {
442         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
443         int i, rc;
444         u32 did_vid;
445
446         if (chip->ops->clk_enable != NULL)
447                 chip->ops->clk_enable(chip, true);
448
449         rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
450         if (rc < 0)
451                 goto out;
452
453         for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
454                 if (vendor_timeout_overrides[i].did_vid != did_vid)
455                         continue;
456                 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
457                        sizeof(vendor_timeout_overrides[i].timeout_us));
458                 rc = true;
459         }
460
461         rc = false;
462
463 out:
464         if (chip->ops->clk_enable != NULL)
465                 chip->ops->clk_enable(chip, false);
466
467         return rc;
468 }
469
470 /*
471  * Early probing for iTPM with STS_DATA_EXPECT flaw.
472  * Try sending command without itpm flag set and if that
473  * fails, repeat with itpm flag set.
474  */
475 static int probe_itpm(struct tpm_chip *chip)
476 {
477         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
478         int rc = 0;
479         u8 cmd_getticks[] = {
480                 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
481                 0x00, 0x00, 0x00, 0xf1
482         };
483         size_t len = sizeof(cmd_getticks);
484         u16 vendor;
485
486         if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
487                 return 0;
488
489         rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
490         if (rc < 0)
491                 return rc;
492
493         /* probe only iTPMS */
494         if (vendor != TPM_VID_INTEL)
495                 return 0;
496
497         if (request_locality(chip, 0) != 0)
498                 return -EBUSY;
499
500         rc = tpm_tis_send_data(chip, cmd_getticks, len);
501         if (rc == 0)
502                 goto out;
503
504         tpm_tis_ready(chip);
505
506         priv->flags |= TPM_TIS_ITPM_WORKAROUND;
507
508         rc = tpm_tis_send_data(chip, cmd_getticks, len);
509         if (rc == 0)
510                 dev_info(&chip->dev, "Detected an iTPM.\n");
511         else {
512                 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
513                 rc = -EFAULT;
514         }
515
516 out:
517         tpm_tis_ready(chip);
518         release_locality(chip, priv->locality);
519
520         return rc;
521 }
522
523 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
524 {
525         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
526
527         switch (priv->manufacturer_id) {
528         case TPM_VID_WINBOND:
529                 return ((status == TPM_STS_VALID) ||
530                         (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
531         case TPM_VID_STM:
532                 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
533         default:
534                 return (status == TPM_STS_COMMAND_READY);
535         }
536 }
537
538 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
539 {
540         struct tpm_chip *chip = dev_id;
541         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
542         u32 interrupt;
543         int i, rc;
544
545         rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
546         if (rc < 0)
547                 return IRQ_NONE;
548
549         if (interrupt == 0)
550                 return IRQ_NONE;
551
552         priv->irq_tested = true;
553         if (interrupt & TPM_INTF_DATA_AVAIL_INT)
554                 wake_up_interruptible(&priv->read_queue);
555         if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
556                 for (i = 0; i < 5; i++)
557                         if (check_locality(chip, i))
558                                 break;
559         if (interrupt &
560             (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
561              TPM_INTF_CMD_READY_INT))
562                 wake_up_interruptible(&priv->int_queue);
563
564         /* Clear interrupts handled with TPM_EOI */
565         rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
566         if (rc < 0)
567                 return IRQ_NONE;
568
569         tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
570         return IRQ_HANDLED;
571 }
572
573 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
574 {
575         const char *desc = "attempting to generate an interrupt";
576         u32 cap2;
577         cap_t cap;
578
579         if (chip->flags & TPM_CHIP_FLAG_TPM2)
580                 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
581         else
582                 return tpm_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
583                                   0);
584 }
585
586 /* Register the IRQ and issue a command that will cause an interrupt. If an
587  * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
588  * everything and leave in polling mode. Returns 0 on success.
589  */
590 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
591                                     int flags, int irq)
592 {
593         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
594         u8 original_int_vec;
595         int rc;
596         u32 int_status;
597
598         if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
599                              dev_name(&chip->dev), chip) != 0) {
600                 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
601                          irq);
602                 return -1;
603         }
604         priv->irq = irq;
605
606         rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
607                            &original_int_vec);
608         if (rc < 0)
609                 return rc;
610
611         rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
612         if (rc < 0)
613                 return rc;
614
615         rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
616         if (rc < 0)
617                 return rc;
618
619         /* Clear all existing */
620         rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
621         if (rc < 0)
622                 return rc;
623
624         /* Turn on */
625         rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
626                              intmask | TPM_GLOBAL_INT_ENABLE);
627         if (rc < 0)
628                 return rc;
629
630         priv->irq_tested = false;
631
632         /* Generate an interrupt by having the core call through to
633          * tpm_tis_send
634          */
635         rc = tpm_tis_gen_interrupt(chip);
636         if (rc < 0)
637                 return rc;
638
639         /* tpm_tis_send will either confirm the interrupt is working or it
640          * will call disable_irq which undoes all of the above.
641          */
642         if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
643                 rc = tpm_tis_write8(priv, original_int_vec,
644                                 TPM_INT_VECTOR(priv->locality));
645                 if (rc < 0)
646                         return rc;
647
648                 return 1;
649         }
650
651         return 0;
652 }
653
654 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
655  * do not have ACPI/etc. We typically expect the interrupt to be declared if
656  * present.
657  */
658 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
659 {
660         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
661         u8 original_int_vec;
662         int i, rc;
663
664         rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
665                            &original_int_vec);
666         if (rc < 0)
667                 return;
668
669         if (!original_int_vec) {
670                 if (IS_ENABLED(CONFIG_X86))
671                         for (i = 3; i <= 15; i++)
672                                 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
673                                                               i))
674                                         return;
675         } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
676                                              original_int_vec))
677                 return;
678 }
679
680 void tpm_tis_remove(struct tpm_chip *chip)
681 {
682         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
683         u32 reg = TPM_INT_ENABLE(priv->locality);
684         u32 interrupt;
685         int rc;
686
687         tpm_tis_clkrun_enable(chip, true);
688
689         rc = tpm_tis_read32(priv, reg, &interrupt);
690         if (rc < 0)
691                 interrupt = 0;
692
693         tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
694
695         tpm_tis_clkrun_enable(chip, false);
696
697         if (priv->ilb_base_addr)
698                 iounmap(priv->ilb_base_addr);
699 }
700 EXPORT_SYMBOL_GPL(tpm_tis_remove);
701
702 /**
703  * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
704  *                           of a single TPM command
705  * @chip:       TPM chip to use
706  * @value:      1 - Disable CLKRUN protocol, so that clocks are free running
707  *              0 - Enable CLKRUN protocol
708  * Call this function directly in tpm_tis_remove() in error or driver removal
709  * path, since the chip->ops is set to NULL in tpm_chip_unregister().
710  */
711 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
712 {
713         struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
714         u32 clkrun_val;
715
716         if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
717             !data->ilb_base_addr)
718                 return;
719
720         if (value) {
721                 data->clkrun_enabled++;
722                 if (data->clkrun_enabled > 1)
723                         return;
724                 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
725
726                 /* Disable LPC CLKRUN# */
727                 clkrun_val &= ~LPC_CLKRUN_EN;
728                 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
729
730                 /*
731                  * Write any random value on port 0x80 which is on LPC, to make
732                  * sure LPC clock is running before sending any TPM command.
733                  */
734                 outb(0xCC, 0x80);
735         } else {
736                 data->clkrun_enabled--;
737                 if (data->clkrun_enabled)
738                         return;
739
740                 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
741
742                 /* Enable LPC CLKRUN# */
743                 clkrun_val |= LPC_CLKRUN_EN;
744                 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
745
746                 /*
747                  * Write any random value on port 0x80 which is on LPC, to make
748                  * sure LPC clock is running before sending any TPM command.
749                  */
750                 outb(0xCC, 0x80);
751         }
752 }
753
754 static const struct tpm_class_ops tpm_tis = {
755         .flags = TPM_OPS_AUTO_STARTUP,
756         .status = tpm_tis_status,
757         .recv = tpm_tis_recv,
758         .send = tpm_tis_send,
759         .cancel = tpm_tis_ready,
760         .update_timeouts = tpm_tis_update_timeouts,
761         .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
762         .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
763         .req_canceled = tpm_tis_req_canceled,
764         .request_locality = request_locality,
765         .relinquish_locality = release_locality,
766         .clk_enable = tpm_tis_clkrun_enable,
767 };
768
769 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
770                       const struct tpm_tis_phy_ops *phy_ops,
771                       acpi_handle acpi_dev_handle)
772 {
773         u32 vendor, intfcaps, intmask;
774         u32 clkrun_val;
775         u8 rid;
776         int rc, probe;
777         struct tpm_chip *chip;
778
779         chip = tpmm_chip_alloc(dev, &tpm_tis);
780         if (IS_ERR(chip))
781                 return PTR_ERR(chip);
782
783 #ifdef CONFIG_ACPI
784         chip->acpi_dev_handle = acpi_dev_handle;
785 #endif
786
787         /* Maximum timeouts */
788         chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
789         chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
790         chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
791         chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
792         priv->phy_ops = phy_ops;
793         dev_set_drvdata(&chip->dev, priv);
794
795         if (is_bsw()) {
796                 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
797                                         ILB_REMAP_SIZE);
798                 if (!priv->ilb_base_addr)
799                         return -ENOMEM;
800
801                 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
802                 /* Check if CLKRUN# is already not enabled in the LPC bus */
803                 if (!(clkrun_val & LPC_CLKRUN_EN)) {
804                         iounmap(priv->ilb_base_addr);
805                         priv->ilb_base_addr = NULL;
806                 }
807         }
808
809         if (chip->ops->clk_enable != NULL)
810                 chip->ops->clk_enable(chip, true);
811
812         if (wait_startup(chip, 0) != 0) {
813                 rc = -ENODEV;
814                 goto out_err;
815         }
816
817         /* Take control of the TPM's interrupt hardware and shut it off */
818         rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
819         if (rc < 0)
820                 goto out_err;
821
822         intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
823                    TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
824         intmask &= ~TPM_GLOBAL_INT_ENABLE;
825
826         rc = request_locality(chip, 0);
827         if (rc < 0) {
828                 rc = -ENODEV;
829                 goto out_err;
830         }
831
832         tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
833         release_locality(chip, 0);
834
835         rc = tpm2_probe(chip);
836         if (rc)
837                 goto out_err;
838
839         rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
840         if (rc < 0)
841                 goto out_err;
842
843         priv->manufacturer_id = vendor;
844
845         rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
846         if (rc < 0)
847                 goto out_err;
848
849         dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
850                  (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
851                  vendor >> 16, rid);
852
853         probe = probe_itpm(chip);
854         if (probe < 0) {
855                 rc = -ENODEV;
856                 goto out_err;
857         }
858
859         /* Figure out the capabilities */
860         rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
861         if (rc < 0)
862                 goto out_err;
863
864         dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
865                 intfcaps);
866         if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
867                 dev_dbg(dev, "\tBurst Count Static\n");
868         if (intfcaps & TPM_INTF_CMD_READY_INT)
869                 dev_dbg(dev, "\tCommand Ready Int Support\n");
870         if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
871                 dev_dbg(dev, "\tInterrupt Edge Falling\n");
872         if (intfcaps & TPM_INTF_INT_EDGE_RISING)
873                 dev_dbg(dev, "\tInterrupt Edge Rising\n");
874         if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
875                 dev_dbg(dev, "\tInterrupt Level Low\n");
876         if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
877                 dev_dbg(dev, "\tInterrupt Level High\n");
878         if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
879                 dev_dbg(dev, "\tLocality Change Int Support\n");
880         if (intfcaps & TPM_INTF_STS_VALID_INT)
881                 dev_dbg(dev, "\tSts Valid Int Support\n");
882         if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
883                 dev_dbg(dev, "\tData Avail Int Support\n");
884
885         /* INTERRUPT Setup */
886         init_waitqueue_head(&priv->read_queue);
887         init_waitqueue_head(&priv->int_queue);
888         if (irq != -1) {
889                 /* Before doing irq testing issue a command to the TPM in polling mode
890                  * to make sure it works. May as well use that command to set the
891                  * proper timeouts for the driver.
892                  */
893                 if (tpm_get_timeouts(chip)) {
894                         dev_err(dev, "Could not get TPM timeouts and durations\n");
895                         rc = -ENODEV;
896                         goto out_err;
897                 }
898
899                 if (irq) {
900                         tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
901                                                  irq);
902                         if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
903                                 dev_err(&chip->dev, FW_BUG
904                                         "TPM interrupt not working, polling instead\n");
905
906                                 disable_interrupts(chip);
907                         }
908                 } else {
909                         tpm_tis_probe_irq(chip, intmask);
910                 }
911         }
912
913         rc = tpm_chip_register(chip);
914         if (rc)
915                 goto out_err;
916
917         if (chip->ops->clk_enable != NULL)
918                 chip->ops->clk_enable(chip, false);
919
920         return 0;
921 out_err:
922         if (chip->ops->clk_enable != NULL)
923                 chip->ops->clk_enable(chip, false);
924
925         tpm_tis_remove(chip);
926
927         return rc;
928 }
929 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
930
931 #ifdef CONFIG_PM_SLEEP
932 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
933 {
934         struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
935         u32 intmask;
936         int rc;
937
938         if (chip->ops->clk_enable != NULL)
939                 chip->ops->clk_enable(chip, true);
940
941         /* reenable interrupts that device may have lost or
942          * BIOS/firmware may have disabled
943          */
944         rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
945         if (rc < 0)
946                 goto out;
947
948         rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
949         if (rc < 0)
950                 goto out;
951
952         intmask |= TPM_INTF_CMD_READY_INT
953             | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
954             | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
955
956         tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
957
958 out:
959         if (chip->ops->clk_enable != NULL)
960                 chip->ops->clk_enable(chip, false);
961
962         return;
963 }
964
965 int tpm_tis_resume(struct device *dev)
966 {
967         struct tpm_chip *chip = dev_get_drvdata(dev);
968         int ret;
969
970         if (chip->flags & TPM_CHIP_FLAG_IRQ)
971                 tpm_tis_reenable_interrupts(chip);
972
973         ret = tpm_pm_resume(dev);
974         if (ret)
975                 return ret;
976
977         /* TPM 1.2 requires self-test on resume. This function actually returns
978          * an error code but for unknown reason it isn't handled.
979          */
980         if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
981                 tpm_do_selftest(chip);
982
983         return 0;
984 }
985 EXPORT_SYMBOL_GPL(tpm_tis_resume);
986 #endif
987
988 MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
989 MODULE_DESCRIPTION("TPM Driver");
990 MODULE_VERSION("2.0");
991 MODULE_LICENSE("GPL");