2 * Copyright (C) 2014 Intel Corporation
5 * Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
7 * Maintained by: <tpmdd-devel@lists.sourceforge.net>
9 * This device driver implements the TPM interface as defined in
10 * the TCG CRB 2.0 TPM specification.
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; version 2
18 #include <linux/acpi.h>
19 #include <linux/highmem.h>
20 #include <linux/rculist.h>
21 #include <linux/module.h>
24 #define ACPI_SIG_TPM2 "TPM2"
26 static const u8 CRB_ACPI_START_UUID[] = {
27 /* 0000 */ 0xAB, 0x6C, 0xBF, 0x6B, 0x63, 0x54, 0x14, 0x47,
28 /* 0008 */ 0xB7, 0xCD, 0xF0, 0x20, 0x3C, 0x03, 0x68, 0xD4
32 CRB_ACPI_START_REVISION_ID = 1,
33 CRB_ACPI_START_INDEX = 1,
37 CRB_CTRL_REQ_CMD_READY = BIT(0),
38 CRB_CTRL_REQ_GO_IDLE = BIT(1),
42 CRB_CTRL_STS_ERROR = BIT(0),
43 CRB_CTRL_STS_TPM_IDLE = BIT(1),
47 CRB_START_INVOKE = BIT(0),
51 CRB_CANCEL_INVOKE = BIT(0),
54 struct crb_control_area {
69 CRB_DRV_STS_COMPLETE = BIT(0),
73 CRB_FL_ACPI_START = BIT(0),
74 CRB_FL_CRB_START = BIT(1),
80 struct crb_control_area __iomem *cca;
86 static SIMPLE_DEV_PM_OPS(crb_pm, tpm_pm_suspend, tpm_pm_resume);
88 static u8 crb_status(struct tpm_chip *chip)
90 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
93 if ((ioread32(&priv->cca->start) & CRB_START_INVOKE) !=
95 sts |= CRB_DRV_STS_COMPLETE;
100 static int crb_recv(struct tpm_chip *chip, u8 *buf, size_t count)
102 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
103 unsigned int expected;
105 /* A sanity check that the upper layer wants to get at least the header
106 * as that is the minimum size for any TPM response.
108 if (count < TPM_HEADER_SIZE)
111 /* If this bit is set, according to the spec, the TPM is in
112 * unrecoverable condition.
114 if (ioread32(&priv->cca->sts) & CRB_CTRL_STS_ERROR)
117 /* Read the first 8 bytes in order to get the length of the response.
118 * We read exactly a quad word in order to make sure that the remaining
119 * reads will be aligned.
121 memcpy_fromio(buf, priv->rsp, 8);
123 expected = be32_to_cpup((__be32 *)&buf[2]);
124 if (expected > count || expected < TPM_HEADER_SIZE)
127 memcpy_fromio(&buf[8], &priv->rsp[8], expected - 8);
132 static int crb_do_acpi_start(struct tpm_chip *chip)
134 union acpi_object *obj;
137 obj = acpi_evaluate_dsm(chip->acpi_dev_handle,
139 CRB_ACPI_START_REVISION_ID,
140 CRB_ACPI_START_INDEX,
144 rc = obj->integer.value == 0 ? 0 : -ENXIO;
149 static int crb_send(struct tpm_chip *chip, u8 *buf, size_t len)
151 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
154 /* Zero the cancel register so that the next command will not get
157 iowrite32(0, &priv->cca->cancel);
159 if (len > priv->cmd_size) {
160 dev_err(&chip->dev, "invalid command count value %zd %d\n",
161 len, priv->cmd_size);
165 memcpy_toio(priv->cmd, buf, len);
167 /* Make sure that cmd is populated before issuing start. */
170 if (priv->flags & CRB_FL_CRB_START)
171 iowrite32(CRB_START_INVOKE, &priv->cca->start);
173 if (priv->flags & CRB_FL_ACPI_START)
174 rc = crb_do_acpi_start(chip);
179 static void crb_cancel(struct tpm_chip *chip)
181 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
183 iowrite32(CRB_CANCEL_INVOKE, &priv->cca->cancel);
185 if ((priv->flags & CRB_FL_ACPI_START) && crb_do_acpi_start(chip))
186 dev_err(&chip->dev, "ACPI Start failed\n");
189 static bool crb_req_canceled(struct tpm_chip *chip, u8 status)
191 struct crb_priv *priv = dev_get_drvdata(&chip->dev);
192 u32 cancel = ioread32(&priv->cca->cancel);
194 return (cancel & CRB_CANCEL_INVOKE) == CRB_CANCEL_INVOKE;
197 static const struct tpm_class_ops tpm_crb = {
198 .flags = TPM_OPS_AUTO_STARTUP,
199 .status = crb_status,
202 .cancel = crb_cancel,
203 .req_canceled = crb_req_canceled,
204 .req_complete_mask = CRB_DRV_STS_COMPLETE,
205 .req_complete_val = CRB_DRV_STS_COMPLETE,
208 static int crb_init(struct acpi_device *device, struct crb_priv *priv)
210 struct tpm_chip *chip;
212 chip = tpmm_chip_alloc(&device->dev, &tpm_crb);
214 return PTR_ERR(chip);
216 dev_set_drvdata(&chip->dev, priv);
217 chip->acpi_dev_handle = device->handle;
218 chip->flags = TPM_CHIP_FLAG_TPM2;
220 return tpm_chip_register(chip);
223 static int crb_check_resource(struct acpi_resource *ares, void *data)
225 struct resource *io_res = data;
228 if (acpi_dev_resource_memory(ares, &res)) {
236 static void __iomem *crb_map_res(struct device *dev, struct crb_priv *priv,
237 struct resource *io_res, u64 start, u32 size)
239 struct resource new_res = {
241 .end = start + size - 1,
242 .flags = IORESOURCE_MEM,
245 /* Detect a 64 bit address on a 32 bit system */
246 if (start != new_res.start)
247 return (void __iomem *) ERR_PTR(-EINVAL);
249 if (!resource_contains(io_res, &new_res))
250 return devm_ioremap_resource(dev, &new_res);
252 return priv->iobase + (new_res.start - io_res->start);
255 static int crb_map_io(struct acpi_device *device, struct crb_priv *priv,
256 struct acpi_table_tpm2 *buf)
258 struct list_head resources;
259 struct resource io_res;
260 struct device *dev = &device->dev;
267 INIT_LIST_HEAD(&resources);
268 ret = acpi_dev_get_resources(device, &resources, crb_check_resource,
272 acpi_dev_free_resource_list(&resources);
274 if (resource_type(&io_res) != IORESOURCE_MEM) {
275 dev_err(dev, FW_BUG "TPM2 ACPI table does not define a memory resource\n");
279 priv->iobase = devm_ioremap_resource(dev, &io_res);
280 if (IS_ERR(priv->iobase))
281 return PTR_ERR(priv->iobase);
283 priv->cca = crb_map_res(dev, priv, &io_res, buf->control_address,
284 sizeof(struct crb_control_area));
285 if (IS_ERR(priv->cca))
286 return PTR_ERR(priv->cca);
288 cmd_pa = ((u64) ioread32(&priv->cca->cmd_pa_high) << 32) |
289 (u64) ioread32(&priv->cca->cmd_pa_low);
290 cmd_size = ioread32(&priv->cca->cmd_size);
291 priv->cmd = crb_map_res(dev, priv, &io_res, cmd_pa, cmd_size);
292 if (IS_ERR(priv->cmd))
293 return PTR_ERR(priv->cmd);
295 memcpy_fromio(&rsp_pa, &priv->cca->rsp_pa, 8);
296 rsp_pa = le64_to_cpu(rsp_pa);
297 rsp_size = ioread32(&priv->cca->rsp_size);
299 if (cmd_pa != rsp_pa) {
300 priv->rsp = crb_map_res(dev, priv, &io_res, rsp_pa, rsp_size);
301 return PTR_ERR_OR_ZERO(priv->rsp);
304 /* According to the PTP specification, overlapping command and response
305 * buffer sizes must be identical.
307 if (cmd_size != rsp_size) {
308 dev_err(dev, FW_BUG "overlapping command and response buffer sizes are not identical");
311 priv->cmd_size = cmd_size;
313 priv->rsp = priv->cmd;
317 static int crb_acpi_add(struct acpi_device *device)
319 struct acpi_table_tpm2 *buf;
320 struct crb_priv *priv;
321 struct device *dev = &device->dev;
326 status = acpi_get_table(ACPI_SIG_TPM2, 1,
327 (struct acpi_table_header **) &buf);
328 if (ACPI_FAILURE(status) || buf->header.length < sizeof(*buf)) {
329 dev_err(dev, FW_BUG "failed to get TPM2 ACPI table\n");
333 /* Should the FIFO driver handle this? */
334 sm = buf->start_method;
335 if (sm == ACPI_TPM2_MEMORY_MAPPED)
338 priv = devm_kzalloc(dev, sizeof(struct crb_priv), GFP_KERNEL);
342 /* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
343 * report only ACPI start but in practice seems to require both
344 * ACPI start and CRB start.
346 if (sm == ACPI_TPM2_COMMAND_BUFFER || sm == ACPI_TPM2_MEMORY_MAPPED ||
347 !strcmp(acpi_device_hid(device), "MSFT0101"))
348 priv->flags |= CRB_FL_CRB_START;
350 if (sm == ACPI_TPM2_START_METHOD ||
351 sm == ACPI_TPM2_COMMAND_BUFFER_WITH_START_METHOD)
352 priv->flags |= CRB_FL_ACPI_START;
354 rc = crb_map_io(device, priv, buf);
358 return crb_init(device, priv);
361 static int crb_acpi_remove(struct acpi_device *device)
363 struct device *dev = &device->dev;
364 struct tpm_chip *chip = dev_get_drvdata(dev);
366 tpm_chip_unregister(chip);
371 static struct acpi_device_id crb_device_ids[] = {
375 MODULE_DEVICE_TABLE(acpi, crb_device_ids);
377 static struct acpi_driver crb_acpi_driver = {
379 .ids = crb_device_ids,
382 .remove = crb_acpi_remove,
389 module_acpi_driver(crb_acpi_driver);
390 MODULE_AUTHOR("Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>");
391 MODULE_DESCRIPTION("TPM2 Driver");
392 MODULE_VERSION("0.1");
393 MODULE_LICENSE("GPL");