1 // SPDX-License-Identifier: GPL-2.0-only
3 * ps3vram - Use extra PS3 video ram as block device.
5 * Copyright 2009 Sony Corporation
7 * Based on the MTD ps3vram driver, which is
8 * Copyright (c) 2007-2008 Jim Paris <jim@jtan.com>
9 * Added support RSX DMA Vivien Chappelier <vivien.chappelier@free.fr>
12 #include <linux/blkdev.h>
13 #include <linux/delay.h>
14 #include <linux/module.h>
15 #include <linux/proc_fs.h>
16 #include <linux/seq_file.h>
17 #include <linux/slab.h>
19 #include <asm/cell-regs.h>
20 #include <asm/firmware.h>
21 #include <asm/lv1call.h>
23 #include <asm/ps3gpu.h>
26 #define DEVICE_NAME "ps3vram"
29 #define XDR_BUF_SIZE (2 * 1024 * 1024) /* XDR buffer (must be 1MiB aligned) */
30 #define XDR_IOIF 0x0c000000
32 #define FIFO_BASE XDR_IOIF
33 #define FIFO_SIZE (64 * 1024)
35 #define DMA_PAGE_SIZE (4 * 1024)
37 #define CACHE_PAGE_SIZE (256 * 1024)
38 #define CACHE_PAGE_COUNT ((XDR_BUF_SIZE - FIFO_SIZE) / CACHE_PAGE_SIZE)
40 #define CACHE_OFFSET CACHE_PAGE_SIZE
47 #define UPLOAD_SUBCH 1
48 #define DOWNLOAD_SUBCH 2
50 #define NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c
51 #define NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104
53 #define CACHE_PAGE_PRESENT 1
54 #define CACHE_PAGE_DIRTY 2
61 struct ps3vram_cache {
62 unsigned int page_count;
63 unsigned int page_size;
64 struct ps3vram_tag *tags;
70 struct request_queue *queue;
71 struct gendisk *gendisk;
78 void __iomem *reports;
84 struct ps3vram_cache cache;
86 spinlock_t lock; /* protecting list of bios */
91 static int ps3vram_major;
93 #define DMA_NOTIFIER_HANDLE_BASE 0x66604200 /* first DMA notifier handle */
94 #define DMA_NOTIFIER_OFFSET_BASE 0x1000 /* first DMA notifier offset */
95 #define DMA_NOTIFIER_SIZE 0x40
96 #define NOTIFIER 7 /* notifier used for completion report */
98 static char *size = "256M";
99 module_param(size, charp, 0);
100 MODULE_PARM_DESC(size, "memory size");
102 static u32 __iomem *ps3vram_get_notifier(void __iomem *reports, int notifier)
104 return reports + DMA_NOTIFIER_OFFSET_BASE +
105 DMA_NOTIFIER_SIZE * notifier;
108 static void ps3vram_notifier_reset(struct ps3_system_bus_device *dev)
110 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
111 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
114 for (i = 0; i < 4; i++)
115 iowrite32be(0xffffffff, notify + i);
118 static int ps3vram_notifier_wait(struct ps3_system_bus_device *dev,
119 unsigned int timeout_ms)
121 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
122 u32 __iomem *notify = ps3vram_get_notifier(priv->reports, NOTIFIER);
123 unsigned long timeout;
125 for (timeout = 20; timeout; timeout--) {
126 if (!ioread32be(notify + 3))
131 timeout = jiffies + msecs_to_jiffies(timeout_ms);
134 if (!ioread32be(notify + 3))
137 } while (time_before(jiffies, timeout));
142 static void ps3vram_init_ring(struct ps3_system_bus_device *dev)
144 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
146 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
147 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_GET);
150 static int ps3vram_wait_ring(struct ps3_system_bus_device *dev,
151 unsigned int timeout_ms)
153 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
154 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
157 if (ioread32be(priv->ctrl + CTRL_PUT) == ioread32be(priv->ctrl + CTRL_GET))
160 } while (time_before(jiffies, timeout));
162 dev_warn(&dev->core, "FIFO timeout (%08x/%08x/%08x)\n",
163 ioread32be(priv->ctrl + CTRL_PUT), ioread32be(priv->ctrl + CTRL_GET),
164 ioread32be(priv->ctrl + CTRL_TOP));
169 static void ps3vram_out_ring(struct ps3vram_priv *priv, u32 data)
171 *(priv->fifo_ptr)++ = data;
174 static void ps3vram_begin_ring(struct ps3vram_priv *priv, u32 chan, u32 tag,
177 ps3vram_out_ring(priv, (size << 18) | (chan << 13) | tag);
180 static void ps3vram_rewind_ring(struct ps3_system_bus_device *dev)
182 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
185 ps3vram_out_ring(priv, 0x20000000 | (FIFO_BASE + FIFO_OFFSET));
187 iowrite32be(FIFO_BASE + FIFO_OFFSET, priv->ctrl + CTRL_PUT);
189 /* asking the HV for a blit will kick the FIFO */
190 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
192 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
195 priv->fifo_ptr = priv->fifo_base;
198 static void ps3vram_fire_ring(struct ps3_system_bus_device *dev)
200 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
203 mutex_lock(&ps3_gpu_mutex);
205 iowrite32be(FIFO_BASE + FIFO_OFFSET + (priv->fifo_ptr - priv->fifo_base)
206 * sizeof(u32), priv->ctrl + CTRL_PUT);
208 /* asking the HV for a blit will kick the FIFO */
209 status = lv1_gpu_fb_blit(priv->context_handle, 0, 0, 0, 0);
211 dev_err(&dev->core, "%s: lv1_gpu_fb_blit failed %d\n",
214 if ((priv->fifo_ptr - priv->fifo_base) * sizeof(u32) >
216 dev_dbg(&dev->core, "FIFO full, rewinding\n");
217 ps3vram_wait_ring(dev, 200);
218 ps3vram_rewind_ring(dev);
221 mutex_unlock(&ps3_gpu_mutex);
224 static void ps3vram_bind(struct ps3_system_bus_device *dev)
226 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
228 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0, 1);
229 ps3vram_out_ring(priv, 0x31337303);
230 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x180, 3);
231 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
232 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
233 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
235 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0, 1);
236 ps3vram_out_ring(priv, 0x3137c0de);
237 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x180, 3);
238 ps3vram_out_ring(priv, DMA_NOTIFIER_HANDLE_BASE + NOTIFIER);
239 ps3vram_out_ring(priv, 0xfeed0000); /* DMA video RAM instance */
240 ps3vram_out_ring(priv, 0xfeed0001); /* DMA system RAM instance */
242 ps3vram_fire_ring(dev);
245 static int ps3vram_upload(struct ps3_system_bus_device *dev,
246 unsigned int src_offset, unsigned int dst_offset,
249 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
251 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
252 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
253 ps3vram_out_ring(priv, XDR_IOIF + src_offset);
254 ps3vram_out_ring(priv, dst_offset);
255 ps3vram_out_ring(priv, len);
256 ps3vram_out_ring(priv, len);
257 ps3vram_out_ring(priv, len);
258 ps3vram_out_ring(priv, count);
259 ps3vram_out_ring(priv, (1 << 8) | 1);
260 ps3vram_out_ring(priv, 0);
262 ps3vram_notifier_reset(dev);
263 ps3vram_begin_ring(priv, UPLOAD_SUBCH,
264 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
265 ps3vram_out_ring(priv, 0);
266 ps3vram_begin_ring(priv, UPLOAD_SUBCH, 0x100, 1);
267 ps3vram_out_ring(priv, 0);
268 ps3vram_fire_ring(dev);
269 if (ps3vram_notifier_wait(dev, 200) < 0) {
270 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
277 static int ps3vram_download(struct ps3_system_bus_device *dev,
278 unsigned int src_offset, unsigned int dst_offset,
281 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
283 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
284 NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
285 ps3vram_out_ring(priv, src_offset);
286 ps3vram_out_ring(priv, XDR_IOIF + dst_offset);
287 ps3vram_out_ring(priv, len);
288 ps3vram_out_ring(priv, len);
289 ps3vram_out_ring(priv, len);
290 ps3vram_out_ring(priv, count);
291 ps3vram_out_ring(priv, (1 << 8) | 1);
292 ps3vram_out_ring(priv, 0);
294 ps3vram_notifier_reset(dev);
295 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH,
296 NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY, 1);
297 ps3vram_out_ring(priv, 0);
298 ps3vram_begin_ring(priv, DOWNLOAD_SUBCH, 0x100, 1);
299 ps3vram_out_ring(priv, 0);
300 ps3vram_fire_ring(dev);
301 if (ps3vram_notifier_wait(dev, 200) < 0) {
302 dev_warn(&dev->core, "%s: Notifier timeout\n", __func__);
309 static void ps3vram_cache_evict(struct ps3_system_bus_device *dev, int entry)
311 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
312 struct ps3vram_cache *cache = &priv->cache;
314 if (!(cache->tags[entry].flags & CACHE_PAGE_DIRTY))
317 dev_dbg(&dev->core, "Flushing %d: 0x%08x\n", entry,
318 cache->tags[entry].address);
319 if (ps3vram_upload(dev, CACHE_OFFSET + entry * cache->page_size,
320 cache->tags[entry].address, DMA_PAGE_SIZE,
321 cache->page_size / DMA_PAGE_SIZE) < 0) {
323 "Failed to upload from 0x%x to " "0x%x size 0x%x\n",
324 entry * cache->page_size, cache->tags[entry].address,
327 cache->tags[entry].flags &= ~CACHE_PAGE_DIRTY;
330 static void ps3vram_cache_load(struct ps3_system_bus_device *dev, int entry,
331 unsigned int address)
333 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
334 struct ps3vram_cache *cache = &priv->cache;
336 dev_dbg(&dev->core, "Fetching %d: 0x%08x\n", entry, address);
337 if (ps3vram_download(dev, address,
338 CACHE_OFFSET + entry * cache->page_size,
340 cache->page_size / DMA_PAGE_SIZE) < 0) {
342 "Failed to download from 0x%x to 0x%x size 0x%x\n",
343 address, entry * cache->page_size, cache->page_size);
346 cache->tags[entry].address = address;
347 cache->tags[entry].flags |= CACHE_PAGE_PRESENT;
351 static void ps3vram_cache_flush(struct ps3_system_bus_device *dev)
353 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
354 struct ps3vram_cache *cache = &priv->cache;
357 dev_dbg(&dev->core, "FLUSH\n");
358 for (i = 0; i < cache->page_count; i++) {
359 ps3vram_cache_evict(dev, i);
360 cache->tags[i].flags = 0;
364 static unsigned int ps3vram_cache_match(struct ps3_system_bus_device *dev,
367 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
368 struct ps3vram_cache *cache = &priv->cache;
374 offset = (unsigned int) (address & (cache->page_size - 1));
375 base = (unsigned int) (address - offset);
377 /* fully associative check */
378 for (i = 0; i < cache->page_count; i++) {
379 if ((cache->tags[i].flags & CACHE_PAGE_PRESENT) &&
380 cache->tags[i].address == base) {
382 dev_dbg(&dev->core, "Found entry %d: 0x%08x\n", i,
383 cache->tags[i].address);
388 /* choose a random entry */
389 i = (jiffies + (counter++)) % cache->page_count;
390 dev_dbg(&dev->core, "Using entry %d\n", i);
392 ps3vram_cache_evict(dev, i);
393 ps3vram_cache_load(dev, i, base);
399 static int ps3vram_cache_init(struct ps3_system_bus_device *dev)
401 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
403 priv->cache.page_count = CACHE_PAGE_COUNT;
404 priv->cache.page_size = CACHE_PAGE_SIZE;
405 priv->cache.tags = kcalloc(CACHE_PAGE_COUNT,
406 sizeof(struct ps3vram_tag),
408 if (!priv->cache.tags)
411 dev_info(&dev->core, "Created ram cache: %d entries, %d KiB each\n",
412 CACHE_PAGE_COUNT, CACHE_PAGE_SIZE / 1024);
417 static void ps3vram_cache_cleanup(struct ps3_system_bus_device *dev)
419 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
421 ps3vram_cache_flush(dev);
422 kfree(priv->cache.tags);
425 static blk_status_t ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
426 size_t len, size_t *retlen, u_char *buf)
428 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
429 unsigned int cached, count;
431 dev_dbg(&dev->core, "%s: from=0x%08x len=0x%zx\n", __func__,
432 (unsigned int)from, len);
434 if (from >= priv->size)
435 return BLK_STS_IOERR;
437 if (len > priv->size - from)
438 len = priv->size - from;
440 /* Copy from vram to buf */
443 unsigned int offset, avail;
446 offset = (unsigned int) (from & (priv->cache.page_size - 1));
447 avail = priv->cache.page_size - offset;
449 entry = ps3vram_cache_match(dev, from);
450 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
452 dev_dbg(&dev->core, "%s: from=%08x cached=%08x offset=%08x "
453 "avail=%08x count=%08x\n", __func__,
454 (unsigned int)from, cached, offset, avail, count);
458 memcpy(buf, priv->xdr_buf + cached, avail);
469 static blk_status_t ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
470 size_t len, size_t *retlen, const u_char *buf)
472 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
473 unsigned int cached, count;
475 if (to >= priv->size)
476 return BLK_STS_IOERR;
478 if (len > priv->size - to)
479 len = priv->size - to;
481 /* Copy from buf to vram */
484 unsigned int offset, avail;
487 offset = (unsigned int) (to & (priv->cache.page_size - 1));
488 avail = priv->cache.page_size - offset;
490 entry = ps3vram_cache_match(dev, to);
491 cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
493 dev_dbg(&dev->core, "%s: to=%08x cached=%08x offset=%08x "
494 "avail=%08x count=%08x\n", __func__, (unsigned int)to,
495 cached, offset, avail, count);
499 memcpy(priv->xdr_buf + cached, buf, avail);
501 priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
512 static int ps3vram_proc_show(struct seq_file *m, void *v)
514 struct ps3vram_priv *priv = m->private;
516 seq_printf(m, "hit:%u\nmiss:%u\n", priv->cache.hit, priv->cache.miss);
520 static void ps3vram_proc_init(struct ps3_system_bus_device *dev)
522 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
523 struct proc_dir_entry *pde;
525 pde = proc_create_single_data(DEVICE_NAME, 0444, NULL,
526 ps3vram_proc_show, priv);
528 dev_warn(&dev->core, "failed to create /proc entry\n");
531 static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
534 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
535 int write = bio_data_dir(bio) == WRITE;
536 const char *op = write ? "write" : "read";
537 loff_t offset = bio->bi_iter.bi_sector << 9;
538 blk_status_t error = 0;
540 struct bvec_iter iter;
543 bio_for_each_segment(bvec, bio, iter) {
544 /* PS3 is ppc64, so we don't handle highmem */
545 char *ptr = page_address(bvec.bv_page) + bvec.bv_offset;
546 size_t len = bvec.bv_len, retlen;
548 dev_dbg(&dev->core, " %s %zu bytes at offset %llu\n", op,
551 error = ps3vram_write(dev, offset, len, &retlen, ptr);
553 error = ps3vram_read(dev, offset, len, &retlen, ptr);
556 dev_err(&dev->core, "%s failed\n", op);
561 dev_err(&dev->core, "Short %s\n", op);
562 error = BLK_STS_IOERR;
569 dev_dbg(&dev->core, "%s completed\n", op);
572 spin_lock_irq(&priv->lock);
573 bio_list_pop(&priv->list);
574 next = bio_list_peek(&priv->list);
575 spin_unlock_irq(&priv->lock);
577 bio->bi_status = error;
582 static blk_qc_t ps3vram_submit_bio(struct bio *bio)
584 struct ps3_system_bus_device *dev = bio->bi_disk->private_data;
585 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
588 dev_dbg(&dev->core, "%s\n", __func__);
590 blk_queue_split(&bio);
592 spin_lock_irq(&priv->lock);
593 busy = !bio_list_empty(&priv->list);
594 bio_list_add(&priv->list, bio);
595 spin_unlock_irq(&priv->lock);
598 return BLK_QC_T_NONE;
601 bio = ps3vram_do_bio(dev, bio);
604 return BLK_QC_T_NONE;
607 static const struct block_device_operations ps3vram_fops = {
608 .owner = THIS_MODULE,
609 .submit_bio = ps3vram_submit_bio,
612 static int ps3vram_probe(struct ps3_system_bus_device *dev)
614 struct ps3vram_priv *priv;
616 struct request_queue *queue;
617 struct gendisk *gendisk;
618 u64 ddr_size, ddr_lpar, ctrl_lpar, info_lpar, reports_lpar,
619 reports_size, xdr_lpar;
622 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
628 spin_lock_init(&priv->lock);
629 bio_list_init(&priv->list);
630 ps3_system_bus_set_drvdata(dev, priv);
632 /* Allocate XDR buffer (1MiB aligned) */
633 priv->xdr_buf = (void *)__get_free_pages(GFP_KERNEL,
634 get_order(XDR_BUF_SIZE));
635 if (priv->xdr_buf == NULL) {
636 dev_err(&dev->core, "Could not allocate XDR buffer\n");
641 /* Put FIFO at begginning of XDR buffer */
642 priv->fifo_base = (u32 *) (priv->xdr_buf + FIFO_OFFSET);
643 priv->fifo_ptr = priv->fifo_base;
645 /* XXX: Need to open GPU, in case ps3fb or snd_ps3 aren't loaded */
646 if (ps3_open_hv_device(dev)) {
647 dev_err(&dev->core, "ps3_open_hv_device failed\n");
649 goto out_free_xdr_buf;
654 ddr_size = ALIGN(memparse(size, &rest), 1024*1024);
656 dev_err(&dev->core, "Specified size is too small\n");
661 while (ddr_size > 0) {
662 status = lv1_gpu_memory_allocate(ddr_size, 0, 0, 0, 0,
663 &priv->memory_handle,
667 ddr_size -= 1024*1024;
670 dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
676 /* Request context */
677 status = lv1_gpu_context_allocate(priv->memory_handle, 0,
678 &priv->context_handle, &ctrl_lpar,
679 &info_lpar, &reports_lpar,
682 dev_err(&dev->core, "lv1_gpu_context_allocate failed %d\n",
685 goto out_free_memory;
688 /* Map XDR buffer to RSX */
689 xdr_lpar = ps3_mm_phys_to_lpar(__pa(priv->xdr_buf));
690 status = lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
691 xdr_lpar, XDR_BUF_SIZE,
692 CBE_IOPTE_PP_W | CBE_IOPTE_PP_R |
695 dev_err(&dev->core, "lv1_gpu_context_iomap failed %d\n",
698 goto out_free_context;
701 priv->ctrl = ioremap(ctrl_lpar, 64 * 1024);
703 dev_err(&dev->core, "ioremap CTRL failed\n");
705 goto out_unmap_context;
708 priv->reports = ioremap(reports_lpar, reports_size);
709 if (!priv->reports) {
710 dev_err(&dev->core, "ioremap REPORTS failed\n");
715 mutex_lock(&ps3_gpu_mutex);
716 ps3vram_init_ring(dev);
717 mutex_unlock(&ps3_gpu_mutex);
719 priv->size = ddr_size;
723 mutex_lock(&ps3_gpu_mutex);
724 error = ps3vram_wait_ring(dev, 100);
725 mutex_unlock(&ps3_gpu_mutex);
727 dev_err(&dev->core, "Failed to initialize channels\n");
729 goto out_unmap_reports;
732 error = ps3vram_cache_init(dev);
734 goto out_unmap_reports;
737 ps3vram_proc_init(dev);
739 queue = blk_alloc_queue(NUMA_NO_NODE);
741 dev_err(&dev->core, "blk_alloc_queue failed\n");
743 goto out_cache_cleanup;
747 blk_queue_max_segments(queue, BLK_MAX_SEGMENTS);
748 blk_queue_max_segment_size(queue, BLK_MAX_SEGMENT_SIZE);
749 blk_queue_max_hw_sectors(queue, BLK_SAFE_MAX_SECTORS);
751 gendisk = alloc_disk(1);
753 dev_err(&dev->core, "alloc_disk failed\n");
755 goto fail_cleanup_queue;
758 priv->gendisk = gendisk;
759 gendisk->major = ps3vram_major;
760 gendisk->first_minor = 0;
761 gendisk->fops = &ps3vram_fops;
762 gendisk->queue = queue;
763 gendisk->private_data = dev;
764 strlcpy(gendisk->disk_name, DEVICE_NAME, sizeof(gendisk->disk_name));
765 set_capacity(gendisk, priv->size >> 9);
767 dev_info(&dev->core, "%s: Using %llu MiB of GPU memory\n",
768 gendisk->disk_name, get_capacity(gendisk) >> 11);
770 device_add_disk(&dev->core, gendisk, NULL);
774 blk_cleanup_queue(queue);
776 remove_proc_entry(DEVICE_NAME, NULL);
777 ps3vram_cache_cleanup(dev);
779 iounmap(priv->reports);
783 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF, xdr_lpar,
784 XDR_BUF_SIZE, CBE_IOPTE_M);
786 lv1_gpu_context_free(priv->context_handle);
788 lv1_gpu_memory_free(priv->memory_handle);
790 ps3_close_hv_device(dev);
792 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
795 ps3_system_bus_set_drvdata(dev, NULL);
800 static int ps3vram_remove(struct ps3_system_bus_device *dev)
802 struct ps3vram_priv *priv = ps3_system_bus_get_drvdata(dev);
804 del_gendisk(priv->gendisk);
805 put_disk(priv->gendisk);
806 blk_cleanup_queue(priv->queue);
807 remove_proc_entry(DEVICE_NAME, NULL);
808 ps3vram_cache_cleanup(dev);
809 iounmap(priv->reports);
811 lv1_gpu_context_iomap(priv->context_handle, XDR_IOIF,
812 ps3_mm_phys_to_lpar(__pa(priv->xdr_buf)),
813 XDR_BUF_SIZE, CBE_IOPTE_M);
814 lv1_gpu_context_free(priv->context_handle);
815 lv1_gpu_memory_free(priv->memory_handle);
816 ps3_close_hv_device(dev);
817 free_pages((unsigned long) priv->xdr_buf, get_order(XDR_BUF_SIZE));
819 ps3_system_bus_set_drvdata(dev, NULL);
823 static struct ps3_system_bus_driver ps3vram = {
824 .match_id = PS3_MATCH_ID_GPU,
825 .match_sub_id = PS3_MATCH_SUB_ID_GPU_RAMDISK,
826 .core.name = DEVICE_NAME,
827 .core.owner = THIS_MODULE,
828 .probe = ps3vram_probe,
829 .remove = ps3vram_remove,
830 .shutdown = ps3vram_remove,
834 static int __init ps3vram_init(void)
838 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
841 error = register_blkdev(0, DEVICE_NAME);
843 pr_err("%s: register_blkdev failed %d\n", DEVICE_NAME, error);
846 ps3vram_major = error;
848 pr_info("%s: registered block device major %d\n", DEVICE_NAME,
851 error = ps3_system_bus_driver_register(&ps3vram);
853 unregister_blkdev(ps3vram_major, DEVICE_NAME);
858 static void __exit ps3vram_exit(void)
860 ps3_system_bus_driver_unregister(&ps3vram);
861 unregister_blkdev(ps3vram_major, DEVICE_NAME);
864 module_init(ps3vram_init);
865 module_exit(ps3vram_exit);
867 MODULE_LICENSE("GPL");
868 MODULE_DESCRIPTION("PS3 Video RAM Storage Driver");
869 MODULE_AUTHOR("Sony Corporation");
870 MODULE_ALIAS(PS3_MODULE_ALIAS_GPU_RAMDISK);