4 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
6 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
7 * It was taken from the frle-0.22 device driver.
8 * As the file doesn't have a copyright notice, in the file
9 * nicstarmac.copyright I put the copyright notice from the
10 * frle-0.22 device driver.
11 * Some code is based on the nicstar driver by M. Welsh.
13 * Author: Rui Prior (rprior@inescn.pt)
14 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
21 * IMPORTANT INFORMATION
23 * There are currently three types of spinlocks:
25 * 1 - Per card interrupt spinlock (to protect structures and such)
26 * 2 - Per SCQ scq spinlock
27 * 3 - Per card resource spinlock (to access registers, etc.)
29 * These must NEVER be grabbed in reverse order.
35 #include <linux/module.h>
36 #include <linux/kernel.h>
37 #include <linux/skbuff.h>
38 #include <linux/atmdev.h>
39 #include <linux/atm.h>
40 #include <linux/pci.h>
41 #include <linux/dma-mapping.h>
42 #include <linux/types.h>
43 #include <linux/string.h>
44 #include <linux/delay.h>
45 #include <linux/init.h>
46 #include <linux/sched.h>
47 #include <linux/timer.h>
48 #include <linux/interrupt.h>
49 #include <linux/bitops.h>
50 #include <linux/slab.h>
51 #include <linux/idr.h>
53 #include <asm/uaccess.h>
54 #include <linux/atomic.h>
55 #include <linux/etherdevice.h>
57 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
59 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
60 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
62 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
66 #include "nicstarmac.c"
68 /* Configurable parameters */
76 /* Do not touch these */
79 #define TXPRINTK(args...) printk(args)
81 #define TXPRINTK(args...)
85 #define RXPRINTK(args...) printk(args)
87 #define RXPRINTK(args...)
91 #define PRINTK(args...) printk(args)
93 #define PRINTK(args...)
94 #endif /* GENERAL_DEBUG */
97 #define XPRINTK(args...) printk(args)
99 #define XPRINTK(args...)
100 #endif /* EXTRA_DEBUG */
104 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
106 #define NS_DELAY mdelay(1)
108 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
111 #define ATM_SKB(s) (&(s)->atm)
114 #define scq_virt_to_bus(scq, p) \
115 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
117 /* Function declarations */
119 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
120 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
122 static int ns_init_card(int i, struct pci_dev *pcidev);
123 static void ns_init_card_error(ns_dev * card, int error);
124 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
125 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
126 static void push_rxbufs(ns_dev *, struct sk_buff *);
127 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
128 static int ns_open(struct atm_vcc *vcc);
129 static void ns_close(struct atm_vcc *vcc);
130 static void fill_tst(ns_dev * card, int n, vc_map * vc);
131 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
132 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
133 struct sk_buff *skb);
134 static void process_tsq(ns_dev * card);
135 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
136 static void process_rsq(ns_dev * card);
137 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
138 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
139 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
140 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
141 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
142 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
143 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
144 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
146 static void which_list(ns_dev * card, struct sk_buff *skb);
148 static void ns_poll(unsigned long arg);
149 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
151 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
153 /* Global variables */
155 static struct ns_dev *cards[NS_MAX_CARDS];
156 static unsigned num_cards;
157 static struct atmdev_ops atm_ops = {
162 .phy_put = ns_phy_put,
163 .phy_get = ns_phy_get,
164 .proc_read = ns_proc_read,
165 .owner = THIS_MODULE,
168 static struct timer_list ns_timer;
169 static char *mac[NS_MAX_CARDS];
170 module_param_array(mac, charp, NULL, 0);
171 MODULE_LICENSE("GPL");
175 static int nicstar_init_one(struct pci_dev *pcidev,
176 const struct pci_device_id *ent)
178 static int index = -1;
184 error = ns_init_card(index, pcidev);
186 cards[index--] = NULL; /* don't increment index */
195 static void nicstar_remove_one(struct pci_dev *pcidev)
198 ns_dev *card = pci_get_drvdata(pcidev);
200 struct sk_buff *iovb;
206 if (cards[i] == NULL)
209 if (card->atmdev->phy && card->atmdev->phy->stop)
210 card->atmdev->phy->stop(card->atmdev);
212 /* Stop everything */
213 writel(0x00000000, card->membase + CFG);
215 /* De-register device */
216 atm_dev_deregister(card->atmdev);
218 /* Disable PCI device */
219 pci_disable_device(pcidev);
221 /* Free up resources */
223 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
224 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
225 dev_kfree_skb_any(hb);
228 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
230 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
231 card->iovpool.count);
232 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
233 dev_kfree_skb_any(iovb);
236 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
237 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
238 dev_kfree_skb_any(lb);
239 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
240 dev_kfree_skb_any(sb);
241 free_scq(card, card->scq0, NULL);
242 for (j = 0; j < NS_FRSCD_NUM; j++) {
243 if (card->scd2vc[j] != NULL)
244 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
246 idr_destroy(&card->idr);
247 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
248 card->rsq.org, card->rsq.dma);
249 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
250 card->tsq.org, card->tsq.dma);
251 free_irq(card->pcidev->irq, card);
252 iounmap(card->membase);
256 static struct pci_device_id nicstar_pci_tbl[] = {
257 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
258 {0,} /* terminate list */
261 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
263 static struct pci_driver nicstar_driver = {
265 .id_table = nicstar_pci_tbl,
266 .probe = nicstar_init_one,
267 .remove = nicstar_remove_one,
270 static int __init nicstar_init(void)
272 unsigned error = 0; /* Initialized to remove compile warning */
274 XPRINTK("nicstar: nicstar_init() called.\n");
276 error = pci_register_driver(&nicstar_driver);
278 TXPRINTK("nicstar: TX debug enabled.\n");
279 RXPRINTK("nicstar: RX debug enabled.\n");
280 PRINTK("nicstar: General debug enabled.\n");
282 printk("nicstar: using PHY loopback.\n");
283 #endif /* PHY_LOOPBACK */
284 XPRINTK("nicstar: nicstar_init() returned.\n");
287 init_timer(&ns_timer);
288 ns_timer.expires = jiffies + NS_POLL_PERIOD;
290 ns_timer.function = ns_poll;
291 add_timer(&ns_timer);
297 static void __exit nicstar_cleanup(void)
299 XPRINTK("nicstar: nicstar_cleanup() called.\n");
301 del_timer_sync(&ns_timer);
303 pci_unregister_driver(&nicstar_driver);
305 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
308 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
313 sram_address &= 0x0007FFFC; /* address must be dword aligned */
314 sram_address |= 0x50000000; /* SRAM read command */
315 spin_lock_irqsave(&card->res_lock, flags);
316 while (CMD_BUSY(card)) ;
317 writel(sram_address, card->membase + CMD);
318 while (CMD_BUSY(card)) ;
319 data = readl(card->membase + DR0);
320 spin_unlock_irqrestore(&card->res_lock, flags);
324 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
329 count--; /* count range now is 0..3 instead of 1..4 */
331 c <<= 2; /* to use increments of 4 */
332 spin_lock_irqsave(&card->res_lock, flags);
333 while (CMD_BUSY(card)) ;
334 for (i = 0; i <= c; i += 4)
335 writel(*(value++), card->membase + i);
336 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
337 so card->membase + DR0 == card->membase */
339 sram_address &= 0x0007FFFC;
340 sram_address |= (0x40000000 | count);
341 writel(sram_address, card->membase + CMD);
342 spin_unlock_irqrestore(&card->res_lock, flags);
345 static int ns_init_card(int i, struct pci_dev *pcidev)
348 struct ns_dev *card = NULL;
349 unsigned char pci_latency;
355 unsigned long membase;
359 if (pci_enable_device(pcidev)) {
360 printk("nicstar%d: can't enable PCI device\n", i);
362 ns_init_card_error(card, error);
365 if (dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)) != 0) {
367 "nicstar%d: No suitable DMA available.\n", i);
369 ns_init_card_error(card, error);
373 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL) {
375 ("nicstar%d: can't allocate memory for device structure.\n",
378 ns_init_card_error(card, error);
382 spin_lock_init(&card->int_lock);
383 spin_lock_init(&card->res_lock);
385 pci_set_drvdata(pcidev, card);
389 card->pcidev = pcidev;
390 membase = pci_resource_start(pcidev, 1);
391 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
392 if (!card->membase) {
393 printk("nicstar%d: can't ioremap() membase.\n", i);
395 ns_init_card_error(card, error);
398 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
400 pci_set_master(pcidev);
402 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
403 printk("nicstar%d: can't read PCI latency timer.\n", i);
405 ns_init_card_error(card, error);
408 #ifdef NS_PCI_LATENCY
409 if (pci_latency < NS_PCI_LATENCY) {
410 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
412 for (j = 1; j < 4; j++) {
413 if (pci_write_config_byte
414 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
419 ("nicstar%d: can't set PCI latency timer to %d.\n",
422 ns_init_card_error(card, error);
426 #endif /* NS_PCI_LATENCY */
428 /* Clear timer overflow */
429 data = readl(card->membase + STAT);
430 if (data & NS_STAT_TMROF)
431 writel(NS_STAT_TMROF, card->membase + STAT);
434 writel(NS_CFG_SWRST, card->membase + CFG);
436 writel(0x00000000, card->membase + CFG);
439 writel(0x00000008, card->membase + GP);
441 writel(0x00000001, card->membase + GP);
443 while (CMD_BUSY(card)) ;
444 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
447 /* Detect PHY type */
448 while (CMD_BUSY(card)) ;
449 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
450 while (CMD_BUSY(card)) ;
451 data = readl(card->membase + DR0);
454 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
455 card->max_pcr = ATM_25_PCR;
456 while (CMD_BUSY(card)) ;
457 writel(0x00000008, card->membase + DR0);
458 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
459 /* Clear an eventual pending interrupt */
460 writel(NS_STAT_SFBQF, card->membase + STAT);
462 while (CMD_BUSY(card)) ;
463 writel(0x00000022, card->membase + DR0);
464 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
465 #endif /* PHY_LOOPBACK */
469 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
470 card->max_pcr = ATM_OC3_PCR;
472 while (CMD_BUSY(card)) ;
473 writel(0x00000002, card->membase + DR0);
474 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
475 #endif /* PHY_LOOPBACK */
478 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
480 ns_init_card_error(card, error);
483 writel(0x00000000, card->membase + GP);
485 /* Determine SRAM size */
487 ns_write_sram(card, 0x1C003, &data, 1);
489 ns_write_sram(card, 0x14003, &data, 1);
490 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
491 ns_read_sram(card, 0x1C003) == 0x76543210)
492 card->sram_size = 128;
494 card->sram_size = 32;
495 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
497 card->rct_size = NS_MAX_RCTSIZE;
499 #if (NS_MAX_RCTSIZE == 4096)
500 if (card->sram_size == 128)
502 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
504 #elif (NS_MAX_RCTSIZE == 16384)
505 if (card->sram_size == 32) {
507 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
509 card->rct_size = 4096;
512 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
515 card->vpibits = NS_VPIBITS;
516 if (card->rct_size == 4096)
517 card->vcibits = 12 - NS_VPIBITS;
518 else /* card->rct_size == 16384 */
519 card->vcibits = 14 - NS_VPIBITS;
521 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
523 nicstar_init_eprom(card->membase);
525 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
526 writel(0x00000000, card->membase + VPM);
530 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
531 pr_err("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
533 ns_init_card_error(card, error);
538 card->tsq.org = dma_alloc_coherent(&card->pcidev->dev,
539 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
540 &card->tsq.dma, GFP_KERNEL);
541 if (card->tsq.org == NULL) {
542 printk("nicstar%d: can't allocate TSQ.\n", i);
544 ns_init_card_error(card, error);
547 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
548 card->tsq.next = card->tsq.base;
549 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
550 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
551 ns_tsi_init(card->tsq.base + j);
552 writel(0x00000000, card->membase + TSQH);
553 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
554 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
557 card->rsq.org = dma_alloc_coherent(&card->pcidev->dev,
558 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
559 &card->rsq.dma, GFP_KERNEL);
560 if (card->rsq.org == NULL) {
561 printk("nicstar%d: can't allocate RSQ.\n", i);
563 ns_init_card_error(card, error);
566 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
567 card->rsq.next = card->rsq.base;
568 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
569 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
570 ns_rsqe_init(card->rsq.base + j);
571 writel(0x00000000, card->membase + RSQH);
572 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
573 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
575 /* Initialize SCQ0, the only VBR SCQ used */
578 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
579 if (card->scq0 == NULL) {
580 printk("nicstar%d: can't get SCQ0.\n", i);
582 ns_init_card_error(card, error);
585 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
586 u32d[1] = (u32) 0x00000000;
587 u32d[2] = (u32) 0xffffffff;
588 u32d[3] = (u32) 0x00000000;
589 ns_write_sram(card, NS_VRSCD0, u32d, 4);
590 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
591 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
592 card->scq0->scd = NS_VRSCD0;
593 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
595 /* Initialize TSTs */
596 card->tst_addr = NS_TST0;
597 card->tst_free_entries = NS_TST_NUM_ENTRIES;
598 data = NS_TST_OPCODE_VARIABLE;
599 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
600 ns_write_sram(card, NS_TST0 + j, &data, 1);
601 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
602 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
603 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
604 ns_write_sram(card, NS_TST1 + j, &data, 1);
605 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
606 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
607 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
608 card->tste2vc[j] = NULL;
609 writel(NS_TST0 << 2, card->membase + TSTB);
611 /* Initialize RCT. AAL type is set on opening the VC. */
613 u32d[0] = NS_RCTE_RAWCELLINTEN;
615 u32d[0] = 0x00000000;
616 #endif /* RCQ_SUPPORT */
617 u32d[1] = 0x00000000;
618 u32d[2] = 0x00000000;
619 u32d[3] = 0xFFFFFFFF;
620 for (j = 0; j < card->rct_size; j++)
621 ns_write_sram(card, j * 4, u32d, 4);
623 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
625 for (j = 0; j < NS_FRSCD_NUM; j++)
626 card->scd2vc[j] = NULL;
628 /* Initialize buffer levels */
629 card->sbnr.min = MIN_SB;
630 card->sbnr.init = NUM_SB;
631 card->sbnr.max = MAX_SB;
632 card->lbnr.min = MIN_LB;
633 card->lbnr.init = NUM_LB;
634 card->lbnr.max = MAX_LB;
635 card->iovnr.min = MIN_IOVB;
636 card->iovnr.init = NUM_IOVB;
637 card->iovnr.max = MAX_IOVB;
638 card->hbnr.min = MIN_HB;
639 card->hbnr.init = NUM_HB;
640 card->hbnr.max = MAX_HB;
642 card->sm_handle = NULL;
643 card->sm_addr = 0x00000000;
644 card->lg_handle = NULL;
645 card->lg_addr = 0x00000000;
647 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
649 idr_init(&card->idr);
651 /* Pre-allocate some huge buffers */
652 skb_queue_head_init(&card->hbpool.queue);
653 card->hbpool.count = 0;
654 for (j = 0; j < NUM_HB; j++) {
656 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
659 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
662 ns_init_card_error(card, error);
665 NS_PRV_BUFTYPE(hb) = BUF_NONE;
666 skb_queue_tail(&card->hbpool.queue, hb);
667 card->hbpool.count++;
670 /* Allocate large buffers */
671 skb_queue_head_init(&card->lbpool.queue);
672 card->lbpool.count = 0; /* Not used */
673 for (j = 0; j < NUM_LB; j++) {
675 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
678 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
681 ns_init_card_error(card, error);
684 NS_PRV_BUFTYPE(lb) = BUF_LG;
685 skb_queue_tail(&card->lbpool.queue, lb);
686 skb_reserve(lb, NS_SMBUFSIZE);
687 push_rxbufs(card, lb);
688 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
691 card->rawcell = (struct ns_rcqe *) lb->data;
692 card->rawch = NS_PRV_DMA(lb);
695 /* Test for strange behaviour which leads to crashes */
697 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
699 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
702 ns_init_card_error(card, error);
706 /* Allocate small buffers */
707 skb_queue_head_init(&card->sbpool.queue);
708 card->sbpool.count = 0; /* Not used */
709 for (j = 0; j < NUM_SB; j++) {
711 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
714 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
717 ns_init_card_error(card, error);
720 NS_PRV_BUFTYPE(sb) = BUF_SM;
721 skb_queue_tail(&card->sbpool.queue, sb);
722 skb_reserve(sb, NS_AAL0_HEADER);
723 push_rxbufs(card, sb);
725 /* Test for strange behaviour which leads to crashes */
727 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
729 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
732 ns_init_card_error(card, error);
736 /* Allocate iovec buffers */
737 skb_queue_head_init(&card->iovpool.queue);
738 card->iovpool.count = 0;
739 for (j = 0; j < NUM_IOVB; j++) {
740 struct sk_buff *iovb;
741 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
744 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
747 ns_init_card_error(card, error);
750 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
751 skb_queue_tail(&card->iovpool.queue, iovb);
752 card->iovpool.count++;
755 /* Configure NICStAR */
756 if (card->rct_size == 4096)
757 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
758 else /* (card->rct_size == 16384) */
759 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
763 /* Register device */
764 card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
766 if (card->atmdev == NULL) {
767 printk("nicstar%d: can't register device.\n", i);
769 ns_init_card_error(card, error);
773 if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) {
774 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
775 card->atmdev->esi, 6);
776 if (ether_addr_equal(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00")) {
777 nicstar_read_eprom(card->membase,
778 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
779 card->atmdev->esi, 6);
783 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
785 card->atmdev->dev_data = card;
786 card->atmdev->ci_range.vpi_bits = card->vpibits;
787 card->atmdev->ci_range.vci_bits = card->vcibits;
788 card->atmdev->link_rate = card->max_pcr;
789 card->atmdev->phy = NULL;
791 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
792 if (card->max_pcr == ATM_OC3_PCR)
793 suni_init(card->atmdev);
794 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
796 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
797 if (card->max_pcr == ATM_25_PCR)
798 idt77105_init(card->atmdev);
799 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
801 if (card->atmdev->phy && card->atmdev->phy->start)
802 card->atmdev->phy->start(card->atmdev);
804 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
805 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
806 NS_CFG_PHYIE, card->membase + CFG);
813 static void ns_init_card_error(ns_dev *card, int error)
816 writel(0x00000000, card->membase + CFG);
819 struct sk_buff *iovb;
820 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
821 dev_kfree_skb_any(iovb);
825 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
826 dev_kfree_skb_any(sb);
827 free_scq(card, card->scq0, NULL);
831 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
832 dev_kfree_skb_any(lb);
836 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
837 dev_kfree_skb_any(hb);
840 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
841 card->rsq.org, card->rsq.dma);
844 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
845 card->tsq.org, card->tsq.dma);
848 free_irq(card->pcidev->irq, card);
851 iounmap(card->membase);
854 pci_disable_device(card->pcidev);
859 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
864 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
867 scq = kmalloc(sizeof(scq_info), GFP_KERNEL);
870 scq->org = dma_alloc_coherent(&card->pcidev->dev,
871 2 * size, &scq->dma, GFP_KERNEL);
876 scq->skb = kmalloc(sizeof(struct sk_buff *) *
877 (size / NS_SCQE_SIZE), GFP_KERNEL);
883 scq->num_entries = size / NS_SCQE_SIZE;
884 scq->base = PTR_ALIGN(scq->org, size);
885 scq->next = scq->base;
886 scq->last = scq->base + (scq->num_entries - 1);
887 scq->tail = scq->last;
889 scq->num_entries = size / NS_SCQE_SIZE;
891 init_waitqueue_head(&scq->scqfull_waitq);
893 spin_lock_init(&scq->lock);
895 for (i = 0; i < scq->num_entries; i++)
901 /* For variable rate SCQ vcc must be NULL */
902 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
906 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
907 for (i = 0; i < scq->num_entries; i++) {
908 if (scq->skb[i] != NULL) {
909 vcc = ATM_SKB(scq->skb[i])->vcc;
910 if (vcc->pop != NULL)
911 vcc->pop(vcc, scq->skb[i]);
913 dev_kfree_skb_any(scq->skb[i]);
915 } else { /* vcc must be != NULL */
919 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
920 for (i = 0; i < scq->num_entries; i++)
921 dev_kfree_skb_any(scq->skb[i]);
923 for (i = 0; i < scq->num_entries; i++) {
924 if (scq->skb[i] != NULL) {
925 if (vcc->pop != NULL)
926 vcc->pop(vcc, scq->skb[i]);
928 dev_kfree_skb_any(scq->skb[i]);
933 dma_free_coherent(&card->pcidev->dev,
934 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
935 VBR_SCQSIZE : CBR_SCQSIZE),
940 /* The handles passed must be pointers to the sk_buff containing the small
941 or large buffer(s) cast to u32. */
942 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
944 struct sk_buff *handle1, *handle2;
954 addr1 = dma_map_single(&card->pcidev->dev,
956 (NS_PRV_BUFTYPE(skb) == BUF_SM
957 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
959 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
963 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
965 #endif /* GENERAL_DEBUG */
967 stat = readl(card->membase + STAT);
968 card->sbfqc = ns_stat_sfbqc_get(stat);
969 card->lbfqc = ns_stat_lfbqc_get(stat);
970 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
973 addr2 = card->sm_addr;
974 handle2 = card->sm_handle;
975 card->sm_addr = 0x00000000;
976 card->sm_handle = NULL;
977 } else { /* (!sm_addr) */
979 card->sm_addr = addr1;
980 card->sm_handle = handle1;
983 } else { /* buf_type == BUF_LG */
987 addr2 = card->lg_addr;
988 handle2 = card->lg_handle;
989 card->lg_addr = 0x00000000;
990 card->lg_handle = NULL;
991 } else { /* (!lg_addr) */
993 card->lg_addr = addr1;
994 card->lg_handle = handle1;
1000 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1001 if (card->sbfqc >= card->sbnr.max) {
1002 skb_unlink(handle1, &card->sbpool.queue);
1003 dev_kfree_skb_any(handle1);
1004 skb_unlink(handle2, &card->sbpool.queue);
1005 dev_kfree_skb_any(handle2);
1009 } else { /* (buf_type == BUF_LG) */
1011 if (card->lbfqc >= card->lbnr.max) {
1012 skb_unlink(handle1, &card->lbpool.queue);
1013 dev_kfree_skb_any(handle1);
1014 skb_unlink(handle2, &card->lbpool.queue);
1015 dev_kfree_skb_any(handle2);
1021 id1 = idr_alloc(&card->idr, handle1, 0, 0, GFP_ATOMIC);
1025 id2 = idr_alloc(&card->idr, handle2, 0, 0, GFP_ATOMIC);
1029 spin_lock_irqsave(&card->res_lock, flags);
1030 while (CMD_BUSY(card)) ;
1031 writel(addr2, card->membase + DR3);
1032 writel(id2, card->membase + DR2);
1033 writel(addr1, card->membase + DR1);
1034 writel(id1, card->membase + DR0);
1035 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1036 card->membase + CMD);
1037 spin_unlock_irqrestore(&card->res_lock, flags);
1039 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1041 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1045 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1046 card->lbfqc >= card->lbnr.min) {
1048 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1049 card->membase + CFG);
1056 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1060 struct atm_dev *dev;
1061 unsigned long flags;
1063 card = (ns_dev *) dev_id;
1067 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1069 spin_lock_irqsave(&card->int_lock, flags);
1071 stat_r = readl(card->membase + STAT);
1073 /* Transmit Status Indicator has been written to T. S. Queue */
1074 if (stat_r & NS_STAT_TSIF) {
1075 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1077 writel(NS_STAT_TSIF, card->membase + STAT);
1080 /* Incomplete CS-PDU has been transmitted */
1081 if (stat_r & NS_STAT_TXICP) {
1082 writel(NS_STAT_TXICP, card->membase + STAT);
1083 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1087 /* Transmit Status Queue 7/8 full */
1088 if (stat_r & NS_STAT_TSQF) {
1089 writel(NS_STAT_TSQF, card->membase + STAT);
1090 PRINTK("nicstar%d: TSQ full.\n", card->index);
1094 /* Timer overflow */
1095 if (stat_r & NS_STAT_TMROF) {
1096 writel(NS_STAT_TMROF, card->membase + STAT);
1097 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1100 /* PHY device interrupt signal active */
1101 if (stat_r & NS_STAT_PHYI) {
1102 writel(NS_STAT_PHYI, card->membase + STAT);
1103 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1104 if (dev->phy && dev->phy->interrupt) {
1105 dev->phy->interrupt(dev);
1109 /* Small Buffer Queue is full */
1110 if (stat_r & NS_STAT_SFBQF) {
1111 writel(NS_STAT_SFBQF, card->membase + STAT);
1112 printk("nicstar%d: Small free buffer queue is full.\n",
1116 /* Large Buffer Queue is full */
1117 if (stat_r & NS_STAT_LFBQF) {
1118 writel(NS_STAT_LFBQF, card->membase + STAT);
1119 printk("nicstar%d: Large free buffer queue is full.\n",
1123 /* Receive Status Queue is full */
1124 if (stat_r & NS_STAT_RSQF) {
1125 writel(NS_STAT_RSQF, card->membase + STAT);
1126 printk("nicstar%d: RSQ full.\n", card->index);
1130 /* Complete CS-PDU received */
1131 if (stat_r & NS_STAT_EOPDU) {
1132 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1134 writel(NS_STAT_EOPDU, card->membase + STAT);
1137 /* Raw cell received */
1138 if (stat_r & NS_STAT_RAWCF) {
1139 writel(NS_STAT_RAWCF, card->membase + STAT);
1141 printk("nicstar%d: Raw cell received and no support yet...\n",
1143 #endif /* RCQ_SUPPORT */
1144 /* NOTE: the following procedure may keep a raw cell pending until the
1145 next interrupt. As this preliminary support is only meant to
1146 avoid buffer leakage, this is not an issue. */
1147 while (readl(card->membase + RAWCT) != card->rawch) {
1149 if (ns_rcqe_islast(card->rawcell)) {
1150 struct sk_buff *oldbuf;
1152 oldbuf = card->rcbuf;
1153 card->rcbuf = idr_find(&card->idr,
1154 ns_rcqe_nextbufhandle(card->rawcell));
1155 card->rawch = NS_PRV_DMA(card->rcbuf);
1156 card->rawcell = (struct ns_rcqe *)
1158 recycle_rx_buf(card, oldbuf);
1160 card->rawch += NS_RCQE_SIZE;
1166 /* Small buffer queue is empty */
1167 if (stat_r & NS_STAT_SFBQE) {
1171 writel(NS_STAT_SFBQE, card->membase + STAT);
1172 printk("nicstar%d: Small free buffer queue empty.\n",
1174 for (i = 0; i < card->sbnr.min; i++) {
1175 sb = dev_alloc_skb(NS_SMSKBSIZE);
1177 writel(readl(card->membase + CFG) &
1178 ~NS_CFG_EFBIE, card->membase + CFG);
1182 NS_PRV_BUFTYPE(sb) = BUF_SM;
1183 skb_queue_tail(&card->sbpool.queue, sb);
1184 skb_reserve(sb, NS_AAL0_HEADER);
1185 push_rxbufs(card, sb);
1191 /* Large buffer queue empty */
1192 if (stat_r & NS_STAT_LFBQE) {
1196 writel(NS_STAT_LFBQE, card->membase + STAT);
1197 printk("nicstar%d: Large free buffer queue empty.\n",
1199 for (i = 0; i < card->lbnr.min; i++) {
1200 lb = dev_alloc_skb(NS_LGSKBSIZE);
1202 writel(readl(card->membase + CFG) &
1203 ~NS_CFG_EFBIE, card->membase + CFG);
1207 NS_PRV_BUFTYPE(lb) = BUF_LG;
1208 skb_queue_tail(&card->lbpool.queue, lb);
1209 skb_reserve(lb, NS_SMBUFSIZE);
1210 push_rxbufs(card, lb);
1216 /* Receive Status Queue is 7/8 full */
1217 if (stat_r & NS_STAT_RSQAF) {
1218 writel(NS_STAT_RSQAF, card->membase + STAT);
1219 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1223 spin_unlock_irqrestore(&card->int_lock, flags);
1224 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1228 static int ns_open(struct atm_vcc *vcc)
1232 unsigned long tmpl, modl;
1233 int tcr, tcra; /* target cell rate, and absolute value */
1234 int n = 0; /* Number of entries in the TST. Initialized to remove
1235 the compiler warning. */
1237 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1238 warning. How I wish compilers were clever enough to
1239 tell which variables can truly be used
1241 int inuse; /* tx or rx vc already in use by another vcc */
1242 short vpi = vcc->vpi;
1245 card = (ns_dev *) vcc->dev->dev_data;
1246 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1248 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1249 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1253 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1257 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1259 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1262 printk("nicstar%d: %s vci already in use.\n", card->index,
1263 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1267 set_bit(ATM_VF_ADDR, &vcc->flags);
1269 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1270 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1271 needed to do that. */
1272 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1275 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1276 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1277 /* Check requested cell rate and availability of SCD */
1278 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1279 && vcc->qos.txtp.min_pcr == 0) {
1281 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1283 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1284 clear_bit(ATM_VF_ADDR, &vcc->flags);
1288 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1289 tcra = tcr >= 0 ? tcr : -tcr;
1291 PRINTK("nicstar%d: target cell rate = %d.\n",
1292 card->index, vcc->qos.txtp.max_pcr);
1295 (unsigned long)tcra *(unsigned long)
1297 modl = tmpl % card->max_pcr;
1299 n = (int)(tmpl / card->max_pcr);
1303 } else if (tcr == 0) {
1305 (card->tst_free_entries -
1306 NS_TST_RESERVED)) <= 0) {
1308 ("nicstar%d: no CBR bandwidth free.\n",
1310 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1311 clear_bit(ATM_VF_ADDR, &vcc->flags);
1318 ("nicstar%d: selected bandwidth < granularity.\n",
1320 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1321 clear_bit(ATM_VF_ADDR, &vcc->flags);
1325 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1327 ("nicstar%d: not enough free CBR bandwidth.\n",
1329 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1330 clear_bit(ATM_VF_ADDR, &vcc->flags);
1333 card->tst_free_entries -= n;
1335 XPRINTK("nicstar%d: writing %d tst entries.\n",
1337 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1338 if (card->scd2vc[frscdi] == NULL) {
1339 card->scd2vc[frscdi] = vc;
1343 if (frscdi == NS_FRSCD_NUM) {
1345 ("nicstar%d: no SCD available for CBR channel.\n",
1347 card->tst_free_entries += n;
1348 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1349 clear_bit(ATM_VF_ADDR, &vcc->flags);
1353 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1355 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1357 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1359 card->scd2vc[frscdi] = NULL;
1360 card->tst_free_entries += n;
1361 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1362 clear_bit(ATM_VF_ADDR, &vcc->flags);
1366 u32d[0] = scq_virt_to_bus(scq, scq->base);
1367 u32d[1] = (u32) 0x00000000;
1368 u32d[2] = (u32) 0xffffffff;
1369 u32d[3] = (u32) 0x00000000;
1370 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1372 fill_tst(card, n, vc);
1373 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1374 vc->cbr_scd = 0x00000000;
1375 vc->scq = card->scq0;
1378 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1383 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1390 /* Open the connection in hardware */
1391 if (vcc->qos.aal == ATM_AAL5)
1392 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1393 else /* vcc->qos.aal == ATM_AAL0 */
1394 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1396 status |= NS_RCTE_RAWCELLINTEN;
1397 #endif /* RCQ_SUPPORT */
1400 (vpi << card->vcibits | vci) *
1401 NS_RCT_ENTRY_SIZE, &status, 1);
1406 set_bit(ATM_VF_READY, &vcc->flags);
1410 static void ns_close(struct atm_vcc *vcc)
1418 card = vcc->dev->dev_data;
1419 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1420 (int)vcc->vpi, vcc->vci);
1422 clear_bit(ATM_VF_READY, &vcc->flags);
1424 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1426 unsigned long flags;
1430 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1431 spin_lock_irqsave(&card->res_lock, flags);
1432 while (CMD_BUSY(card)) ;
1433 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1434 card->membase + CMD);
1435 spin_unlock_irqrestore(&card->res_lock, flags);
1438 if (vc->rx_iov != NULL) {
1439 struct sk_buff *iovb;
1442 stat = readl(card->membase + STAT);
1443 card->sbfqc = ns_stat_sfbqc_get(stat);
1444 card->lbfqc = ns_stat_lfbqc_get(stat);
1447 ("nicstar%d: closing a VC with pending rx buffers.\n",
1450 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1451 NS_PRV_IOVCNT(iovb));
1452 NS_PRV_IOVCNT(iovb) = 0;
1453 spin_lock_irqsave(&card->int_lock, flags);
1454 recycle_iov_buf(card, iovb);
1455 spin_unlock_irqrestore(&card->int_lock, flags);
1460 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1464 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1465 unsigned long flags;
1472 spin_lock_irqsave(&scq->lock, flags);
1474 if (scqep == scq->base)
1478 if (scqep == scq->tail) {
1479 spin_unlock_irqrestore(&scq->lock, flags);
1482 /* If the last entry is not a TSR, place one in the SCQ in order to
1483 be able to completely drain it and then close. */
1484 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1490 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1491 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1492 scqi = scq->next - scq->base;
1493 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1494 tsr.word_3 = 0x00000000;
1495 tsr.word_4 = 0x00000000;
1498 scq->skb[index] = NULL;
1499 if (scq->next == scq->last)
1500 scq->next = scq->base;
1503 data = scq_virt_to_bus(scq, scq->next);
1504 ns_write_sram(card, scq->scd, &data, 1);
1506 spin_unlock_irqrestore(&scq->lock, flags);
1510 /* Free all TST entries */
1511 data = NS_TST_OPCODE_VARIABLE;
1512 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1513 if (card->tste2vc[i] == vc) {
1514 ns_write_sram(card, card->tst_addr + i, &data,
1516 card->tste2vc[i] = NULL;
1517 card->tst_free_entries++;
1521 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1522 free_scq(card, vc->scq, vcc);
1525 /* remove all references to vcc before deleting it */
1526 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1527 unsigned long flags;
1528 scq_info *scq = card->scq0;
1530 spin_lock_irqsave(&scq->lock, flags);
1532 for (i = 0; i < scq->num_entries; i++) {
1533 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1534 ATM_SKB(scq->skb[i])->vcc = NULL;
1535 atm_return(vcc, scq->skb[i]->truesize);
1537 ("nicstar: deleted pending vcc mapping\n");
1541 spin_unlock_irqrestore(&scq->lock, flags);
1544 vcc->dev_data = NULL;
1545 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1546 clear_bit(ATM_VF_ADDR, &vcc->flags);
1551 stat = readl(card->membase + STAT);
1552 cfg = readl(card->membase + CFG);
1553 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1555 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1556 card->tsq.base, card->tsq.next,
1557 card->tsq.last, readl(card->membase + TSQT));
1559 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1560 card->rsq.base, card->rsq.next,
1561 card->rsq.last, readl(card->membase + RSQT));
1562 printk("Empty free buffer queue interrupt %s \n",
1563 card->efbie ? "enabled" : "disabled");
1564 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1565 ns_stat_sfbqc_get(stat), card->sbpool.count,
1566 ns_stat_lfbqc_get(stat), card->lbpool.count);
1567 printk("hbpool.count = %d iovpool.count = %d \n",
1568 card->hbpool.count, card->iovpool.count);
1570 #endif /* RX_DEBUG */
1573 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1580 /* It would be very complicated to keep the two TSTs synchronized while
1581 assuring that writes are only made to the inactive TST. So, for now I
1582 will use only one TST. If problems occur, I will change this again */
1584 new_tst = card->tst_addr;
1586 /* Fill procedure */
1588 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1589 if (card->tste2vc[e] == NULL)
1592 if (e == NS_TST_NUM_ENTRIES) {
1593 printk("nicstar%d: No free TST entries found. \n", card->index);
1598 cl = NS_TST_NUM_ENTRIES;
1599 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1602 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1603 card->tste2vc[e] = vc;
1604 ns_write_sram(card, new_tst + e, &data, 1);
1605 cl -= NS_TST_NUM_ENTRIES;
1609 if (++e == NS_TST_NUM_ENTRIES) {
1615 /* End of fill procedure */
1617 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1618 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1619 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1620 card->tst_addr = new_tst;
1623 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1628 unsigned long buflen;
1630 u32 flags; /* TBD flags, not CPU flags */
1632 card = vcc->dev->dev_data;
1633 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1634 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1635 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1637 atomic_inc(&vcc->stats->tx_err);
1638 dev_kfree_skb_any(skb);
1643 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1645 atomic_inc(&vcc->stats->tx_err);
1646 dev_kfree_skb_any(skb);
1650 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1651 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1653 atomic_inc(&vcc->stats->tx_err);
1654 dev_kfree_skb_any(skb);
1658 if (skb_shinfo(skb)->nr_frags != 0) {
1659 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1660 atomic_inc(&vcc->stats->tx_err);
1661 dev_kfree_skb_any(skb);
1665 ATM_SKB(skb)->vcc = vcc;
1667 NS_PRV_DMA(skb) = dma_map_single(&card->pcidev->dev, skb->data,
1668 skb->len, DMA_TO_DEVICE);
1670 if (vcc->qos.aal == ATM_AAL5) {
1671 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1672 flags = NS_TBD_AAL5;
1673 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1674 scqe.word_3 = cpu_to_le32(skb->len);
1676 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1678 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1679 flags |= NS_TBD_EOPDU;
1680 } else { /* (vcc->qos.aal == ATM_AAL0) */
1682 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1683 flags = NS_TBD_AAL0;
1684 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1685 scqe.word_3 = cpu_to_le32(0x00000000);
1686 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1687 flags |= NS_TBD_EOPDU;
1689 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1690 /* Force the VPI/VCI to be the same as in VCC struct */
1692 cpu_to_le32((((u32) vcc->
1693 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1695 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1698 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1699 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1700 scq = ((vc_map *) vcc->dev_data)->scq;
1703 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1707 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1708 atomic_inc(&vcc->stats->tx_err);
1709 dma_unmap_single(&card->pcidev->dev, NS_PRV_DMA(skb), skb->len,
1711 dev_kfree_skb_any(skb);
1714 atomic_inc(&vcc->stats->tx);
1719 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1720 struct sk_buff *skb)
1722 unsigned long flags;
1729 spin_lock_irqsave(&scq->lock, flags);
1730 while (scq->tail == scq->next) {
1731 if (in_interrupt()) {
1732 spin_unlock_irqrestore(&scq->lock, flags);
1733 printk("nicstar%d: Error pushing TBD.\n", card->index);
1738 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1739 scq->tail != scq->next,
1744 spin_unlock_irqrestore(&scq->lock, flags);
1745 printk("nicstar%d: Timeout pushing TBD.\n",
1751 index = (int)(scq->next - scq->base);
1752 scq->skb[index] = skb;
1753 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1754 card->index, skb, index);
1755 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1756 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1757 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1759 if (scq->next == scq->last)
1760 scq->next = scq->base;
1765 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1771 if (vc->tbd_count >= MAX_TBD_PER_VC
1772 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1775 while (scq->tail == scq->next) {
1776 if (in_interrupt()) {
1777 data = scq_virt_to_bus(scq, scq->next);
1778 ns_write_sram(card, scq->scd, &data, 1);
1779 spin_unlock_irqrestore(&scq->lock, flags);
1780 printk("nicstar%d: Error pushing TSR.\n",
1788 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1789 scq->tail != scq->next,
1795 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1797 scdi = NS_TSR_SCDISVBR;
1799 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1800 scqi = scq->next - scq->base;
1801 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1802 tsr.word_3 = 0x00000000;
1803 tsr.word_4 = 0x00000000;
1807 scq->skb[index] = NULL;
1809 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1810 card->index, le32_to_cpu(tsr.word_1),
1811 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1812 le32_to_cpu(tsr.word_4), scq->next);
1813 if (scq->next == scq->last)
1814 scq->next = scq->base;
1820 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1823 data = scq_virt_to_bus(scq, scq->next);
1824 ns_write_sram(card, scq->scd, &data, 1);
1826 spin_unlock_irqrestore(&scq->lock, flags);
1831 static void process_tsq(ns_dev * card)
1835 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1836 int serviced_entries; /* flag indicating at least on entry was serviced */
1838 serviced_entries = 0;
1840 if (card->tsq.next == card->tsq.last)
1841 one_ahead = card->tsq.base;
1843 one_ahead = card->tsq.next + 1;
1845 if (one_ahead == card->tsq.last)
1846 two_ahead = card->tsq.base;
1848 two_ahead = one_ahead + 1;
1850 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1851 !ns_tsi_isempty(two_ahead))
1852 /* At most two empty, as stated in the 77201 errata */
1854 serviced_entries = 1;
1856 /* Skip the one or two possible empty entries */
1857 while (ns_tsi_isempty(card->tsq.next)) {
1858 if (card->tsq.next == card->tsq.last)
1859 card->tsq.next = card->tsq.base;
1864 if (!ns_tsi_tmrof(card->tsq.next)) {
1865 scdi = ns_tsi_getscdindex(card->tsq.next);
1866 if (scdi == NS_TSI_SCDISVBR)
1869 if (card->scd2vc[scdi] == NULL) {
1871 ("nicstar%d: could not find VC from SCD index.\n",
1873 ns_tsi_init(card->tsq.next);
1876 scq = card->scd2vc[scdi]->scq;
1878 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1880 wake_up_interruptible(&(scq->scqfull_waitq));
1883 ns_tsi_init(card->tsq.next);
1884 previous = card->tsq.next;
1885 if (card->tsq.next == card->tsq.last)
1886 card->tsq.next = card->tsq.base;
1890 if (card->tsq.next == card->tsq.last)
1891 one_ahead = card->tsq.base;
1893 one_ahead = card->tsq.next + 1;
1895 if (one_ahead == card->tsq.last)
1896 two_ahead = card->tsq.base;
1898 two_ahead = one_ahead + 1;
1901 if (serviced_entries)
1902 writel(PTR_DIFF(previous, card->tsq.base),
1903 card->membase + TSQH);
1906 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1908 struct atm_vcc *vcc;
1909 struct sk_buff *skb;
1911 unsigned long flags;
1913 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1914 card->index, scq, pos);
1915 if (pos >= scq->num_entries) {
1916 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1920 spin_lock_irqsave(&scq->lock, flags);
1921 i = (int)(scq->tail - scq->base);
1922 if (++i == scq->num_entries)
1926 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1927 card->index, skb, i);
1929 dma_unmap_single(&card->pcidev->dev,
1933 vcc = ATM_SKB(skb)->vcc;
1934 if (vcc && vcc->pop != NULL) {
1937 dev_kfree_skb_irq(skb);
1941 if (++i == scq->num_entries)
1944 scq->tail = scq->base + pos;
1945 spin_unlock_irqrestore(&scq->lock, flags);
1948 static void process_rsq(ns_dev * card)
1952 if (!ns_rsqe_valid(card->rsq.next))
1955 dequeue_rx(card, card->rsq.next);
1956 ns_rsqe_init(card->rsq.next);
1957 previous = card->rsq.next;
1958 if (card->rsq.next == card->rsq.last)
1959 card->rsq.next = card->rsq.base;
1962 } while (ns_rsqe_valid(card->rsq.next));
1963 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1966 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1970 struct sk_buff *iovb;
1972 struct atm_vcc *vcc;
1973 struct sk_buff *skb;
1974 unsigned short aal5_len;
1979 stat = readl(card->membase + STAT);
1980 card->sbfqc = ns_stat_sfbqc_get(stat);
1981 card->lbfqc = ns_stat_lfbqc_get(stat);
1983 id = le32_to_cpu(rsqe->buffer_handle);
1984 skb = idr_find(&card->idr, id);
1987 "nicstar%d: idr_find() failed!\n", card->index);
1990 idr_remove(&card->idr, id);
1991 dma_sync_single_for_cpu(&card->pcidev->dev,
1993 (NS_PRV_BUFTYPE(skb) == BUF_SM
1994 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
1996 dma_unmap_single(&card->pcidev->dev,
1998 (NS_PRV_BUFTYPE(skb) == BUF_SM
1999 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
2001 vpi = ns_rsqe_vpi(rsqe);
2002 vci = ns_rsqe_vci(rsqe);
2003 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2004 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2005 card->index, vpi, vci);
2006 recycle_rx_buf(card, skb);
2010 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2012 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2013 card->index, vpi, vci);
2014 recycle_rx_buf(card, skb);
2020 if (vcc->qos.aal == ATM_AAL0) {
2022 unsigned char *cell;
2026 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2027 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL) {
2029 ("nicstar%d: Can't allocate buffers for aal0.\n",
2031 atomic_add(i, &vcc->stats->rx_drop);
2034 if (!atm_charge(vcc, sb->truesize)) {
2036 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2038 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2039 dev_kfree_skb_any(sb);
2042 /* Rebuild the header */
2043 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2044 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2045 if (i == 1 && ns_rsqe_eopdu(rsqe))
2046 *((u32 *) sb->data) |= 0x00000002;
2047 skb_put(sb, NS_AAL0_HEADER);
2048 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2049 skb_put(sb, ATM_CELL_PAYLOAD);
2050 ATM_SKB(sb)->vcc = vcc;
2051 __net_timestamp(sb);
2053 atomic_inc(&vcc->stats->rx);
2054 cell += ATM_CELL_PAYLOAD;
2057 recycle_rx_buf(card, skb);
2061 /* To reach this point, the AAL layer can only be AAL5 */
2063 if ((iovb = vc->rx_iov) == NULL) {
2064 iovb = skb_dequeue(&(card->iovpool.queue));
2065 if (iovb == NULL) { /* No buffers in the queue */
2066 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2068 printk("nicstar%d: Out of iovec buffers.\n",
2070 atomic_inc(&vcc->stats->rx_drop);
2071 recycle_rx_buf(card, skb);
2074 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2075 } else if (--card->iovpool.count < card->iovnr.min) {
2076 struct sk_buff *new_iovb;
2078 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2079 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2080 skb_queue_tail(&card->iovpool.queue, new_iovb);
2081 card->iovpool.count++;
2085 NS_PRV_IOVCNT(iovb) = 0;
2087 iovb->data = iovb->head;
2088 skb_reset_tail_pointer(iovb);
2089 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2090 buffer is stored as iovec base, NOT a pointer to the
2091 small or large buffer itself. */
2092 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2093 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2094 atomic_inc(&vcc->stats->rx_err);
2095 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2097 NS_PRV_IOVCNT(iovb) = 0;
2099 iovb->data = iovb->head;
2100 skb_reset_tail_pointer(iovb);
2102 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2103 iov->iov_base = (void *)skb;
2104 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2105 iovb->len += iov->iov_len;
2108 if (NS_PRV_IOVCNT(iovb) == 1) {
2109 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2111 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2113 which_list(card, skb);
2114 atomic_inc(&vcc->stats->rx_err);
2115 recycle_rx_buf(card, skb);
2117 recycle_iov_buf(card, iovb);
2120 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2122 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2124 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2126 which_list(card, skb);
2127 atomic_inc(&vcc->stats->rx_err);
2128 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2129 NS_PRV_IOVCNT(iovb));
2131 recycle_iov_buf(card, iovb);
2135 #endif /* EXTRA_DEBUG */
2137 if (ns_rsqe_eopdu(rsqe)) {
2138 /* This works correctly regardless of the endianness of the host */
2139 unsigned char *L1L2 = (unsigned char *)
2140 (skb->data + iov->iov_len - 6);
2141 aal5_len = L1L2[0] << 8 | L1L2[1];
2142 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2143 if (ns_rsqe_crcerr(rsqe) ||
2144 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2145 printk("nicstar%d: AAL5 CRC error", card->index);
2146 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2147 printk(" - PDU size mismatch.\n");
2150 atomic_inc(&vcc->stats->rx_err);
2151 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2152 NS_PRV_IOVCNT(iovb));
2154 recycle_iov_buf(card, iovb);
2158 /* By this point we (hopefully) have a complete SDU without errors. */
2160 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2161 /* skb points to a small buffer */
2162 if (!atm_charge(vcc, skb->truesize)) {
2163 push_rxbufs(card, skb);
2164 atomic_inc(&vcc->stats->rx_drop);
2167 dequeue_sm_buf(card, skb);
2168 ATM_SKB(skb)->vcc = vcc;
2169 __net_timestamp(skb);
2170 vcc->push(vcc, skb);
2171 atomic_inc(&vcc->stats->rx);
2173 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2176 sb = (struct sk_buff *)(iov - 1)->iov_base;
2177 /* skb points to a large buffer */
2179 if (len <= NS_SMBUFSIZE) {
2180 if (!atm_charge(vcc, sb->truesize)) {
2181 push_rxbufs(card, sb);
2182 atomic_inc(&vcc->stats->rx_drop);
2185 dequeue_sm_buf(card, sb);
2186 ATM_SKB(sb)->vcc = vcc;
2187 __net_timestamp(sb);
2189 atomic_inc(&vcc->stats->rx);
2192 push_rxbufs(card, skb);
2194 } else { /* len > NS_SMBUFSIZE, the usual case */
2196 if (!atm_charge(vcc, skb->truesize)) {
2197 push_rxbufs(card, skb);
2198 atomic_inc(&vcc->stats->rx_drop);
2200 dequeue_lg_buf(card, skb);
2201 skb_push(skb, NS_SMBUFSIZE);
2202 skb_copy_from_linear_data(sb, skb->data,
2204 skb_put(skb, len - NS_SMBUFSIZE);
2205 ATM_SKB(skb)->vcc = vcc;
2206 __net_timestamp(skb);
2207 vcc->push(vcc, skb);
2208 atomic_inc(&vcc->stats->rx);
2211 push_rxbufs(card, sb);
2215 } else { /* Must push a huge buffer */
2217 struct sk_buff *hb, *sb, *lb;
2218 int remaining, tocopy;
2221 hb = skb_dequeue(&(card->hbpool.queue));
2222 if (hb == NULL) { /* No buffers in the queue */
2224 hb = dev_alloc_skb(NS_HBUFSIZE);
2227 ("nicstar%d: Out of huge buffers.\n",
2229 atomic_inc(&vcc->stats->rx_drop);
2230 recycle_iovec_rx_bufs(card,
2233 NS_PRV_IOVCNT(iovb));
2235 recycle_iov_buf(card, iovb);
2237 } else if (card->hbpool.count < card->hbnr.min) {
2238 struct sk_buff *new_hb;
2240 dev_alloc_skb(NS_HBUFSIZE)) !=
2242 skb_queue_tail(&card->hbpool.
2244 card->hbpool.count++;
2247 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2248 } else if (--card->hbpool.count < card->hbnr.min) {
2249 struct sk_buff *new_hb;
2251 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2252 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2253 skb_queue_tail(&card->hbpool.queue,
2255 card->hbpool.count++;
2257 if (card->hbpool.count < card->hbnr.min) {
2259 dev_alloc_skb(NS_HBUFSIZE)) !=
2261 NS_PRV_BUFTYPE(new_hb) =
2263 skb_queue_tail(&card->hbpool.
2265 card->hbpool.count++;
2270 iov = (struct iovec *)iovb->data;
2272 if (!atm_charge(vcc, hb->truesize)) {
2273 recycle_iovec_rx_bufs(card, iov,
2274 NS_PRV_IOVCNT(iovb));
2275 if (card->hbpool.count < card->hbnr.max) {
2276 skb_queue_tail(&card->hbpool.queue, hb);
2277 card->hbpool.count++;
2279 dev_kfree_skb_any(hb);
2280 atomic_inc(&vcc->stats->rx_drop);
2282 /* Copy the small buffer to the huge buffer */
2283 sb = (struct sk_buff *)iov->iov_base;
2284 skb_copy_from_linear_data(sb, hb->data,
2286 skb_put(hb, iov->iov_len);
2287 remaining = len - iov->iov_len;
2289 /* Free the small buffer */
2290 push_rxbufs(card, sb);
2292 /* Copy all large buffers to the huge buffer and free them */
2293 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2294 lb = (struct sk_buff *)iov->iov_base;
2296 min_t(int, remaining, iov->iov_len);
2297 skb_copy_from_linear_data(lb,
2300 skb_put(hb, tocopy);
2302 remaining -= tocopy;
2303 push_rxbufs(card, lb);
2306 if (remaining != 0 || hb->len != len)
2308 ("nicstar%d: Huge buffer len mismatch.\n",
2310 #endif /* EXTRA_DEBUG */
2311 ATM_SKB(hb)->vcc = vcc;
2312 __net_timestamp(hb);
2314 atomic_inc(&vcc->stats->rx);
2319 recycle_iov_buf(card, iovb);
2324 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2326 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2327 printk("nicstar%d: What kind of rx buffer is this?\n",
2329 dev_kfree_skb_any(skb);
2331 push_rxbufs(card, skb);
2334 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2337 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2340 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2342 if (card->iovpool.count < card->iovnr.max) {
2343 skb_queue_tail(&card->iovpool.queue, iovb);
2344 card->iovpool.count++;
2346 dev_kfree_skb_any(iovb);
2349 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2351 skb_unlink(sb, &card->sbpool.queue);
2352 if (card->sbfqc < card->sbnr.init) {
2353 struct sk_buff *new_sb;
2354 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2355 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2356 skb_queue_tail(&card->sbpool.queue, new_sb);
2357 skb_reserve(new_sb, NS_AAL0_HEADER);
2358 push_rxbufs(card, new_sb);
2361 if (card->sbfqc < card->sbnr.init)
2363 struct sk_buff *new_sb;
2364 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2365 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2366 skb_queue_tail(&card->sbpool.queue, new_sb);
2367 skb_reserve(new_sb, NS_AAL0_HEADER);
2368 push_rxbufs(card, new_sb);
2373 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2375 skb_unlink(lb, &card->lbpool.queue);
2376 if (card->lbfqc < card->lbnr.init) {
2377 struct sk_buff *new_lb;
2378 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2379 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2380 skb_queue_tail(&card->lbpool.queue, new_lb);
2381 skb_reserve(new_lb, NS_SMBUFSIZE);
2382 push_rxbufs(card, new_lb);
2385 if (card->lbfqc < card->lbnr.init)
2387 struct sk_buff *new_lb;
2388 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2389 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2390 skb_queue_tail(&card->lbpool.queue, new_lb);
2391 skb_reserve(new_lb, NS_SMBUFSIZE);
2392 push_rxbufs(card, new_lb);
2397 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2404 card = (ns_dev *) dev->dev_data;
2405 stat = readl(card->membase + STAT);
2407 return sprintf(page, "Pool count min init max \n");
2409 return sprintf(page, "Small %5d %5d %5d %5d \n",
2410 ns_stat_sfbqc_get(stat), card->sbnr.min,
2411 card->sbnr.init, card->sbnr.max);
2413 return sprintf(page, "Large %5d %5d %5d %5d \n",
2414 ns_stat_lfbqc_get(stat), card->lbnr.min,
2415 card->lbnr.init, card->lbnr.max);
2417 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2418 card->hbpool.count, card->hbnr.min,
2419 card->hbnr.init, card->hbnr.max);
2421 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2422 card->iovpool.count, card->iovnr.min,
2423 card->iovnr.init, card->iovnr.max);
2427 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2432 /* Dump 25.6 Mbps PHY registers */
2433 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2434 here just in case it's needed for debugging. */
2435 if (card->max_pcr == ATM_25_PCR && !left--) {
2439 for (i = 0; i < 4; i++) {
2440 while (CMD_BUSY(card)) ;
2441 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2442 card->membase + CMD);
2443 while (CMD_BUSY(card)) ;
2444 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2447 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2448 phy_regs[0], phy_regs[1], phy_regs[2],
2451 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2454 if (left-- < NS_TST_NUM_ENTRIES) {
2455 if (card->tste2vc[left + 1] == NULL)
2456 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2458 return sprintf(page, "%5d - %d %d \n", left + 1,
2459 card->tste2vc[left + 1]->tx_vcc->vpi,
2460 card->tste2vc[left + 1]->tx_vcc->vci);
2466 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2471 unsigned long flags;
2473 card = dev->dev_data;
2477 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2479 switch (pl.buftype) {
2480 case NS_BUFTYPE_SMALL:
2482 ns_stat_sfbqc_get(readl(card->membase + STAT));
2483 pl.level.min = card->sbnr.min;
2484 pl.level.init = card->sbnr.init;
2485 pl.level.max = card->sbnr.max;
2488 case NS_BUFTYPE_LARGE:
2490 ns_stat_lfbqc_get(readl(card->membase + STAT));
2491 pl.level.min = card->lbnr.min;
2492 pl.level.init = card->lbnr.init;
2493 pl.level.max = card->lbnr.max;
2496 case NS_BUFTYPE_HUGE:
2497 pl.count = card->hbpool.count;
2498 pl.level.min = card->hbnr.min;
2499 pl.level.init = card->hbnr.init;
2500 pl.level.max = card->hbnr.max;
2503 case NS_BUFTYPE_IOVEC:
2504 pl.count = card->iovpool.count;
2505 pl.level.min = card->iovnr.min;
2506 pl.level.init = card->iovnr.init;
2507 pl.level.max = card->iovnr.max;
2511 return -ENOIOCTLCMD;
2514 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2515 return (sizeof(pl));
2520 if (!capable(CAP_NET_ADMIN))
2522 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2524 if (pl.level.min >= pl.level.init
2525 || pl.level.init >= pl.level.max)
2527 if (pl.level.min == 0)
2529 switch (pl.buftype) {
2530 case NS_BUFTYPE_SMALL:
2531 if (pl.level.max > TOP_SB)
2533 card->sbnr.min = pl.level.min;
2534 card->sbnr.init = pl.level.init;
2535 card->sbnr.max = pl.level.max;
2538 case NS_BUFTYPE_LARGE:
2539 if (pl.level.max > TOP_LB)
2541 card->lbnr.min = pl.level.min;
2542 card->lbnr.init = pl.level.init;
2543 card->lbnr.max = pl.level.max;
2546 case NS_BUFTYPE_HUGE:
2547 if (pl.level.max > TOP_HB)
2549 card->hbnr.min = pl.level.min;
2550 card->hbnr.init = pl.level.init;
2551 card->hbnr.max = pl.level.max;
2554 case NS_BUFTYPE_IOVEC:
2555 if (pl.level.max > TOP_IOVB)
2557 card->iovnr.min = pl.level.min;
2558 card->iovnr.init = pl.level.init;
2559 card->iovnr.max = pl.level.max;
2569 if (!capable(CAP_NET_ADMIN))
2571 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2573 case NS_BUFTYPE_SMALL:
2574 while (card->sbfqc < card->sbnr.init) {
2577 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2580 NS_PRV_BUFTYPE(sb) = BUF_SM;
2581 skb_queue_tail(&card->sbpool.queue, sb);
2582 skb_reserve(sb, NS_AAL0_HEADER);
2583 push_rxbufs(card, sb);
2587 case NS_BUFTYPE_LARGE:
2588 while (card->lbfqc < card->lbnr.init) {
2591 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2594 NS_PRV_BUFTYPE(lb) = BUF_LG;
2595 skb_queue_tail(&card->lbpool.queue, lb);
2596 skb_reserve(lb, NS_SMBUFSIZE);
2597 push_rxbufs(card, lb);
2601 case NS_BUFTYPE_HUGE:
2602 while (card->hbpool.count > card->hbnr.init) {
2605 spin_lock_irqsave(&card->int_lock, flags);
2606 hb = skb_dequeue(&card->hbpool.queue);
2607 card->hbpool.count--;
2608 spin_unlock_irqrestore(&card->int_lock, flags);
2611 ("nicstar%d: huge buffer count inconsistent.\n",
2614 dev_kfree_skb_any(hb);
2617 while (card->hbpool.count < card->hbnr.init) {
2620 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2623 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2624 spin_lock_irqsave(&card->int_lock, flags);
2625 skb_queue_tail(&card->hbpool.queue, hb);
2626 card->hbpool.count++;
2627 spin_unlock_irqrestore(&card->int_lock, flags);
2631 case NS_BUFTYPE_IOVEC:
2632 while (card->iovpool.count > card->iovnr.init) {
2633 struct sk_buff *iovb;
2635 spin_lock_irqsave(&card->int_lock, flags);
2636 iovb = skb_dequeue(&card->iovpool.queue);
2637 card->iovpool.count--;
2638 spin_unlock_irqrestore(&card->int_lock, flags);
2641 ("nicstar%d: iovec buffer count inconsistent.\n",
2644 dev_kfree_skb_any(iovb);
2647 while (card->iovpool.count < card->iovnr.init) {
2648 struct sk_buff *iovb;
2650 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2653 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2654 spin_lock_irqsave(&card->int_lock, flags);
2655 skb_queue_tail(&card->iovpool.queue, iovb);
2656 card->iovpool.count++;
2657 spin_unlock_irqrestore(&card->int_lock, flags);
2668 if (dev->phy && dev->phy->ioctl) {
2669 return dev->phy->ioctl(dev, cmd, arg);
2671 printk("nicstar%d: %s == NULL \n", card->index,
2672 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2673 return -ENOIOCTLCMD;
2679 static void which_list(ns_dev * card, struct sk_buff *skb)
2681 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2683 #endif /* EXTRA_DEBUG */
2685 static void ns_poll(unsigned long arg)
2689 unsigned long flags;
2692 PRINTK("nicstar: Entering ns_poll().\n");
2693 for (i = 0; i < num_cards; i++) {
2695 if (spin_is_locked(&card->int_lock)) {
2696 /* Probably it isn't worth spinning */
2699 spin_lock_irqsave(&card->int_lock, flags);
2702 stat_r = readl(card->membase + STAT);
2703 if (stat_r & NS_STAT_TSIF)
2704 stat_w |= NS_STAT_TSIF;
2705 if (stat_r & NS_STAT_EOPDU)
2706 stat_w |= NS_STAT_EOPDU;
2711 writel(stat_w, card->membase + STAT);
2712 spin_unlock_irqrestore(&card->int_lock, flags);
2714 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2715 PRINTK("nicstar: Leaving ns_poll().\n");
2718 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2722 unsigned long flags;
2724 card = dev->dev_data;
2725 spin_lock_irqsave(&card->res_lock, flags);
2726 while (CMD_BUSY(card)) ;
2727 writel((u32) value, card->membase + DR0);
2728 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2729 card->membase + CMD);
2730 spin_unlock_irqrestore(&card->res_lock, flags);
2733 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2736 unsigned long flags;
2739 card = dev->dev_data;
2740 spin_lock_irqsave(&card->res_lock, flags);
2741 while (CMD_BUSY(card)) ;
2742 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2743 card->membase + CMD);
2744 while (CMD_BUSY(card)) ;
2745 data = readl(card->membase + DR0) & 0x000000FF;
2746 spin_unlock_irqrestore(&card->res_lock, flags);
2747 return (unsigned char)data;
2750 module_init(nicstar_init);
2751 module_exit(nicstar_cleanup);