1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /* drivers/atm/firestream.c - FireStream 155 (MB86697) and
4 * FireStream 50 (MB86695) device driver
7 /* Written & (C) 2000 by R.E.Wolff@BitWizard.nl
8 * Copied snippets from zatm.c by Werner Almesberger, EPFL LRC/ICA
9 * and ambassador.c Copyright (C) 1995-1999 Madge Networks Ltd
16 #include <linux/module.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/pci.h>
21 #include <linux/poison.h>
22 #include <linux/errno.h>
23 #include <linux/atm.h>
24 #include <linux/atmdev.h>
25 #include <linux/sonet.h>
26 #include <linux/skbuff.h>
27 #include <linux/netdevice.h>
28 #include <linux/delay.h>
29 #include <linux/ioport.h> /* for request_region */
30 #include <linux/uio.h>
31 #include <linux/init.h>
32 #include <linux/interrupt.h>
33 #include <linux/capability.h>
34 #include <linux/bitops.h>
35 #include <linux/slab.h>
36 #include <asm/byteorder.h>
37 #include <asm/string.h>
39 #include <linux/atomic.h>
40 #include <linux/uaccess.h>
41 #include <linux/wait.h>
43 #include "firestream.h"
45 static int loopback = 0;
48 /* According to measurements (but they look suspicious to me!) done in
49 * '97, 37% of the packets are one cell in size. So it pays to have
50 * buffers allocated at that size. A large jump in percentage of
51 * packets occurs at packets around 536 bytes in length. So it also
52 * pays to have those pre-allocated. Unfortunately, we can't fully
53 * take advantage of this as the majority of the packets is likely to
54 * be TCP/IP (As where obviously the measurement comes from) There the
55 * link would be opened with say a 1500 byte MTU, and we can't handle
56 * smaller buffers more efficiently than the larger ones. -- REW
59 /* Due to the way Linux memory management works, specifying "576" as
60 * an allocation size here isn't going to help. They are allocated
61 * from 1024-byte regions anyway. With the size of the sk_buffs (quite
62 * large), it doesn't pay to allocate the smallest size (64) -- REW */
64 /* This is all guesswork. Hard numbers to back this up or disprove this,
65 * are appreciated. -- REW */
67 /* The last entry should be about 64k. However, the "buffer size" is
68 * passed to the chip in a 16 bit field. I don't know how "65536"
69 * would be interpreted. -- REW */
71 #define NP FS_NR_FREE_POOLS
72 static int rx_buf_sizes[NP] = {128, 256, 512, 1024, 2048, 4096, 16384, 65520};
73 /* log2: 7 8 9 10 11 12 14 16 */
76 static int rx_pool_sizes[NP] = {1024, 1024, 512, 256, 128, 64, 32, 32};
79 static int rx_pool_sizes[NP] = {128, 128, 128, 64, 64, 64, 32, 32};
81 /* log2: 10 10 9 8 7 6 5 5 */
82 /* sumlog2: 17 18 18 18 18 18 19 21 */
83 /* mem allocated: 128k 256k 256k 256k 256k 256k 512k 2M */
84 /* tot mem: almost 4M */
86 /* NP is shorter, so that it fits on a single line. */
90 /* Small hardware gotcha:
92 The FS50 CAM (VP/VC match registers) always take the lowest channel
93 number that matches. This is not a problem.
95 However, they also ignore whether the channel is enabled or
96 not. This means that if you allocate channel 0 to 1.2 and then
97 channel 1 to 0.0, then disabeling channel 0 and writing 0 to the
98 match channel for channel 0 will "steal" the traffic from channel
99 1, even if you correctly disable channel 0.
103 - When disabling channels, write an invalid VP/VC value to the
104 match register. (We use 0xffffffff, which in the worst case
105 matches VP/VC = <maxVP>/<maxVC>, but I expect it not to match
106 anything as some "when not in use, program to 0" bits are now
109 - Don't initialize the match registers to 0, as 0.0 is a valid
114 /* Optimization hints and tips.
116 The FireStream chips are very capable of reducing the amount of
117 "interrupt-traffic" for the CPU. This driver requests an interrupt on EVERY
118 action. You could try to minimize this a bit.
120 Besides that, the userspace->kernel copy and the PCI bus are the
121 performance limiting issues for this driver.
123 You could queue up a bunch of outgoing packets without telling the
124 FireStream. I'm not sure that's going to win you much though. The
125 Linux layer won't tell us in advance when it's not going to give us
126 any more packets in a while. So this is tricky to implement right without
127 introducing extra delays.
135 /* The strings that define what the RX queue entry is all about. */
136 /* Fujitsu: Please tell me which ones can have a pointer to a
137 freepool descriptor! */
138 static char *res_strings[] = {
139 "RX OK: streaming not EOP",
140 "RX OK: streaming EOP",
141 "RX OK: Single buffer packet",
142 "RX OK: packet mode",
143 "RX OK: F4 OAM (end to end)",
144 "RX OK: F4 OAM (Segment)",
145 "RX OK: F5 OAM (end to end)",
146 "RX OK: F5 OAM (Segment)",
148 "RX OK: TRANSP cell",
149 "RX OK: TRANSPC cell",
156 "reassembly abort: AAL5 abort",
158 "packet ageing timeout",
159 "channel ageing timeout",
160 "calculated length error",
161 "programmed length limit error",
163 "oam transp or transpc crc10 error",
169 "reserved 30", /* FIXME: The strings between 30-40 might be wrong. */
170 "reassembly abort: no buffers",
171 "receive buffer overflow",
173 "receive buffer full",
174 "low priority discard - no receive descriptor",
175 "low priority discard - missing end of packet",
205 static char *irq_bitname[] = {
237 #define PHY_CLEARALL -2
239 struct reginit_item {
244 static struct reginit_item PHY_NTC_INIT[] = {
245 { PHY_CLEARALL, 0x40 },
251 { 0x39, 0x0006 }, /* changed here to make loopback */
255 { PHY_EOF, 0}, /* -1 signals end of list */
259 /* Safetyfeature: If the card interrupts more than this number of times
260 in a jiffy (1/100th of a second) then we just disable the interrupt and
261 print a message. This prevents the system from hanging.
263 150000 packets per second is close to the limit a PC is going to have
264 anyway. We therefore have to disable this for production. -- REW */
265 #undef IRQ_RATE_LIMIT // 100
267 /* Interrupts work now. Unlike serial cards, ATM cards don't work all
268 that great without interrupts. -- REW */
269 #undef FS_POLL_FREQ // 100
272 This driver can spew a whole lot of debugging output at you. If you
273 need maximum performance, you should disable the DEBUG define. To
274 aid in debugging in the field, I'm leaving the compile-time debug
275 features enabled, and disable them "runtime". That allows me to
276 instruct people with problems to enable debugging without requiring
277 them to recompile... -- REW
282 #define fs_dprintk(f, str...) if (fs_debug & f) printk (str)
284 #define fs_dprintk(f, str...) /* nothing */
288 static int fs_keystream = 0;
291 /* I didn't forget to set this to zero before shipping. Hit me with a stick
292 if you get this with the debug default not set to zero again. -- REW */
293 static int fs_debug = 0;
300 module_param(fs_debug, int, 0644);
302 module_param(loopback, int, 0);
303 module_param(num, int, 0);
304 module_param(fs_keystream, int, 0);
305 /* XXX Add rx_buf_sizes, and rx_pool_sizes As per request Amar. -- REW */
309 #define FS_DEBUG_FLOW 0x00000001
310 #define FS_DEBUG_OPEN 0x00000002
311 #define FS_DEBUG_QUEUE 0x00000004
312 #define FS_DEBUG_IRQ 0x00000008
313 #define FS_DEBUG_INIT 0x00000010
314 #define FS_DEBUG_SEND 0x00000020
315 #define FS_DEBUG_PHY 0x00000040
316 #define FS_DEBUG_CLEANUP 0x00000080
317 #define FS_DEBUG_QOS 0x00000100
318 #define FS_DEBUG_TXQ 0x00000200
319 #define FS_DEBUG_ALLOC 0x00000400
320 #define FS_DEBUG_TXMEM 0x00000800
321 #define FS_DEBUG_QSIZE 0x00001000
324 #define func_enter() fs_dprintk(FS_DEBUG_FLOW, "fs: enter %s\n", __func__)
325 #define func_exit() fs_dprintk(FS_DEBUG_FLOW, "fs: exit %s\n", __func__)
328 static struct fs_dev *fs_boards = NULL;
332 static void my_hd (void *addr, int len)
335 unsigned char *ptr = addr;
339 for (j=0;j < ((len < 16)?len:16);j++) {
340 printk ("%02x %s", ptr[j], (j==7)?" ":"");
343 printk (" %s", (j==7)?" ":"");
345 for (j=0;j < ((len < 16)?len:16);j++) {
347 printk ("%c", (ch < 0x20)?'.':((ch > 0x7f)?'.':ch));
355 static void my_hd (void *addr, int len){}
358 /********** free an skb (as per ATM device driver documentation) **********/
360 /* Hmm. If this is ATM specific, why isn't there an ATM routine for this?
361 * I copied it over from the ambassador driver. -- REW */
363 static inline void fs_kfree_skb (struct sk_buff * skb)
365 if (ATM_SKB(skb)->vcc->pop)
366 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
368 dev_kfree_skb_any (skb);
374 /* It seems the ATM forum recommends this horribly complicated 16bit
375 * floating point format. Turns out the Ambassador uses the exact same
376 * encoding. I just copied it over. If Mitch agrees, I'll move it over
377 * to the atm_misc file or something like that. (and remove it from
378 * here and the ambassador driver) -- REW
381 /* The good thing about this format is that it is monotonic. So,
382 a conversion routine need not be very complicated. To be able to
383 round "nearest" we need to take along a few extra bits. Lets
384 put these after 16 bits, so that we can just return the top 16
385 bits of the 32bit number as the result:
387 int mr (unsigned int rate, int r)
390 static int round[4]={0, 0, 0xffff, 0x8000};
392 while (rate & 0xfc000000) {
396 while (! (rate & 0xfe000000)) {
401 // Now the mantissa is in positions bit 16-25. Excepf for the "hidden 1" that's in bit 26.
403 // Next add in the exponent
405 // And perform the rounding:
406 return (rate + round[r]) >> 16;
409 14 lines-of-code. Compare that with the 120 that the Ambassador
410 guys needed. (would be 8 lines shorter if I'd try to really reduce
413 int mr (unsigned int rate, int r)
416 static int round[4]={0, 0, 0xffff, 0x8000};
418 for (; rate & 0xfc000000 ;rate >>= 1, e++);
419 for (;!(rate & 0xfe000000);rate <<= 1, e--);
420 return ((rate & ~0x02000000) | (e << (16+9)) + round[r]) >> 16;
423 Exercise for the reader: Remove one more line-of-code, without
424 cheating. (Just joining two lines is cheating). (I know it's
425 possible, don't think you've beat me if you found it... If you
426 manage to lose two lines or more, keep me updated! ;-)
433 #define ROUND_NEAREST 3
434 /********** make rate (not quite as much fun as Horizon) **********/
436 static int make_rate(unsigned int rate, int r,
437 u16 *bits, unsigned int *actual)
439 unsigned char exp = -1; /* hush gcc */
440 unsigned int man = -1; /* hush gcc */
442 fs_dprintk (FS_DEBUG_QOS, "make_rate %u", rate);
444 /* rates in cells per second, ITU format (nasty 16-bit floating-point)
445 given 5-bit e and 9-bit m:
446 rate = EITHER (1+m/2^9)*2^e OR 0
447 bits = EITHER 1<<14 | e<<9 | m OR 0
448 (bit 15 is "reserved", bit 14 "non-zero")
449 smallest rate is 0 (special representation)
450 largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
451 smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
453 find position of top bit, this gives e
454 remove top bit and shift (rounding if feeling clever) by 9-e
456 /* Ambassador ucode bug: please don't set bit 14! so 0 rate not
457 representable. // This should move into the ambassador driver
458 when properly merged. -- REW */
460 if (rate > 0xffc00000U) {
461 /* larger than largest representable rate */
471 /* representable rate */
476 /* invariant: rate = man*2^(exp-31) */
477 while (!(man & (1<<31))) {
482 /* man has top bit set
483 rate = (2^31+(man-2^31))*2^(exp-31)
484 rate = (1+(man-2^31)/2^31)*2^exp
487 man &= 0xffffffffU; /* a nop on 32-bit systems */
488 /* rate = (1+man/2^32)*2^exp
490 exp is in the range 0 to 31, man is in the range 0 to 2^32-1
491 time to lose significance... we want m in the range 0 to 2^9-1
492 rounding presents a minor problem... we first decide which way
493 we are rounding (based on given rounding direction and possibly
494 the bits of the mantissa that are to be discarded).
504 /* check all bits that we are discarding */
505 if (man & (~0U>>9)) {
506 man = (man>>(32-9)) + 1;
508 /* no need to check for round up outside of range */
517 case ROUND_NEAREST: {
518 /* check msb that we are discarding */
519 if (man & (1<<(32-9-1))) {
520 man = (man>>(32-9)) + 1;
522 /* no need to check for round up outside of range */
534 /* zero rate - not representable */
536 if (r == ROUND_DOWN) {
544 fs_dprintk (FS_DEBUG_QOS, "rate: man=%u, exp=%hu", man, exp);
547 *bits = /* (1<<14) | */ (exp<<9) | man;
551 ? (1 << exp) + (man << (exp-9))
552 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
560 /* FireStream access routines */
561 /* For DEEP-DOWN debugging these can be rigged to intercept accesses to
562 certain registers or to just log all accesses. */
564 static inline void write_fs (struct fs_dev *dev, int offset, u32 val)
566 writel (val, dev->base + offset);
570 static inline u32 read_fs (struct fs_dev *dev, int offset)
572 return readl (dev->base + offset);
577 static inline struct FS_QENTRY *get_qentry (struct fs_dev *dev, struct queue *q)
579 return bus_to_virt (read_fs (dev, Q_WP(q->offset)) & Q_ADDR_MASK);
583 static void submit_qentry (struct fs_dev *dev, struct queue *q, struct FS_QENTRY *qe)
586 struct FS_QENTRY *cqe;
588 /* XXX Sanity check: the write pointer can be checked to be
589 still the same as the value passed as qe... -- REW */
591 while ((wp = read_fs (dev, Q_WP (q->offset))) & Q_FULL) {
592 fs_dprintk (FS_DEBUG_TXQ, "Found queue at %x full. Waiting.\n",
598 cqe = bus_to_virt (wp);
600 fs_dprintk (FS_DEBUG_TXQ, "q mismatch! %p %p\n", qe, cqe);
603 write_fs (dev, Q_WP(q->offset), Q_INCWRAP);
610 rp = read_fs (dev, Q_RP(q->offset));
611 wp = read_fs (dev, Q_WP(q->offset));
612 fs_dprintk (FS_DEBUG_TXQ, "q at %d: %x-%x: %x entries.\n",
613 q->offset, rp, wp, wp-rp);
619 static struct FS_QENTRY pq[60];
622 static struct FS_BPENTRY dq[60];
627 static void submit_queue (struct fs_dev *dev, struct queue *q,
628 u32 cmd, u32 p1, u32 p2, u32 p3)
630 struct FS_QENTRY *qe;
632 qe = get_qentry (dev, q);
637 submit_qentry (dev, q, qe);
645 if (qp >= 60) qp = 0;
649 /* Test the "other" way one day... -- REW */
651 #define submit_command submit_queue
654 static void submit_command (struct fs_dev *dev, struct queue *q,
655 u32 cmd, u32 p1, u32 p2, u32 p3)
657 write_fs (dev, CMDR0, cmd);
658 write_fs (dev, CMDR1, p1);
659 write_fs (dev, CMDR2, p2);
660 write_fs (dev, CMDR3, p3);
666 static void process_return_queue (struct fs_dev *dev, struct queue *q)
669 struct FS_QENTRY *qe;
672 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
673 fs_dprintk (FS_DEBUG_QUEUE, "reaping return queue entry at %lx\n", rq);
674 qe = bus_to_virt (rq);
676 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. (%d)\n",
677 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
679 switch (STATUS_CODE (qe)) {
681 tc = bus_to_virt (qe->p0);
682 fs_dprintk (FS_DEBUG_ALLOC, "Free tc: %p\n", tc);
687 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
692 static void process_txdone_queue (struct fs_dev *dev, struct queue *q)
696 struct FS_QENTRY *qe;
698 struct FS_BPENTRY *td;
700 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
701 fs_dprintk (FS_DEBUG_QUEUE, "reaping txdone entry at %lx\n", rq);
702 qe = bus_to_virt (rq);
704 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x: %d\n",
705 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
707 if (STATUS_CODE (qe) != 2)
708 fs_dprintk (FS_DEBUG_TXMEM, "queue entry: %08x %08x %08x %08x: %d\n",
709 qe->cmd, qe->p0, qe->p1, qe->p2, STATUS_CODE (qe));
712 switch (STATUS_CODE (qe)) {
713 case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
716 /* Process a real txdone entry. */
719 printk (KERN_WARNING "td not aligned: %ld\n", tmp);
721 td = bus_to_virt (tmp);
723 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p.\n",
724 td->flags, td->next, td->bsa, td->aal_bufsize, td->skb );
727 if (skb == FS_VCC (ATM_SKB(skb)->vcc)->last_skb) {
728 FS_VCC (ATM_SKB(skb)->vcc)->last_skb = NULL;
729 wake_up_interruptible (& FS_VCC (ATM_SKB(skb)->vcc)->close_wait);
737 fs_dprintk (FS_DEBUG_QSIZE, "[%d]", td->dev->ntxpckts);
741 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
743 fs_dprintk (FS_DEBUG_TXMEM, "i");
744 fs_dprintk (FS_DEBUG_ALLOC, "Free t-skb: %p\n", skb);
747 fs_dprintk (FS_DEBUG_ALLOC, "Free trans-d: %p\n", td);
748 memset (td, ATM_POISON_FREE, sizeof(struct FS_BPENTRY));
752 /* Here we get the tx purge inhibit command ... */
753 /* Action, I believe, is "don't do anything". -- REW */
757 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
762 static void process_incoming (struct fs_dev *dev, struct queue *q)
765 struct FS_QENTRY *qe;
766 struct FS_BPENTRY *pe;
769 struct atm_vcc *atm_vcc;
771 while (!((rq = read_fs (dev, Q_RP(q->offset))) & Q_EMPTY)) {
772 fs_dprintk (FS_DEBUG_QUEUE, "reaping incoming queue entry at %lx\n", rq);
773 qe = bus_to_virt (rq);
775 fs_dprintk (FS_DEBUG_QUEUE, "queue entry: %08x %08x %08x %08x. ",
776 qe->cmd, qe->p0, qe->p1, qe->p2);
778 fs_dprintk (FS_DEBUG_QUEUE, "-> %x: %s\n",
780 res_strings[STATUS_CODE(qe)]);
782 pe = bus_to_virt (qe->p0);
783 fs_dprintk (FS_DEBUG_QUEUE, "Pool entry: %08x %08x %08x %08x %p %p.\n",
784 pe->flags, pe->next, pe->bsa, pe->aal_bufsize,
787 channo = qe->cmd & 0xffff;
789 if (channo < dev->nchannels)
790 atm_vcc = dev->atm_vccs[channo];
794 /* Single buffer packet */
795 switch (STATUS_CODE (qe)) {
797 /* Fall through for streaming mode */
798 case 0x2:/* Packet received OK.... */
803 fs_dprintk (FS_DEBUG_QUEUE, "Got skb: %p\n", skb);
804 if (FS_DEBUG_QUEUE & fs_debug) my_hd (bus_to_virt (pe->bsa), 0x20);
806 skb_put (skb, qe->p1 & 0xffff);
807 ATM_SKB(skb)->vcc = atm_vcc;
808 atomic_inc(&atm_vcc->stats->rx);
809 __net_timestamp(skb);
810 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p (pushed)\n", skb);
811 atm_vcc->push (atm_vcc, skb);
812 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
815 printk (KERN_ERR "Got a receive on a non-open channel %d.\n", channo);
818 case 0x17:/* AAL 5 CRC32 error. IFF the length field is nonzero, a buffer
819 has been consumed and needs to be processed. -- REW */
820 if (qe->p1 & 0xffff) {
821 pe = bus_to_virt (qe->p0);
823 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", pe->skb);
824 dev_kfree_skb_any (pe->skb);
825 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", pe);
829 atomic_inc(&atm_vcc->stats->rx_drop);
831 case 0x1f: /* Reassembly abort: no buffers. */
832 /* Silently increment error counter. */
834 atomic_inc(&atm_vcc->stats->rx_drop);
836 default: /* Hmm. Haven't written the code to handle the others yet... -- REW */
837 printk (KERN_WARNING "Don't know what to do with RX status %x: %s.\n",
838 STATUS_CODE(qe), res_strings[STATUS_CODE (qe)]);
840 write_fs (dev, Q_RP(q->offset), Q_INCWRAP);
846 #define DO_DIRECTION(tp) ((tp)->traffic_class != ATM_NONE)
848 static int fs_open(struct atm_vcc *atm_vcc)
852 struct fs_transmit_config *tc;
853 struct atm_trafprm * txtp;
854 struct atm_trafprm * rxtp;
855 /* struct fs_receive_config *rc;*/
856 /* struct FS_QENTRY *qe; */
861 short vpi = atm_vcc->vpi;
862 int vci = atm_vcc->vci;
866 dev = FS_DEV(atm_vcc->dev);
867 fs_dprintk (FS_DEBUG_OPEN, "fs: open on dev: %p, vcc at %p\n",
870 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
871 set_bit(ATM_VF_ADDR, &atm_vcc->flags);
873 if ((atm_vcc->qos.aal != ATM_AAL5) &&
874 (atm_vcc->qos.aal != ATM_AAL2))
875 return -EINVAL; /* XXX AAL0 */
877 fs_dprintk (FS_DEBUG_OPEN, "fs: (itf %d): open %d.%d\n",
878 atm_vcc->dev->number, atm_vcc->vpi, atm_vcc->vci);
880 /* XXX handle qos parameters (rate limiting) ? */
882 vcc = kmalloc(sizeof(struct fs_vcc), GFP_KERNEL);
883 fs_dprintk (FS_DEBUG_ALLOC, "Alloc VCC: %p(%zd)\n", vcc, sizeof(struct fs_vcc));
885 clear_bit(ATM_VF_ADDR, &atm_vcc->flags);
889 atm_vcc->dev_data = vcc;
890 vcc->last_skb = NULL;
892 init_waitqueue_head (&vcc->close_wait);
894 txtp = &atm_vcc->qos.txtp;
895 rxtp = &atm_vcc->qos.rxtp;
897 if (!test_bit(ATM_VF_PARTIAL, &atm_vcc->flags)) {
899 /* Increment the channel numer: take a free one next time. */
900 for (to=33;to;to--, dev->channo++) {
901 /* We only have 32 channels */
902 if (dev->channo >= 32)
904 /* If we need to do RX, AND the RX is inuse, try the next */
905 if (DO_DIRECTION(rxtp) && dev->atm_vccs[dev->channo])
907 /* If we need to do TX, AND the TX is inuse, try the next */
908 if (DO_DIRECTION(txtp) && test_bit (dev->channo, dev->tx_inuse))
910 /* Ok, both are free! (or not needed) */
914 printk ("No more free channels for FS50..\n");
918 vcc->channo = dev->channo;
919 dev->channo &= dev->channel_mask;
922 vcc->channo = (vpi << FS155_VCI_BITS) | (vci);
923 if (((DO_DIRECTION(rxtp) && dev->atm_vccs[vcc->channo])) ||
924 ( DO_DIRECTION(txtp) && test_bit (vcc->channo, dev->tx_inuse))) {
925 printk ("Channel is in use for FS155.\n");
930 fs_dprintk (FS_DEBUG_OPEN, "OK. Allocated channel %x(%d).\n",
931 vcc->channo, vcc->channo);
934 if (DO_DIRECTION (txtp)) {
935 tc = kmalloc (sizeof (struct fs_transmit_config), GFP_KERNEL);
936 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tc: %p(%zd)\n",
937 tc, sizeof (struct fs_transmit_config));
939 fs_dprintk (FS_DEBUG_OPEN, "fs: can't alloc transmit_config.\n");
944 /* Allocate the "open" entry from the high priority txq. This makes
945 it most likely that the chip will notice it. It also prevents us
946 from having to wait for completion. On the other hand, we may
947 need to wait for completion anyway, to see if it completed
950 switch (atm_vcc->qos.aal) {
954 | TC_FLAGS_TRANSPARENT_PAYLOAD
957 | TC_FLAGS_TYPE_UBR /* XXX Change to VBR -- PVDL */
963 | TC_FLAGS_PACKET /* ??? */
968 printk ("Unknown aal: %d\n", atm_vcc->qos.aal);
971 /* Docs are vague about this atm_hdr field. By the way, the FS
972 * chip makes odd errors if lower bits are set.... -- REW */
973 tc->atm_hdr = (vpi << 20) | (vci << 4);
976 int pcr = atm_pcr_goal (txtp);
978 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
980 /* XXX Hmm. officially we're only allowed to do this if rounding
981 is round_down -- REW */
983 if (pcr > 51840000/53/8) pcr = 51840000/53/8;
985 if (pcr > 155520000/53/8) pcr = 155520000/53/8;
989 tmc0 = IS_FS50(dev)?0x61BE:0x64c9; /* Just copied over the bits from Fujitsu -- REW */
998 error = make_rate (pcr, r, &tmc0, NULL);
1005 fs_dprintk (FS_DEBUG_OPEN, "pcr = %d.\n", pcr);
1008 tc->TMC[0] = tmc0 | 0x4000;
1009 tc->TMC[1] = 0; /* Unused */
1010 tc->TMC[2] = 0; /* Unused */
1011 tc->TMC[3] = 0; /* Unused */
1013 tc->spec = 0; /* UTOPIA address, UDF, HEC: Unused -> 0 */
1014 tc->rtag[0] = 0; /* What should I do with routing tags???
1015 -- Not used -- AS -- Thanks -- REW*/
1019 if (fs_debug & FS_DEBUG_OPEN) {
1020 fs_dprintk (FS_DEBUG_OPEN, "TX config record:\n");
1021 my_hd (tc, sizeof (*tc));
1024 /* We now use the "submit_command" function to submit commands to
1025 the firestream. There is a define up near the definition of
1026 that routine that switches this routine between immediate write
1027 to the immediate command registers and queuing the commands in
1028 the HPTXQ for execution. This last technique might be more
1029 efficient if we know we're going to submit a whole lot of
1030 commands in one go, but this driver is not setup to be able to
1031 use such a construct. So it probably doen't matter much right
1034 /* The command is IMMediate and INQueue. The parameters are out-of-line.. */
1035 submit_command (dev, &dev->hp_txq,
1036 QE_CMD_CONFIG_TX | QE_CMD_IMM_INQ | vcc->channo,
1037 virt_to_bus (tc), 0, 0);
1039 submit_command (dev, &dev->hp_txq,
1040 QE_CMD_TX_EN | QE_CMD_IMM_INQ | vcc->channo,
1042 set_bit (vcc->channo, dev->tx_inuse);
1045 if (DO_DIRECTION (rxtp)) {
1046 dev->atm_vccs[vcc->channo] = atm_vcc;
1048 for (bfp = 0;bfp < FS_NR_FREE_POOLS; bfp++)
1049 if (atm_vcc->qos.rxtp.max_sdu <= dev->rx_fp[bfp].bufsize) break;
1050 if (bfp >= FS_NR_FREE_POOLS) {
1051 fs_dprintk (FS_DEBUG_OPEN, "No free pool fits sdu: %d.\n",
1052 atm_vcc->qos.rxtp.max_sdu);
1053 /* XXX Cleanup? -- Would just calling fs_close work??? -- REW */
1055 /* XXX clear tx inuse. Close TX part? */
1056 dev->atm_vccs[vcc->channo] = NULL;
1061 switch (atm_vcc->qos.aal) {
1064 submit_command (dev, &dev->hp_txq,
1065 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1067 RC_FLAGS_BFPS_BFP * bfp |
1068 RC_FLAGS_RXBM_PSB, 0, 0);
1071 submit_command (dev, &dev->hp_txq,
1072 QE_CMD_CONFIG_RX | QE_CMD_IMM_INQ | vcc->channo,
1074 RC_FLAGS_BFPS_BFP * bfp |
1075 RC_FLAGS_RXBM_PSB, 0, 0);
1078 if (IS_FS50 (dev)) {
1079 submit_command (dev, &dev->hp_txq,
1080 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1082 (vpi << 16) | vci, 0 ); /* XXX -- Use defines. */
1084 submit_command (dev, &dev->hp_txq,
1085 QE_CMD_RX_EN | QE_CMD_IMM_INQ | vcc->channo,
1089 /* Indicate we're done! */
1090 set_bit(ATM_VF_READY, &atm_vcc->flags);
1097 static void fs_close(struct atm_vcc *atm_vcc)
1099 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1100 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1101 struct atm_trafprm * txtp;
1102 struct atm_trafprm * rxtp;
1106 clear_bit(ATM_VF_READY, &atm_vcc->flags);
1108 fs_dprintk (FS_DEBUG_QSIZE, "--==**[%d]**==--", dev->ntxpckts);
1109 if (vcc->last_skb) {
1110 fs_dprintk (FS_DEBUG_QUEUE, "Waiting for skb %p to be sent.\n",
1112 /* We're going to wait for the last packet to get sent on this VC. It would
1113 be impolite not to send them don't you think?
1115 We don't know which packets didn't get sent. So if we get interrupted in
1116 this sleep_on, we'll lose any reference to these packets. Memory leak!
1117 On the other hand, it's awfully convenient that we can abort a "close" that
1118 is taking too long. Maybe just use non-interruptible sleep on? -- REW */
1119 wait_event_interruptible(vcc->close_wait, !vcc->last_skb);
1122 txtp = &atm_vcc->qos.txtp;
1123 rxtp = &atm_vcc->qos.rxtp;
1126 /* See App note XXX (Unpublished as of now) for the reason for the
1127 removal of the "CMD_IMM_INQ" part of the TX_PURGE_INH... -- REW */
1129 if (DO_DIRECTION (txtp)) {
1130 submit_command (dev, &dev->hp_txq,
1131 QE_CMD_TX_PURGE_INH | /*QE_CMD_IMM_INQ|*/ vcc->channo, 0,0,0);
1132 clear_bit (vcc->channo, dev->tx_inuse);
1135 if (DO_DIRECTION (rxtp)) {
1136 submit_command (dev, &dev->hp_txq,
1137 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1138 dev->atm_vccs [vcc->channo] = NULL;
1140 /* This means that this is configured as a receive channel */
1141 if (IS_FS50 (dev)) {
1142 /* Disable the receive filter. Is 0/0 indeed an invalid receive
1143 channel? -- REW. Yes it is. -- Hang. Ok. I'll use -1
1144 (0xfff...) -- REW */
1145 submit_command (dev, &dev->hp_txq,
1146 QE_CMD_REG_WR | QE_CMD_IMM_INQ,
1147 0x80 + vcc->channo, -1, 0 );
1151 fs_dprintk (FS_DEBUG_ALLOC, "Free vcc: %p\n", vcc);
1158 static int fs_send (struct atm_vcc *atm_vcc, struct sk_buff *skb)
1160 struct fs_dev *dev = FS_DEV (atm_vcc->dev);
1161 struct fs_vcc *vcc = FS_VCC (atm_vcc);
1162 struct FS_BPENTRY *td;
1166 fs_dprintk (FS_DEBUG_TXMEM, "I");
1167 fs_dprintk (FS_DEBUG_SEND, "Send: atm_vcc %p skb %p vcc %p dev %p\n",
1168 atm_vcc, skb, vcc, dev);
1170 fs_dprintk (FS_DEBUG_ALLOC, "Alloc t-skb: %p (atm_send)\n", skb);
1172 ATM_SKB(skb)->vcc = atm_vcc;
1174 vcc->last_skb = skb;
1176 td = kmalloc (sizeof (struct FS_BPENTRY), GFP_ATOMIC);
1177 fs_dprintk (FS_DEBUG_ALLOC, "Alloc transd: %p(%zd)\n", td, sizeof (struct FS_BPENTRY));
1179 /* Oops out of mem */
1183 fs_dprintk (FS_DEBUG_SEND, "first word in buffer: %x\n",
1184 *(int *) skb->data);
1186 td->flags = TD_EPI | TD_DATA | skb->len;
1188 td->bsa = virt_to_bus (skb->data);
1195 dq[qd].flags = td->flags;
1196 dq[qd].next = td->next;
1197 dq[qd].bsa = td->bsa;
1198 dq[qd].skb = td->skb;
1199 dq[qd].dev = td->dev;
1201 if (qd >= 60) qd = 0;
1204 submit_queue (dev, &dev->hp_txq,
1205 QE_TRANSMIT_DE | vcc->channo,
1206 virt_to_bus (td), 0,
1209 fs_dprintk (FS_DEBUG_QUEUE, "in send: txq %d txrq %d\n",
1210 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1211 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1212 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1213 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1220 /* Some function placeholders for functions we don't yet support. */
1223 static int fs_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1227 return -ENOIOCTLCMD;
1231 static int fs_getsockopt(struct atm_vcc *vcc,int level,int optname,
1232 void __user *optval,int optlen)
1240 static int fs_setsockopt(struct atm_vcc *vcc,int level,int optname,
1241 void __user *optval,unsigned int optlen)
1249 static void fs_phy_put(struct atm_dev *dev,unsigned char value,
1257 static unsigned char fs_phy_get(struct atm_dev *dev,unsigned long addr)
1265 static int fs_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1275 static const struct atmdev_ops ops = {
1279 .owner = THIS_MODULE,
1280 /* ioctl: fs_ioctl, */
1281 /* getsockopt: fs_getsockopt, */
1282 /* setsockopt: fs_setsockopt, */
1283 /* change_qos: fs_change_qos, */
1285 /* For now implement these internally here... */
1286 /* phy_put: fs_phy_put, */
1287 /* phy_get: fs_phy_get, */
1291 static void undocumented_pci_fix(struct pci_dev *pdev)
1295 /* The Windows driver says: */
1296 /* Switch off FireStream Retry Limit Threshold
1299 /* The register at 0x28 is documented as "reserved", no further
1302 pci_read_config_dword (pdev, 0x28, &tint);
1305 pci_write_config_dword (pdev, 0x28, tint);
1311 /**************************************************************************
1313 **************************************************************************/
1315 static void write_phy(struct fs_dev *dev, int regnum, int val)
1317 submit_command (dev, &dev->hp_txq, QE_CMD_PRP_WR | QE_CMD_IMM_INQ,
1321 static int init_phy(struct fs_dev *dev, struct reginit_item *reginit)
1326 while (reginit->reg != PHY_EOF) {
1327 if (reginit->reg == PHY_CLEARALL) {
1328 /* "PHY_CLEARALL means clear all registers. Numregisters is in "val". */
1329 for (i=0;i<reginit->val;i++) {
1330 write_phy (dev, i, 0);
1333 write_phy (dev, reginit->reg, reginit->val);
1341 static void reset_chip (struct fs_dev *dev)
1345 write_fs (dev, SARMODE0, SARMODE0_SRTS0);
1347 /* Undocumented delay */
1350 /* The "internal registers are documented to all reset to zero, but
1351 comments & code in the Windows driver indicates that the pools are
1353 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1354 write_fs (dev, FP_CNF (RXB_FP(i)), 0);
1355 write_fs (dev, FP_SA (RXB_FP(i)), 0);
1356 write_fs (dev, FP_EA (RXB_FP(i)), 0);
1357 write_fs (dev, FP_CNT (RXB_FP(i)), 0);
1358 write_fs (dev, FP_CTU (RXB_FP(i)), 0);
1361 /* The same goes for the match channel registers, although those are
1362 NOT documented that way in the Windows driver. -- REW */
1363 /* The Windows driver DOES write 0 to these registers somewhere in
1364 the init sequence. However, a small hardware-feature, will
1365 prevent reception of data on VPI/VCI = 0/0 (Unless the channel
1366 allocated happens to have no disabled channels that have a lower
1369 /* Clear the match channel registers. */
1370 if (IS_FS50 (dev)) {
1371 for (i=0;i<FS50_NR_CHANNELS;i++) {
1372 write_fs (dev, 0x200 + i * 4, -1);
1377 static void *aligned_kmalloc(int size, gfp_t flags, int alignment)
1381 if (alignment <= 0x10) {
1382 t = kmalloc (size, flags);
1383 if ((unsigned long)t & (alignment-1)) {
1384 printk ("Kmalloc doesn't align things correctly! %p\n", t);
1386 return aligned_kmalloc (size, flags, alignment * 4);
1390 printk (KERN_ERR "Request for > 0x10 alignment not yet implemented (hard!)\n");
1394 static int init_q(struct fs_dev *dev, struct queue *txq, int queue,
1395 int nentries, int is_rq)
1397 int sz = nentries * sizeof (struct FS_QENTRY);
1398 struct FS_QENTRY *p;
1402 fs_dprintk (FS_DEBUG_INIT, "Initializing queue at %x: %d entries:\n",
1405 p = aligned_kmalloc (sz, GFP_KERNEL, 0x10);
1406 fs_dprintk (FS_DEBUG_ALLOC, "Alloc queue: %p(%d)\n", p, sz);
1410 write_fs (dev, Q_SA(queue), virt_to_bus(p));
1411 write_fs (dev, Q_EA(queue), virt_to_bus(p+nentries-1));
1412 write_fs (dev, Q_WP(queue), virt_to_bus(p));
1413 write_fs (dev, Q_RP(queue), virt_to_bus(p));
1415 /* Configuration for the receive queue: 0: interrupt immediately,
1416 no pre-warning to empty queues: We do our best to keep the
1417 queue filled anyway. */
1418 write_fs (dev, Q_CNF(queue), 0 );
1423 txq->offset = queue;
1430 static int init_fp(struct fs_dev *dev, struct freepool *fp, int queue,
1431 int bufsize, int nr_buffers)
1435 fs_dprintk (FS_DEBUG_INIT, "Initializing free pool at %x:\n", queue);
1437 write_fs (dev, FP_CNF(queue), (bufsize * RBFP_RBS) | RBFP_RBSVAL | RBFP_CME);
1438 write_fs (dev, FP_SA(queue), 0);
1439 write_fs (dev, FP_EA(queue), 0);
1440 write_fs (dev, FP_CTU(queue), 0);
1441 write_fs (dev, FP_CNT(queue), 0);
1444 fp->bufsize = bufsize;
1445 fp->nr_buffers = nr_buffers;
1452 static inline int nr_buffers_in_freepool (struct fs_dev *dev, struct freepool *fp)
1455 /* This seems to be unreliable.... */
1456 return read_fs (dev, FP_CNT (fp->offset));
1463 /* Check if this gets going again if a pool ever runs out. -- Yes, it
1464 does. I've seen "receive abort: no buffers" and things started
1465 working again after that... -- REW */
1467 static void top_off_fp (struct fs_dev *dev, struct freepool *fp,
1470 struct FS_BPENTRY *qe, *ne;
1471 struct sk_buff *skb;
1475 fs_dprintk (FS_DEBUG_QUEUE, "Topping off queue at %x (%d-%d/%d)\n",
1476 fp->offset, read_fs (dev, FP_CNT (fp->offset)), fp->n,
1478 while (nr_buffers_in_freepool(dev, fp) < fp->nr_buffers) {
1480 skb = alloc_skb (fp->bufsize, gfp_flags);
1481 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-skb: %p(%d)\n", skb, fp->bufsize);
1483 ne = kmalloc (sizeof (struct FS_BPENTRY), gfp_flags);
1484 fs_dprintk (FS_DEBUG_ALLOC, "Alloc rec-d: %p(%zd)\n", ne, sizeof (struct FS_BPENTRY));
1486 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", skb);
1487 dev_kfree_skb_any (skb);
1491 fs_dprintk (FS_DEBUG_QUEUE, "Adding skb %p desc %p -> %p(%p) ",
1492 skb, ne, skb->data, skb->head);
1494 ne->flags = FP_FLAGS_EPI | fp->bufsize;
1495 ne->next = virt_to_bus (NULL);
1496 ne->bsa = virt_to_bus (skb->data);
1497 ne->aal_bufsize = fp->bufsize;
1502 * FIXME: following code encodes and decodes
1503 * machine pointers (could be 64-bit) into a
1507 qe_tmp = read_fs (dev, FP_EA(fp->offset));
1508 fs_dprintk (FS_DEBUG_QUEUE, "link at %x\n", qe_tmp);
1510 qe = bus_to_virt ((long) qe_tmp);
1511 qe->next = virt_to_bus(ne);
1512 qe->flags &= ~FP_FLAGS_EPI;
1514 write_fs (dev, FP_SA(fp->offset), virt_to_bus(ne));
1516 write_fs (dev, FP_EA(fp->offset), virt_to_bus (ne));
1517 fp->n++; /* XXX Atomic_inc? */
1518 write_fs (dev, FP_CTU(fp->offset), 1);
1521 fs_dprintk (FS_DEBUG_QUEUE, "Added %d entries. \n", n);
1524 static void free_queue(struct fs_dev *dev, struct queue *txq)
1528 write_fs (dev, Q_SA(txq->offset), 0);
1529 write_fs (dev, Q_EA(txq->offset), 0);
1530 write_fs (dev, Q_RP(txq->offset), 0);
1531 write_fs (dev, Q_WP(txq->offset), 0);
1532 /* Configuration ? */
1534 fs_dprintk (FS_DEBUG_ALLOC, "Free queue: %p\n", txq->sa);
1540 static void free_freepool(struct fs_dev *dev, struct freepool *fp)
1544 write_fs (dev, FP_CNF(fp->offset), 0);
1545 write_fs (dev, FP_SA (fp->offset), 0);
1546 write_fs (dev, FP_EA (fp->offset), 0);
1547 write_fs (dev, FP_CNT(fp->offset), 0);
1548 write_fs (dev, FP_CTU(fp->offset), 0);
1555 static irqreturn_t fs_irq (int irq, void *dev_id)
1559 struct fs_dev *dev = dev_id;
1561 status = read_fs (dev, ISR);
1567 #ifdef IRQ_RATE_LIMIT
1568 /* Aaargh! I'm ashamed. This costs more lines-of-code than the actual
1569 interrupt routine!. (Well, used to when I wrote that comment) -- REW */
1574 if (lastjif == jiffies) {
1575 if (++nintr > IRQ_RATE_LIMIT) {
1576 free_irq (dev->irq, dev_id);
1577 printk (KERN_ERR "fs: Too many interrupts. Turning off interrupt %d.\n",
1586 fs_dprintk (FS_DEBUG_QUEUE, "in intr: txq %d txrq %d\n",
1587 read_fs (dev, Q_EA (dev->hp_txq.offset)) -
1588 read_fs (dev, Q_SA (dev->hp_txq.offset)),
1589 read_fs (dev, Q_EA (dev->tx_relq.offset)) -
1590 read_fs (dev, Q_SA (dev->tx_relq.offset)));
1592 /* print the bits in the ISR register. */
1593 if (fs_debug & FS_DEBUG_IRQ) {
1594 /* The FS_DEBUG things are unnecessary here. But this way it is
1595 clear for grep that these are debug prints. */
1596 fs_dprintk (FS_DEBUG_IRQ, "IRQ status:");
1598 if (status & (1 << i))
1599 fs_dprintk (FS_DEBUG_IRQ, " %s", irq_bitname[i]);
1600 fs_dprintk (FS_DEBUG_IRQ, "\n");
1603 if (status & ISR_RBRQ0_W) {
1604 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (0)!!!!\n");
1605 process_incoming (dev, &dev->rx_rq[0]);
1606 /* items mentioned on RBRQ0 are from FP 0 or 1. */
1607 top_off_fp (dev, &dev->rx_fp[0], GFP_ATOMIC);
1608 top_off_fp (dev, &dev->rx_fp[1], GFP_ATOMIC);
1611 if (status & ISR_RBRQ1_W) {
1612 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (1)!!!!\n");
1613 process_incoming (dev, &dev->rx_rq[1]);
1614 top_off_fp (dev, &dev->rx_fp[2], GFP_ATOMIC);
1615 top_off_fp (dev, &dev->rx_fp[3], GFP_ATOMIC);
1618 if (status & ISR_RBRQ2_W) {
1619 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (2)!!!!\n");
1620 process_incoming (dev, &dev->rx_rq[2]);
1621 top_off_fp (dev, &dev->rx_fp[4], GFP_ATOMIC);
1622 top_off_fp (dev, &dev->rx_fp[5], GFP_ATOMIC);
1625 if (status & ISR_RBRQ3_W) {
1626 fs_dprintk (FS_DEBUG_IRQ, "Iiiin-coming (3)!!!!\n");
1627 process_incoming (dev, &dev->rx_rq[3]);
1628 top_off_fp (dev, &dev->rx_fp[6], GFP_ATOMIC);
1629 top_off_fp (dev, &dev->rx_fp[7], GFP_ATOMIC);
1632 if (status & ISR_CSQ_W) {
1633 fs_dprintk (FS_DEBUG_IRQ, "Command executed ok!\n");
1634 process_return_queue (dev, &dev->st_q);
1637 if (status & ISR_TBRQ_W) {
1638 fs_dprintk (FS_DEBUG_IRQ, "Data transmitted!\n");
1639 process_txdone_queue (dev, &dev->tx_relq);
1648 static void fs_poll (struct timer_list *t)
1650 struct fs_dev *dev = from_timer(dev, t, timer);
1653 dev->timer.expires = jiffies + FS_POLL_FREQ;
1654 add_timer (&dev->timer);
1658 static int fs_init(struct fs_dev *dev)
1660 struct pci_dev *pci_dev;
1665 pci_dev = dev->pci_dev;
1667 printk (KERN_INFO "found a FireStream %d card, base %16llx, irq%d.\n",
1668 IS_FS50(dev)?50:155,
1669 (unsigned long long)pci_resource_start(pci_dev, 0),
1672 if (fs_debug & FS_DEBUG_INIT)
1673 my_hd ((unsigned char *) dev, sizeof (*dev));
1675 undocumented_pci_fix (pci_dev);
1677 dev->hw_base = pci_resource_start(pci_dev, 0);
1679 dev->base = ioremap(dev->hw_base, 0x1000);
1685 write_fs (dev, SARMODE0, 0
1686 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1687 | (1 * SARMODE0_INTMODE_READCLEAR)
1688 | (1 * SARMODE0_CWRE)
1689 | (IS_FS50(dev) ? SARMODE0_PRPWT_FS50_5:
1690 SARMODE0_PRPWT_FS155_3)
1691 | (1 * SARMODE0_CALSUP_1)
1692 | (IS_FS50(dev) ? (0
1694 | SARMODE0_ABRVCS_32
1695 | SARMODE0_TXVCS_32):
1698 | SARMODE0_ABRVCS_1k
1699 | SARMODE0_TXVCS_1k)));
1701 /* 10ms * 100 is 1 second. That should be enough, as AN3:9 says it takes
1705 isr = read_fs (dev, ISR);
1707 /* This bit is documented as "RESERVED" */
1708 if (isr & ISR_INIT_ERR) {
1709 printk (KERN_ERR "Error initializing the FS... \n");
1712 if (isr & ISR_INIT) {
1713 fs_dprintk (FS_DEBUG_INIT, "Ha! Initialized OK!\n");
1717 /* Try again after 10ms. */
1722 printk (KERN_ERR "timeout initializing the FS... \n");
1726 /* XXX fix for fs155 */
1727 dev->channel_mask = 0x1f;
1731 write_fs (dev, SARMODE1, 0
1732 | (fs_keystream * SARMODE1_DEFHEC) /* XXX PHY */
1733 | ((loopback == 1) * SARMODE1_TSTLP) /* XXX Loopback mode enable... */
1734 | (1 * SARMODE1_DCRM)
1735 | (1 * SARMODE1_DCOAM)
1736 | (0 * SARMODE1_OAMCRC)
1737 | (0 * SARMODE1_DUMPE)
1738 | (0 * SARMODE1_GPLEN)
1739 | (0 * SARMODE1_GNAM)
1740 | (0 * SARMODE1_GVAS)
1741 | (0 * SARMODE1_GPAS)
1742 | (1 * SARMODE1_GPRI)
1743 | (0 * SARMODE1_PMS)
1744 | (0 * SARMODE1_GFCR)
1745 | (1 * SARMODE1_HECM2)
1746 | (1 * SARMODE1_HECM1)
1747 | (1 * SARMODE1_HECM0)
1748 | (1 << 12) /* That's what hang's driver does. Program to 0 */
1749 | (0 * 0xff) /* XXX FS155 */);
1752 /* Cal prescale etc */
1755 write_fs (dev, TMCONF, 0x0000000f);
1756 write_fs (dev, CALPRESCALE, 0x01010101 * num);
1757 write_fs (dev, 0x80, 0x000F00E4);
1760 write_fs (dev, CELLOSCONF, 0
1761 | ( 0 * CELLOSCONF_CEN)
1763 | (0x80 * CELLOSCONF_COBS)
1764 | (num * CELLOSCONF_COPK) /* Changed from 0xff to 0x5a */
1765 | (num * CELLOSCONF_COST));/* after a hint from Hang.
1766 * performance jumped 50->70... */
1768 /* Magic value by Hang */
1769 write_fs (dev, CELLOSCONF_COST, 0x0B809191);
1771 if (IS_FS50 (dev)) {
1772 write_fs (dev, RAS0, RAS0_DCD_XHLT);
1773 dev->atm_dev->ci_range.vpi_bits = 12;
1774 dev->atm_dev->ci_range.vci_bits = 16;
1775 dev->nchannels = FS50_NR_CHANNELS;
1777 write_fs (dev, RAS0, RAS0_DCD_XHLT
1778 | (((1 << FS155_VPI_BITS) - 1) * RAS0_VPSEL)
1779 | (((1 << FS155_VCI_BITS) - 1) * RAS0_VCSEL));
1780 /* We can chose the split arbitrarily. We might be able to
1781 support more. Whatever. This should do for now. */
1782 dev->atm_dev->ci_range.vpi_bits = FS155_VPI_BITS;
1783 dev->atm_dev->ci_range.vci_bits = FS155_VCI_BITS;
1785 /* Address bits we can't use should be compared to 0. */
1786 write_fs (dev, RAC, 0);
1788 /* Manual (AN9, page 6) says ASF1=0 means compare Utopia address
1789 * too. I can't find ASF1 anywhere. Anyway, we AND with just the
1790 * other bits, then compare with 0, which is exactly what we
1792 write_fs (dev, RAM, (1 << (28 - FS155_VPI_BITS - FS155_VCI_BITS)) - 1);
1793 dev->nchannels = FS155_NR_CHANNELS;
1795 dev->atm_vccs = kcalloc (dev->nchannels, sizeof (struct atm_vcc *),
1797 fs_dprintk (FS_DEBUG_ALLOC, "Alloc atmvccs: %p(%zd)\n",
1798 dev->atm_vccs, dev->nchannels * sizeof (struct atm_vcc *));
1800 if (!dev->atm_vccs) {
1801 printk (KERN_WARNING "Couldn't allocate memory for VCC buffers. Woops!\n");
1802 /* XXX Clean up..... */
1806 dev->tx_inuse = kzalloc (dev->nchannels / 8 /* bits/byte */ , GFP_KERNEL);
1807 fs_dprintk (FS_DEBUG_ALLOC, "Alloc tx_inuse: %p(%d)\n",
1808 dev->atm_vccs, dev->nchannels / 8);
1810 if (!dev->tx_inuse) {
1811 printk (KERN_WARNING "Couldn't allocate memory for tx_inuse bits!\n");
1812 /* XXX Clean up..... */
1815 /* -- RAS1 : FS155 and 50 differ. Default (0) should be OK for both */
1816 /* -- RAS2 : FS50 only: Default is OK. */
1818 /* DMAMODE, default should be OK. -- REW */
1819 write_fs (dev, DMAMR, DMAMR_TX_MODE_FULL);
1821 init_q (dev, &dev->hp_txq, TX_PQ(TXQ_HP), TXQ_NENTRIES, 0);
1822 init_q (dev, &dev->lp_txq, TX_PQ(TXQ_LP), TXQ_NENTRIES, 0);
1823 init_q (dev, &dev->tx_relq, TXB_RQ, TXQ_NENTRIES, 1);
1824 init_q (dev, &dev->st_q, ST_Q, TXQ_NENTRIES, 1);
1826 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1827 init_fp (dev, &dev->rx_fp[i], RXB_FP(i),
1828 rx_buf_sizes[i], rx_pool_sizes[i]);
1829 top_off_fp (dev, &dev->rx_fp[i], GFP_KERNEL);
1833 for (i=0;i < FS_NR_RX_QUEUES;i++)
1834 init_q (dev, &dev->rx_rq[i], RXB_RQ(i), RXRQ_NENTRIES, 1);
1836 dev->irq = pci_dev->irq;
1837 if (request_irq (dev->irq, fs_irq, IRQF_SHARED, "firestream", dev)) {
1838 printk (KERN_WARNING "couldn't get irq %d for firestream.\n", pci_dev->irq);
1839 /* XXX undo all previous stuff... */
1842 fs_dprintk (FS_DEBUG_INIT, "Grabbed irq %d for dev at %p.\n", dev->irq, dev);
1844 /* We want to be notified of most things. Just the statistics count
1845 overflows are not interesting */
1846 write_fs (dev, IMR, 0
1854 write_fs (dev, SARMODE0, 0
1855 | (0 * SARMODE0_SHADEN) /* We don't use shadow registers. */
1856 | (1 * SARMODE0_GINT)
1857 | (1 * SARMODE0_INTMODE_READCLEAR)
1858 | (0 * SARMODE0_CWRE)
1859 | (IS_FS50(dev)?SARMODE0_PRPWT_FS50_5:
1860 SARMODE0_PRPWT_FS155_3)
1861 | (1 * SARMODE0_CALSUP_1)
1864 | SARMODE0_ABRVCS_32
1865 | SARMODE0_TXVCS_32):
1868 | SARMODE0_ABRVCS_1k
1869 | SARMODE0_TXVCS_1k))
1870 | (1 * SARMODE0_RUN));
1872 init_phy (dev, PHY_NTC_INIT);
1874 if (loopback == 2) {
1875 write_phy (dev, 0x39, 0x000e);
1879 timer_setup(&dev->timer, fs_poll, 0);
1880 dev->timer.expires = jiffies + FS_POLL_FREQ;
1881 add_timer (&dev->timer);
1884 dev->atm_dev->dev_data = dev;
1893 static int firestream_init_one(struct pci_dev *pci_dev,
1894 const struct pci_device_id *ent)
1896 struct atm_dev *atm_dev;
1897 struct fs_dev *fs_dev;
1899 if (pci_enable_device(pci_dev))
1902 fs_dev = kzalloc (sizeof (struct fs_dev), GFP_KERNEL);
1903 fs_dprintk (FS_DEBUG_ALLOC, "Alloc fs-dev: %p(%zd)\n",
1904 fs_dev, sizeof (struct fs_dev));
1907 atm_dev = atm_dev_register("fs", &pci_dev->dev, &ops, -1, NULL);
1909 goto err_out_free_fs_dev;
1911 fs_dev->pci_dev = pci_dev;
1912 fs_dev->atm_dev = atm_dev;
1913 fs_dev->flags = ent->driver_data;
1915 if (fs_init(fs_dev))
1916 goto err_out_free_atm_dev;
1918 fs_dev->next = fs_boards;
1922 err_out_free_atm_dev:
1923 atm_dev_deregister(atm_dev);
1924 err_out_free_fs_dev:
1930 static void firestream_remove_one(struct pci_dev *pdev)
1933 struct fs_dev *dev, *nxtdev;
1935 struct FS_BPENTRY *fp, *nxt;
1940 printk ("hptxq:\n");
1941 for (i=0;i<60;i++) {
1942 printk ("%d: %08x %08x %08x %08x \n",
1943 i, pq[qp].cmd, pq[qp].p0, pq[qp].p1, pq[qp].p2);
1945 if (qp >= 60) qp = 0;
1948 printk ("descriptors:\n");
1949 for (i=0;i<60;i++) {
1950 printk ("%d: %p: %08x %08x %p %p\n",
1951 i, da[qd], dq[qd].flags, dq[qd].bsa, dq[qd].skb, dq[qd].dev);
1953 if (qd >= 60) qd = 0;
1957 for (dev = fs_boards;dev != NULL;dev=nxtdev) {
1958 fs_dprintk (FS_DEBUG_CLEANUP, "Releasing resources for dev at %p.\n", dev);
1960 /* XXX Hit all the tx channels too! */
1962 for (i=0;i < dev->nchannels;i++) {
1963 if (dev->atm_vccs[i]) {
1964 vcc = FS_VCC (dev->atm_vccs[i]);
1965 submit_command (dev, &dev->hp_txq,
1966 QE_CMD_TX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1967 submit_command (dev, &dev->hp_txq,
1968 QE_CMD_RX_PURGE_INH | QE_CMD_IMM_INQ | vcc->channo, 0,0,0);
1973 /* XXX Wait a while for the chip to release all buffers. */
1975 for (i=0;i < FS_NR_FREE_POOLS;i++) {
1976 for (fp=bus_to_virt (read_fs (dev, FP_SA(dev->rx_fp[i].offset)));
1977 !(fp->flags & FP_FLAGS_EPI);fp = nxt) {
1978 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1979 dev_kfree_skb_any (fp->skb);
1980 nxt = bus_to_virt (fp->next);
1981 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1984 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-skb: %p\n", fp->skb);
1985 dev_kfree_skb_any (fp->skb);
1986 fs_dprintk (FS_DEBUG_ALLOC, "Free rec-d: %p\n", fp);
1990 /* Hang the chip in "reset", prevent it clobbering memory that is
1994 fs_dprintk (FS_DEBUG_CLEANUP, "Freeing irq%d.\n", dev->irq);
1995 free_irq (dev->irq, dev);
1996 del_timer_sync (&dev->timer);
1998 atm_dev_deregister(dev->atm_dev);
1999 free_queue (dev, &dev->hp_txq);
2000 free_queue (dev, &dev->lp_txq);
2001 free_queue (dev, &dev->tx_relq);
2002 free_queue (dev, &dev->st_q);
2004 fs_dprintk (FS_DEBUG_ALLOC, "Free atmvccs: %p\n", dev->atm_vccs);
2005 kfree (dev->atm_vccs);
2007 for (i=0;i< FS_NR_FREE_POOLS;i++)
2008 free_freepool (dev, &dev->rx_fp[i]);
2010 for (i=0;i < FS_NR_RX_QUEUES;i++)
2011 free_queue (dev, &dev->rx_rq[i]);
2014 fs_dprintk (FS_DEBUG_ALLOC, "Free fs-dev: %p\n", dev);
2022 static const struct pci_device_id firestream_pci_tbl[] = {
2023 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS50), FS_IS50},
2024 { PCI_VDEVICE(FUJITSU_ME, PCI_DEVICE_ID_FUJITSU_FS155), FS_IS155},
2028 MODULE_DEVICE_TABLE(pci, firestream_pci_tbl);
2030 static struct pci_driver firestream_driver = {
2031 .name = "firestream",
2032 .id_table = firestream_pci_tbl,
2033 .probe = firestream_init_one,
2034 .remove = firestream_remove_one,
2037 static int __init firestream_init_module (void)
2042 error = pci_register_driver(&firestream_driver);
2047 static void __exit firestream_cleanup_module(void)
2049 pci_unregister_driver(&firestream_driver);
2052 module_init(firestream_init_module);
2053 module_exit(firestream_cleanup_module);
2055 MODULE_LICENSE("GPL");