1 // SPDX-License-Identifier: GPL-2.0
3 * Intel BXT WhiskeyCove PMIC operation region driver
5 * Copyright (C) 2015 Intel Corporation. All rights reserved.
8 #include <linux/init.h>
9 #include <linux/acpi.h>
10 #include <linux/mfd/intel_soc_pmic.h>
11 #include <linux/regmap.h>
12 #include <linux/platform_device.h>
13 #include "intel_pmic.h"
15 #define WHISKEY_COVE_ALRT_HIGH_BIT_MASK 0x0F
16 #define WHISKEY_COVE_ADC_HIGH_BIT(x) (((x & 0x0F) << 8))
17 #define WHISKEY_COVE_ADC_CURSRC(x) (((x & 0xF0) >> 4))
18 #define VR_MODE_DISABLED 0
19 #define VR_MODE_AUTO BIT(0)
20 #define VR_MODE_NORMAL BIT(1)
21 #define VR_MODE_SWITCH BIT(2)
22 #define VR_MODE_ECO (BIT(0)|BIT(1))
23 #define VSWITCH2_OUTPUT BIT(5)
24 #define VSWITCH1_OUTPUT BIT(4)
25 #define VUSBPHY_CHARGE BIT(1)
27 static struct pmic_table power_table[] = {
32 }, /* VDD1 -> VDD1CNT */
37 }, /* VDD2 -> VDD2CNT */
42 }, /* VDD3 -> VDD3CNT */
47 }, /* VLFX -> VFLEXCNT */
51 .bit = VR_MODE_NORMAL,
52 }, /* VP1A -> VPROG1ACNT */
56 .bit = VR_MODE_NORMAL,
57 }, /* VP1B -> VPROG1BCNT */
61 .bit = VR_MODE_NORMAL,
62 }, /* VP1C -> VPROG1CCNT */
66 .bit = VR_MODE_NORMAL,
67 }, /* VP1D -> VPROG1DCNT */
71 .bit = VR_MODE_NORMAL,
72 }, /* VP2A -> VPROG2ACNT */
76 .bit = VR_MODE_NORMAL,
77 }, /* VP2B -> VPROG2BCNT */
81 .bit = VR_MODE_NORMAL,
82 }, /* VP2C -> VPROG2CCNT */
86 .bit = VR_MODE_NORMAL,
87 }, /* VP3A -> VPROG3ACNT */
91 .bit = VR_MODE_NORMAL,
92 }, /* VP3B -> VPROG3BCNT */
96 .bit = VSWITCH2_OUTPUT,
97 }, /* VSW2 -> VLD0CNT Bit 5*/
101 .bit = VSWITCH1_OUTPUT,
102 }, /* VSW1 -> VLD0CNT Bit 4 */
106 .bit = VUSBPHY_CHARGE,
107 }, /* VUPY -> VLDOCNT Bit 1 */
111 .bit = VR_MODE_NORMAL,
112 }, /* VRSO -> VREFSOCCNT*/
116 .bit = VR_MODE_NORMAL,
117 }, /* VP1E -> VPROG1ECNT */
121 .bit = VR_MODE_NORMAL,
122 }, /* VP1F -> VPROG1FCNT */
126 .bit = VR_MODE_NORMAL,
127 }, /* VP2D -> VPROG2DCNT */
131 .bit = VR_MODE_NORMAL,
132 }, /* VP4A -> VPROG4ACNT */
136 .bit = VR_MODE_NORMAL,
137 }, /* VP4B -> VPROG4BCNT */
141 .bit = VR_MODE_NORMAL,
142 }, /* VP4C -> VPROG4CCNT */
146 .bit = VR_MODE_NORMAL,
147 }, /* VP4D -> VPROG4DCNT */
151 .bit = VR_MODE_NORMAL,
152 }, /* VP5A -> VPROG5ACNT */
156 .bit = VR_MODE_NORMAL,
157 }, /* VP5B -> VPROG5BCNT */
161 .bit = VR_MODE_NORMAL,
162 }, /* VP6A -> VPROG6ACNT */
166 .bit = VR_MODE_NORMAL,
167 }, /* VP6B -> VPROG6BCNT */
172 }, /* SDWN_N -> MODEMCTRL Bit 2 */
177 } /* MOFF -> MODEMCTRL Bit 0 */
180 static struct pmic_table thermal_table[] = {
273 static int intel_bxtwc_pmic_get_power(struct regmap *regmap, int reg,
278 if (regmap_read(regmap, reg, &data))
281 *value = (data & bit) ? 1 : 0;
285 static int intel_bxtwc_pmic_update_power(struct regmap *regmap, int reg,
295 return regmap_update_bits(regmap, reg, mask, val);
298 static int intel_bxtwc_pmic_get_raw_temp(struct regmap *regmap, int reg)
300 unsigned int val, adc_val, reg_val;
301 u8 temp_l, temp_h, cursrc;
303 static const unsigned long rlsb_array[] = {
304 0, 260420, 130210, 65100, 32550, 16280,
305 8140, 4070, 2030, 0, 260420, 130210 };
307 if (regmap_read(regmap, reg, &val))
311 if (regmap_read(regmap, (reg - 1), &val))
315 reg_val = temp_l | WHISKEY_COVE_ADC_HIGH_BIT(temp_h);
316 cursrc = WHISKEY_COVE_ADC_CURSRC(temp_h);
317 rlsb = rlsb_array[cursrc];
318 adc_val = reg_val * rlsb / 1000;
324 intel_bxtwc_pmic_update_aux(struct regmap *regmap, int reg, int raw)
327 u16 resi_val, count = 0, thrsh = 0;
328 u8 alrt_h, alrt_l, cursel = 0;
333 count = fls(bsr_num) - 1;
335 cursel = clamp_t(s8, (count - 7), 0, 7);
336 thrsh = raw / (1 << (4 + cursel));
338 resi_val = (cursel << 9) | thrsh;
339 alrt_h = (resi_val >> 8) & WHISKEY_COVE_ALRT_HIGH_BIT_MASK;
340 if (regmap_update_bits(regmap,
342 WHISKEY_COVE_ALRT_HIGH_BIT_MASK,
346 alrt_l = (u8)resi_val;
347 return regmap_write(regmap, reg, alrt_l);
351 intel_bxtwc_pmic_get_policy(struct regmap *regmap, int reg, int bit, u64 *value)
356 if (regmap_read(regmap, reg, &val))
359 *value = (val & mask) >> bit;
364 intel_bxtwc_pmic_update_policy(struct regmap *regmap,
365 int reg, int bit, int enable)
367 u8 mask = BIT(bit), val = enable << bit;
369 return regmap_update_bits(regmap, reg, mask, val);
372 static struct intel_pmic_opregion_data intel_bxtwc_pmic_opregion_data = {
373 .get_power = intel_bxtwc_pmic_get_power,
374 .update_power = intel_bxtwc_pmic_update_power,
375 .get_raw_temp = intel_bxtwc_pmic_get_raw_temp,
376 .update_aux = intel_bxtwc_pmic_update_aux,
377 .get_policy = intel_bxtwc_pmic_get_policy,
378 .update_policy = intel_bxtwc_pmic_update_policy,
379 .power_table = power_table,
380 .power_table_count = ARRAY_SIZE(power_table),
381 .thermal_table = thermal_table,
382 .thermal_table_count = ARRAY_SIZE(thermal_table),
385 static int intel_bxtwc_pmic_opregion_probe(struct platform_device *pdev)
387 struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent);
389 return intel_pmic_install_opregion_handler(&pdev->dev,
390 ACPI_HANDLE(pdev->dev.parent),
392 &intel_bxtwc_pmic_opregion_data);
395 static const struct platform_device_id bxt_wc_opregion_id_table[] = {
396 { .name = "bxt_wcove_region" },
400 static struct platform_driver intel_bxtwc_pmic_opregion_driver = {
401 .probe = intel_bxtwc_pmic_opregion_probe,
403 .name = "bxt_whiskey_cove_pmic",
405 .id_table = bxt_wc_opregion_id_table,
407 builtin_platform_driver(intel_bxtwc_pmic_opregion_driver);