GNU Linux-libre 5.10.215-gnu1
[releases.git] / drivers / acpi / pci_root.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
4  *
5  *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7  */
8
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/types.h>
13 #include <linux/mutex.h>
14 #include <linux/pm.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/pci.h>
17 #include <linux/pci-acpi.h>
18 #include <linux/dmar.h>
19 #include <linux/acpi.h>
20 #include <linux/slab.h>
21 #include <linux/dmi.h>
22 #include <linux/platform_data/x86/apple.h>
23 #include "internal.h"
24
25 #define ACPI_PCI_ROOT_CLASS             "pci_bridge"
26 #define ACPI_PCI_ROOT_DEVICE_NAME       "PCI Root Bridge"
27 static int acpi_pci_root_add(struct acpi_device *device,
28                              const struct acpi_device_id *not_used);
29 static void acpi_pci_root_remove(struct acpi_device *device);
30
31 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
32 {
33         acpiphp_check_host_bridge(adev);
34         return 0;
35 }
36
37 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
38                                 | OSC_PCI_ASPM_SUPPORT \
39                                 | OSC_PCI_CLOCK_PM_SUPPORT \
40                                 | OSC_PCI_MSI_SUPPORT)
41
42 static const struct acpi_device_id root_device_ids[] = {
43         {"PNP0A03", 0},
44         {"", 0},
45 };
46
47 static struct acpi_scan_handler pci_root_handler = {
48         .ids = root_device_ids,
49         .attach = acpi_pci_root_add,
50         .detach = acpi_pci_root_remove,
51         .hotplug = {
52                 .enabled = true,
53                 .scan_dependent = acpi_pci_root_scan_dependent,
54         },
55 };
56
57 static DEFINE_MUTEX(osc_lock);
58
59 /**
60  * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
61  * @handle:  the ACPI CA node in question.
62  *
63  * Note: we could make this API take a struct acpi_device * instead, but
64  * for now, it's more convenient to operate on an acpi_handle.
65  */
66 int acpi_is_root_bridge(acpi_handle handle)
67 {
68         int ret;
69         struct acpi_device *device;
70
71         ret = acpi_bus_get_device(handle, &device);
72         if (ret)
73                 return 0;
74
75         ret = acpi_match_device_ids(device, root_device_ids);
76         if (ret)
77                 return 0;
78         else
79                 return 1;
80 }
81 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
82
83 static acpi_status
84 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
85 {
86         struct resource *res = data;
87         struct acpi_resource_address64 address;
88         acpi_status status;
89
90         status = acpi_resource_to_address64(resource, &address);
91         if (ACPI_FAILURE(status))
92                 return AE_OK;
93
94         if ((address.address.address_length > 0) &&
95             (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
96                 res->start = address.address.minimum;
97                 res->end = address.address.minimum + address.address.address_length - 1;
98         }
99
100         return AE_OK;
101 }
102
103 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
104                                              struct resource *res)
105 {
106         acpi_status status;
107
108         res->start = -1;
109         status =
110             acpi_walk_resources(handle, METHOD_NAME__CRS,
111                                 get_root_bridge_busnr_callback, res);
112         if (ACPI_FAILURE(status))
113                 return status;
114         if (res->start == -1)
115                 return AE_ERROR;
116         return AE_OK;
117 }
118
119 struct pci_osc_bit_struct {
120         u32 bit;
121         char *desc;
122 };
123
124 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
125         { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
126         { OSC_PCI_ASPM_SUPPORT, "ASPM" },
127         { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
128         { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
129         { OSC_PCI_MSI_SUPPORT, "MSI" },
130         { OSC_PCI_EDR_SUPPORT, "EDR" },
131         { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
132 };
133
134 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
135         { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
136         { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
137         { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
138         { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
139         { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
140         { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
141         { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
142 };
143
144 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
145                             struct pci_osc_bit_struct *table, int size)
146 {
147         char buf[80];
148         int i, len = 0;
149         struct pci_osc_bit_struct *entry;
150
151         buf[0] = '\0';
152         for (i = 0, entry = table; i < size; i++, entry++)
153                 if (word & entry->bit)
154                         len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
155                                         len ? " " : "", entry->desc);
156
157         dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
158 }
159
160 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
161 {
162         decode_osc_bits(root, msg, word, pci_osc_support_bit,
163                         ARRAY_SIZE(pci_osc_support_bit));
164 }
165
166 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
167 {
168         decode_osc_bits(root, msg, word, pci_osc_control_bit,
169                         ARRAY_SIZE(pci_osc_control_bit));
170 }
171
172 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
173
174 static acpi_status acpi_pci_run_osc(acpi_handle handle,
175                                     const u32 *capbuf, u32 *retval)
176 {
177         struct acpi_osc_context context = {
178                 .uuid_str = pci_osc_uuid_str,
179                 .rev = 1,
180                 .cap.length = 12,
181                 .cap.pointer = (void *)capbuf,
182         };
183         acpi_status status;
184
185         status = acpi_run_osc(handle, &context);
186         if (ACPI_SUCCESS(status)) {
187                 *retval = *((u32 *)(context.ret.pointer + 8));
188                 kfree(context.ret.pointer);
189         }
190         return status;
191 }
192
193 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
194                                         u32 support,
195                                         u32 *control)
196 {
197         acpi_status status;
198         u32 result, capbuf[3];
199
200         support &= OSC_PCI_SUPPORT_MASKS;
201         support |= root->osc_support_set;
202
203         capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
204         capbuf[OSC_SUPPORT_DWORD] = support;
205         if (control) {
206                 *control &= OSC_PCI_CONTROL_MASKS;
207                 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
208         } else {
209                 /* Run _OSC query only with existing controls. */
210                 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
211         }
212
213         status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
214         if (ACPI_SUCCESS(status)) {
215                 root->osc_support_set = support;
216                 if (control)
217                         *control = result;
218         }
219         return status;
220 }
221
222 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
223 {
224         acpi_status status;
225
226         mutex_lock(&osc_lock);
227         status = acpi_pci_query_osc(root, flags, NULL);
228         mutex_unlock(&osc_lock);
229         return status;
230 }
231
232 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
233 {
234         struct acpi_pci_root *root;
235         struct acpi_device *device;
236
237         if (acpi_bus_get_device(handle, &device) ||
238             acpi_match_device_ids(device, root_device_ids))
239                 return NULL;
240
241         root = acpi_driver_data(device);
242
243         return root;
244 }
245 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
246
247 struct acpi_handle_node {
248         struct list_head node;
249         acpi_handle handle;
250 };
251
252 /**
253  * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
254  * @handle: the handle in question
255  *
256  * Given an ACPI CA handle, the desired PCI device is located in the
257  * list of PCI devices.
258  *
259  * If the device is found, its reference count is increased and this
260  * function returns a pointer to its data structure.  The caller must
261  * decrement the reference count by calling pci_dev_put().
262  * If no device is found, %NULL is returned.
263  */
264 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
265 {
266         int dev, fn;
267         unsigned long long adr;
268         acpi_status status;
269         acpi_handle phandle;
270         struct pci_bus *pbus;
271         struct pci_dev *pdev = NULL;
272         struct acpi_handle_node *node, *tmp;
273         struct acpi_pci_root *root;
274         LIST_HEAD(device_list);
275
276         /*
277          * Walk up the ACPI CA namespace until we reach a PCI root bridge.
278          */
279         phandle = handle;
280         while (!acpi_is_root_bridge(phandle)) {
281                 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
282                 if (!node)
283                         goto out;
284
285                 INIT_LIST_HEAD(&node->node);
286                 node->handle = phandle;
287                 list_add(&node->node, &device_list);
288
289                 status = acpi_get_parent(phandle, &phandle);
290                 if (ACPI_FAILURE(status))
291                         goto out;
292         }
293
294         root = acpi_pci_find_root(phandle);
295         if (!root)
296                 goto out;
297
298         pbus = root->bus;
299
300         /*
301          * Now, walk back down the PCI device tree until we return to our
302          * original handle. Assumes that everything between the PCI root
303          * bridge and the device we're looking for must be a P2P bridge.
304          */
305         list_for_each_entry(node, &device_list, node) {
306                 acpi_handle hnd = node->handle;
307                 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
308                 if (ACPI_FAILURE(status))
309                         goto out;
310                 dev = (adr >> 16) & 0xffff;
311                 fn  = adr & 0xffff;
312
313                 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
314                 if (!pdev || hnd == handle)
315                         break;
316
317                 pbus = pdev->subordinate;
318                 pci_dev_put(pdev);
319
320                 /*
321                  * This function may be called for a non-PCI device that has a
322                  * PCI parent (eg. a disk under a PCI SATA controller).  In that
323                  * case pdev->subordinate will be NULL for the parent.
324                  */
325                 if (!pbus) {
326                         dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
327                         pdev = NULL;
328                         break;
329                 }
330         }
331 out:
332         list_for_each_entry_safe(node, tmp, &device_list, node)
333                 kfree(node);
334
335         return pdev;
336 }
337 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
338
339 /**
340  * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
341  * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
342  * @mask: Mask of _OSC bits to request control of, place to store control mask.
343  * @req: Mask of _OSC bits the control of is essential to the caller.
344  *
345  * Run _OSC query for @mask and if that is successful, compare the returned
346  * mask of control bits with @req.  If all of the @req bits are set in the
347  * returned mask, run _OSC request for it.
348  *
349  * The variable at the @mask address may be modified regardless of whether or
350  * not the function returns success.  On success it will contain the mask of
351  * _OSC bits the BIOS has granted control of, but its contents are meaningless
352  * on failure.
353  **/
354 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
355 {
356         struct acpi_pci_root *root;
357         acpi_status status = AE_OK;
358         u32 ctrl, capbuf[3];
359
360         if (!mask)
361                 return AE_BAD_PARAMETER;
362
363         ctrl = *mask & OSC_PCI_CONTROL_MASKS;
364         if ((ctrl & req) != req)
365                 return AE_TYPE;
366
367         root = acpi_pci_find_root(handle);
368         if (!root)
369                 return AE_NOT_EXIST;
370
371         mutex_lock(&osc_lock);
372
373         *mask = ctrl | root->osc_control_set;
374         /* No need to evaluate _OSC if the control was already granted. */
375         if ((root->osc_control_set & ctrl) == ctrl)
376                 goto out;
377
378         /* Need to check the available controls bits before requesting them. */
379         while (*mask) {
380                 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
381                 if (ACPI_FAILURE(status))
382                         goto out;
383                 if (ctrl == *mask)
384                         break;
385                 decode_osc_control(root, "platform does not support",
386                                    ctrl & ~(*mask));
387                 ctrl = *mask;
388         }
389
390         if ((ctrl & req) != req) {
391                 decode_osc_control(root, "not requesting control; platform does not support",
392                                    req & ~(ctrl));
393                 status = AE_SUPPORT;
394                 goto out;
395         }
396
397         capbuf[OSC_QUERY_DWORD] = 0;
398         capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
399         capbuf[OSC_CONTROL_DWORD] = ctrl;
400         status = acpi_pci_run_osc(handle, capbuf, mask);
401         if (ACPI_SUCCESS(status))
402                 root->osc_control_set = *mask;
403 out:
404         mutex_unlock(&osc_lock);
405         return status;
406 }
407 EXPORT_SYMBOL(acpi_pci_osc_control_set);
408
409 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
410                                  bool is_pcie)
411 {
412         u32 support, control, requested;
413         acpi_status status;
414         struct acpi_device *device = root->device;
415         acpi_handle handle = device->handle;
416
417         /*
418          * Apple always return failure on _OSC calls when _OSI("Darwin") has
419          * been called successfully. We know the feature set supported by the
420          * platform, so avoid calling _OSC at all
421          */
422         if (x86_apple_machine) {
423                 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
424                 decode_osc_control(root, "OS assumes control of",
425                                    root->osc_control_set);
426                 return;
427         }
428
429         /*
430          * All supported architectures that use ACPI have support for
431          * PCI domains, so we indicate this in _OSC support capabilities.
432          */
433         support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
434         support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
435         if (pci_ext_cfg_avail())
436                 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
437         if (pcie_aspm_support_enabled())
438                 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
439         if (pci_msi_enabled())
440                 support |= OSC_PCI_MSI_SUPPORT;
441         if (IS_ENABLED(CONFIG_PCIE_EDR))
442                 support |= OSC_PCI_EDR_SUPPORT;
443
444         decode_osc_support(root, "OS supports", support);
445         status = acpi_pci_osc_support(root, support);
446         if (ACPI_FAILURE(status)) {
447                 *no_aspm = 1;
448
449                 /* _OSC is optional for PCI host bridges */
450                 if ((status == AE_NOT_FOUND) && !is_pcie)
451                         return;
452
453                 dev_info(&device->dev, "_OSC failed (%s)%s\n",
454                          acpi_format_exception(status),
455                          pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
456                 return;
457         }
458
459         if (pcie_ports_disabled) {
460                 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
461                 return;
462         }
463
464         if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
465                 decode_osc_support(root, "not requesting OS control; OS requires",
466                                    ACPI_PCIE_REQ_SUPPORT);
467                 return;
468         }
469
470         control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
471                 | OSC_PCI_EXPRESS_PME_CONTROL;
472
473         if (IS_ENABLED(CONFIG_PCIEASPM))
474                 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
475
476         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
477                 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
478
479         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
480                 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
481
482         if (pci_aer_available())
483                 control |= OSC_PCI_EXPRESS_AER_CONTROL;
484
485         /*
486          * Per the Downstream Port Containment Related Enhancements ECN to
487          * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
488          * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
489          * and EDR.
490          */
491         if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
492                 control |= OSC_PCI_EXPRESS_DPC_CONTROL;
493
494         requested = control;
495         status = acpi_pci_osc_control_set(handle, &control,
496                                           OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
497         if (ACPI_SUCCESS(status)) {
498                 decode_osc_control(root, "OS now controls", control);
499                 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
500                         /*
501                          * We have ASPM control, but the FADT indicates that
502                          * it's unsupported. Leave existing configuration
503                          * intact and prevent the OS from touching it.
504                          */
505                         dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
506                         *no_aspm = 1;
507                 }
508         } else {
509                 decode_osc_control(root, "OS requested", requested);
510                 decode_osc_control(root, "platform willing to grant", control);
511                 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
512                         acpi_format_exception(status));
513
514                 /*
515                  * We want to disable ASPM here, but aspm_disabled
516                  * needs to remain in its state from boot so that we
517                  * properly handle PCIe 1.1 devices.  So we set this
518                  * flag here, to defer the action until after the ACPI
519                  * root scan.
520                  */
521                 *no_aspm = 1;
522         }
523 }
524
525 static int acpi_pci_root_add(struct acpi_device *device,
526                              const struct acpi_device_id *not_used)
527 {
528         unsigned long long segment, bus;
529         acpi_status status;
530         int result;
531         struct acpi_pci_root *root;
532         acpi_handle handle = device->handle;
533         int no_aspm = 0;
534         bool hotadd = system_state == SYSTEM_RUNNING;
535         bool is_pcie;
536
537         root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
538         if (!root)
539                 return -ENOMEM;
540
541         segment = 0;
542         status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
543                                        &segment);
544         if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
545                 dev_err(&device->dev,  "can't evaluate _SEG\n");
546                 result = -ENODEV;
547                 goto end;
548         }
549
550         /* Check _CRS first, then _BBN.  If no _BBN, default to zero. */
551         root->secondary.flags = IORESOURCE_BUS;
552         status = try_get_root_bridge_busnr(handle, &root->secondary);
553         if (ACPI_FAILURE(status)) {
554                 /*
555                  * We need both the start and end of the downstream bus range
556                  * to interpret _CBA (MMCONFIG base address), so it really is
557                  * supposed to be in _CRS.  If we don't find it there, all we
558                  * can do is assume [_BBN-0xFF] or [0-0xFF].
559                  */
560                 root->secondary.end = 0xFF;
561                 dev_warn(&device->dev,
562                          FW_BUG "no secondary bus range in _CRS\n");
563                 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
564                                                NULL, &bus);
565                 if (ACPI_SUCCESS(status))
566                         root->secondary.start = bus;
567                 else if (status == AE_NOT_FOUND)
568                         root->secondary.start = 0;
569                 else {
570                         dev_err(&device->dev, "can't evaluate _BBN\n");
571                         result = -ENODEV;
572                         goto end;
573                 }
574         }
575
576         root->device = device;
577         root->segment = segment & 0xFFFF;
578         strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
579         strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
580         device->driver_data = root;
581
582         if (hotadd && dmar_device_add(handle)) {
583                 result = -ENXIO;
584                 goto end;
585         }
586
587         pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
588                acpi_device_name(device), acpi_device_bid(device),
589                root->segment, &root->secondary);
590
591         root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
592
593         is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
594         negotiate_os_control(root, &no_aspm, is_pcie);
595
596         /*
597          * TBD: Need PCI interface for enumeration/configuration of roots.
598          */
599
600         /*
601          * Scan the Root Bridge
602          * --------------------
603          * Must do this prior to any attempt to bind the root device, as the
604          * PCI namespace does not get created until this call is made (and
605          * thus the root bridge's pci_dev does not exist).
606          */
607         root->bus = pci_acpi_scan_root(root);
608         if (!root->bus) {
609                 dev_err(&device->dev,
610                         "Bus %04x:%02x not present in PCI namespace\n",
611                         root->segment, (unsigned int)root->secondary.start);
612                 device->driver_data = NULL;
613                 result = -ENODEV;
614                 goto remove_dmar;
615         }
616
617         if (no_aspm)
618                 pcie_no_aspm();
619
620         pci_acpi_add_bus_pm_notifier(device);
621         device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
622
623         if (hotadd) {
624                 pcibios_resource_survey_bus(root->bus);
625                 pci_assign_unassigned_root_bus_resources(root->bus);
626                 /*
627                  * This is only called for the hotadd case. For the boot-time
628                  * case, we need to wait until after PCI initialization in
629                  * order to deal with IOAPICs mapped in on a PCI BAR.
630                  *
631                  * This is currently x86-specific, because acpi_ioapic_add()
632                  * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
633                  * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
634                  * (see drivers/acpi/Kconfig).
635                  */
636                 acpi_ioapic_add(root->device->handle);
637         }
638
639         pci_lock_rescan_remove();
640         pci_bus_add_devices(root->bus);
641         pci_unlock_rescan_remove();
642         return 1;
643
644 remove_dmar:
645         if (hotadd)
646                 dmar_device_remove(handle);
647 end:
648         kfree(root);
649         return result;
650 }
651
652 static void acpi_pci_root_remove(struct acpi_device *device)
653 {
654         struct acpi_pci_root *root = acpi_driver_data(device);
655
656         pci_lock_rescan_remove();
657
658         pci_stop_root_bus(root->bus);
659
660         pci_ioapic_remove(root);
661         device_set_wakeup_capable(root->bus->bridge, false);
662         pci_acpi_remove_bus_pm_notifier(device);
663
664         pci_remove_root_bus(root->bus);
665         WARN_ON(acpi_ioapic_remove(root));
666
667         dmar_device_remove(device->handle);
668
669         pci_unlock_rescan_remove();
670
671         kfree(root);
672 }
673
674 /*
675  * Following code to support acpi_pci_root_create() is copied from
676  * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
677  * and ARM64.
678  */
679 static void acpi_pci_root_validate_resources(struct device *dev,
680                                              struct list_head *resources,
681                                              unsigned long type)
682 {
683         LIST_HEAD(list);
684         struct resource *res1, *res2, *root = NULL;
685         struct resource_entry *tmp, *entry, *entry2;
686
687         BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
688         root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
689
690         list_splice_init(resources, &list);
691         resource_list_for_each_entry_safe(entry, tmp, &list) {
692                 bool free = false;
693                 resource_size_t end;
694
695                 res1 = entry->res;
696                 if (!(res1->flags & type))
697                         goto next;
698
699                 /* Exclude non-addressable range or non-addressable portion */
700                 end = min(res1->end, root->end);
701                 if (end <= res1->start) {
702                         dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
703                                  res1);
704                         free = true;
705                         goto next;
706                 } else if (res1->end != end) {
707                         dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
708                                  res1, (unsigned long long)end + 1,
709                                  (unsigned long long)res1->end);
710                         res1->end = end;
711                 }
712
713                 resource_list_for_each_entry(entry2, resources) {
714                         res2 = entry2->res;
715                         if (!(res2->flags & type))
716                                 continue;
717
718                         /*
719                          * I don't like throwing away windows because then
720                          * our resources no longer match the ACPI _CRS, but
721                          * the kernel resource tree doesn't allow overlaps.
722                          */
723                         if (resource_overlaps(res1, res2)) {
724                                 res2->start = min(res1->start, res2->start);
725                                 res2->end = max(res1->end, res2->end);
726                                 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
727                                          res2, res1);
728                                 free = true;
729                                 goto next;
730                         }
731                 }
732
733 next:
734                 resource_list_del(entry);
735                 if (free)
736                         resource_list_free_entry(entry);
737                 else
738                         resource_list_add_tail(entry, resources);
739         }
740 }
741
742 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
743                         struct resource_entry *entry)
744 {
745 #ifdef PCI_IOBASE
746         struct resource *res = entry->res;
747         resource_size_t cpu_addr = res->start;
748         resource_size_t pci_addr = cpu_addr - entry->offset;
749         resource_size_t length = resource_size(res);
750         unsigned long port;
751
752         if (pci_register_io_range(fwnode, cpu_addr, length))
753                 goto err;
754
755         port = pci_address_to_pio(cpu_addr);
756         if (port == (unsigned long)-1)
757                 goto err;
758
759         res->start = port;
760         res->end = port + length - 1;
761         entry->offset = port - pci_addr;
762
763         if (pci_remap_iospace(res, cpu_addr) < 0)
764                 goto err;
765
766         pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
767         return;
768 err:
769         res->flags |= IORESOURCE_DISABLED;
770 #endif
771 }
772
773 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
774 {
775         int ret;
776         struct list_head *list = &info->resources;
777         struct acpi_device *device = info->bridge;
778         struct resource_entry *entry, *tmp;
779         unsigned long flags;
780
781         flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
782         ret = acpi_dev_get_resources(device, list,
783                                      acpi_dev_filter_resource_type_cb,
784                                      (void *)flags);
785         if (ret < 0)
786                 dev_warn(&device->dev,
787                          "failed to parse _CRS method, error code %d\n", ret);
788         else if (ret == 0)
789                 dev_dbg(&device->dev,
790                         "no IO and memory resources present in _CRS\n");
791         else {
792                 resource_list_for_each_entry_safe(entry, tmp, list) {
793                         if (entry->res->flags & IORESOURCE_IO)
794                                 acpi_pci_root_remap_iospace(&device->fwnode,
795                                                 entry);
796
797                         if (entry->res->flags & IORESOURCE_DISABLED)
798                                 resource_list_destroy_entry(entry);
799                         else
800                                 entry->res->name = info->name;
801                 }
802                 acpi_pci_root_validate_resources(&device->dev, list,
803                                                  IORESOURCE_MEM);
804                 acpi_pci_root_validate_resources(&device->dev, list,
805                                                  IORESOURCE_IO);
806         }
807
808         return ret;
809 }
810
811 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
812 {
813         struct resource_entry *entry, *tmp;
814         struct resource *res, *conflict, *root = NULL;
815
816         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
817                 res = entry->res;
818                 if (res->flags & IORESOURCE_MEM)
819                         root = &iomem_resource;
820                 else if (res->flags & IORESOURCE_IO)
821                         root = &ioport_resource;
822                 else
823                         continue;
824
825                 /*
826                  * Some legacy x86 host bridge drivers use iomem_resource and
827                  * ioport_resource as default resource pool, skip it.
828                  */
829                 if (res == root)
830                         continue;
831
832                 conflict = insert_resource_conflict(root, res);
833                 if (conflict) {
834                         dev_info(&info->bridge->dev,
835                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
836                                  res, conflict->name, conflict);
837                         resource_list_destroy_entry(entry);
838                 }
839         }
840 }
841
842 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
843 {
844         struct resource *res;
845         struct resource_entry *entry, *tmp;
846
847         if (!info)
848                 return;
849
850         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
851                 res = entry->res;
852                 if (res->parent &&
853                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
854                         release_resource(res);
855                 resource_list_destroy_entry(entry);
856         }
857
858         info->ops->release_info(info);
859 }
860
861 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
862 {
863         struct resource *res;
864         struct resource_entry *entry;
865
866         resource_list_for_each_entry(entry, &bridge->windows) {
867                 res = entry->res;
868                 if (res->flags & IORESOURCE_IO)
869                         pci_unmap_iospace(res);
870                 if (res->parent &&
871                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
872                         release_resource(res);
873         }
874         __acpi_pci_root_release_info(bridge->release_data);
875 }
876
877 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
878                                      struct acpi_pci_root_ops *ops,
879                                      struct acpi_pci_root_info *info,
880                                      void *sysdata)
881 {
882         int ret, busnum = root->secondary.start;
883         struct acpi_device *device = root->device;
884         int node = acpi_get_node(device->handle);
885         struct pci_bus *bus;
886         struct pci_host_bridge *host_bridge;
887         union acpi_object *obj;
888
889         info->root = root;
890         info->bridge = device;
891         info->ops = ops;
892         INIT_LIST_HEAD(&info->resources);
893         snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
894                  root->segment, busnum);
895
896         if (ops->init_info && ops->init_info(info))
897                 goto out_release_info;
898         if (ops->prepare_resources)
899                 ret = ops->prepare_resources(info);
900         else
901                 ret = acpi_pci_probe_root_resources(info);
902         if (ret < 0)
903                 goto out_release_info;
904
905         pci_acpi_root_add_resources(info);
906         pci_add_resource(&info->resources, &root->secondary);
907         bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
908                                   sysdata, &info->resources);
909         if (!bus)
910                 goto out_release_info;
911
912         host_bridge = to_pci_host_bridge(bus->bridge);
913         if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
914                 host_bridge->native_pcie_hotplug = 0;
915         if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
916                 host_bridge->native_shpc_hotplug = 0;
917         if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
918                 host_bridge->native_aer = 0;
919         if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
920                 host_bridge->native_pme = 0;
921         if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
922                 host_bridge->native_ltr = 0;
923         if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
924                 host_bridge->native_dpc = 0;
925
926         /*
927          * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
928          * exists and returns 0, we must preserve any PCI resource
929          * assignments made by firmware for this host bridge.
930          */
931         obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
932                                 DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
933         if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
934                 host_bridge->preserve_config = 1;
935         ACPI_FREE(obj);
936
937         pci_scan_child_bus(bus);
938         pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
939                                     info);
940         if (node != NUMA_NO_NODE)
941                 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
942         return bus;
943
944 out_release_info:
945         __acpi_pci_root_release_info(info);
946         return NULL;
947 }
948
949 void __init acpi_pci_root_init(void)
950 {
951         if (acpi_pci_disabled)
952                 return;
953
954         pci_acpi_crs_quirks();
955         acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
956 }