drivers/acpi/acpi_lpss.c

   1 /*
   2  * ACPI support for Intel Lynxpoint LPSS.
   3  *
   4  * Copyright (C) 2013, Intel Corporation
   5  * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
   6  *          Rafael J. Wysocki <rafael.j.wysocki@intel.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/acpi.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/clk-provider.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/mutex.h>
  19 #include <linux/pci.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/platform_data/clk-lpss.h>
  22 #include <linux/platform_data/x86/pmc_atom.h>
  23 #include <linux/pm_domain.h>
  24 #include <linux/pm_runtime.h>
  25 #include <linux/pwm.h>
  26 #include <linux/suspend.h>
  27 #include <linux/delay.h>
  28
  29 #include "internal.h"
  30
  31 ACPI_MODULE_NAME("acpi_lpss");
  32
  33 #ifdef CONFIG_X86_INTEL_LPSS
  34
  35 #include <asm/cpu_device_id.h>
  36 #include <asm/intel-family.h>
  37 #include <asm/iosf_mbi.h>
  38
  39 #define LPSS_ADDR(desc) ((unsigned long)&desc)
  40
  41 #define LPSS_CLK_SIZE   0x04
  42 #define LPSS_LTR_SIZE   0x18
  43
  44 /* Offsets relative to LPSS_PRIVATE_OFFSET */
  45 #define LPSS_CLK_DIVIDER_DEF_MASK       (BIT(1) | BIT(16))
  46 #define LPSS_RESETS                     0x04
  47 #define LPSS_RESETS_RESET_FUNC          BIT(0)
  48 #define LPSS_RESETS_RESET_APB           BIT(1)
  49 #define LPSS_GENERAL                    0x08
  50 #define LPSS_GENERAL_LTR_MODE_SW        BIT(2)
  51 #define LPSS_GENERAL_UART_RTS_OVRD      BIT(3)
  52 #define LPSS_SW_LTR                     0x10
  53 #define LPSS_AUTO_LTR                   0x14
  54 #define LPSS_LTR_SNOOP_REQ              BIT(15)
  55 #define LPSS_LTR_SNOOP_MASK             0x0000FFFF
  56 #define LPSS_LTR_SNOOP_LAT_1US          0x800
  57 #define LPSS_LTR_SNOOP_LAT_32US         0xC00
  58 #define LPSS_LTR_SNOOP_LAT_SHIFT        5
  59 #define LPSS_LTR_SNOOP_LAT_CUTOFF       3000
  60 #define LPSS_LTR_MAX_VAL                0x3FF
  61 #define LPSS_TX_INT                     0x20
  62 #define LPSS_TX_INT_MASK                BIT(1)
  63
  64 #define LPSS_PRV_REG_COUNT              9
  65
  66 /* LPSS Flags */
  67 #define LPSS_CLK                        BIT(0)
  68 #define LPSS_CLK_GATE                   BIT(1)
  69 #define LPSS_CLK_DIVIDER                BIT(2)
  70 #define LPSS_LTR                        BIT(3)
  71 #define LPSS_SAVE_CTX                   BIT(4)
  72 #define LPSS_NO_D3_DELAY                BIT(5)
  73
  74 /* Crystal Cove PMIC shares same ACPI ID between different platforms */
  75 #define BYT_CRC_HRV                     2
  76 #define CHT_CRC_HRV                     3
  77
  78 struct lpss_private_data;
  79
  80 struct lpss_device_desc {
  81         unsigned int flags;
  82         const char *clk_con_id;
  83         unsigned int prv_offset;
  84         size_t prv_size_override;
  85         struct property_entry *properties;
  86         void (*setup)(struct lpss_private_data *pdata);
  87         bool resume_from_noirq;
  88 };
  89
  90 static const struct lpss_device_desc lpss_dma_desc = {
  91         .flags = LPSS_CLK,
  92 };
  93
  94 struct lpss_private_data {
  95         struct acpi_device *adev;
  96         void __iomem *mmio_base;
  97         resource_size_t mmio_size;
  98         unsigned int fixed_clk_rate;
  99         struct clk *clk;
 100         const struct lpss_device_desc *dev_desc;
 101         u32 prv_reg_ctx[LPSS_PRV_REG_COUNT];
 102 };
 103
 104 /* Devices which need to be in D3 before lpss_iosf_enter_d3_state() proceeds */
 105 static u32 pmc_atom_d3_mask = 0xfe000ffe;
 106
 107 /* LPSS run time quirks */
 108 static unsigned int lpss_quirks;
 109
 110 /*
 111  * LPSS_QUIRK_ALWAYS_POWER_ON: override power state for LPSS DMA device.
 112  *
 113  * The LPSS DMA controller has neither _PS0 nor _PS3 method. Moreover
 114  * it can be powered off automatically whenever the last LPSS device goes down.
 115  * In case of no power any access to the DMA controller will hang the system.
 116  * The behaviour is reproduced on some HP laptops based on Intel BayTrail as
 117  * well as on ASuS T100TA transformer.
 118  *
 119  * This quirk overrides power state of entire LPSS island to keep DMA powered
 120  * on whenever we have at least one other device in use.
 121  */
 122 #define LPSS_QUIRK_ALWAYS_POWER_ON      BIT(0)
 123
 124 /* UART Component Parameter Register */
 125 #define LPSS_UART_CPR                   0xF4
 126 #define LPSS_UART_CPR_AFCE              BIT(4)
 127
 128 static void lpss_uart_setup(struct lpss_private_data *pdata)
 129 {
 130         unsigned int offset;
 131         u32 val;
 132
 133         offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
 134         val = readl(pdata->mmio_base + offset);
 135         writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset);
 136
 137         val = readl(pdata->mmio_base + LPSS_UART_CPR);
 138         if (!(val & LPSS_UART_CPR_AFCE)) {
 139                 offset = pdata->dev_desc->prv_offset + LPSS_GENERAL;
 140                 val = readl(pdata->mmio_base + offset);
 141                 val |= LPSS_GENERAL_UART_RTS_OVRD;
 142                 writel(val, pdata->mmio_base + offset);
 143         }
 144 }
 145
 146 static void lpss_deassert_reset(struct lpss_private_data *pdata)
 147 {
 148         unsigned int offset;
 149         u32 val;
 150
 151         offset = pdata->dev_desc->prv_offset + LPSS_RESETS;
 152         val = readl(pdata->mmio_base + offset);
 153         val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
 154         writel(val, pdata->mmio_base + offset);
 155 }
 156
 157 /*
 158  * BYT PWM used for backlight control by the i915 driver on systems without
 159  * the Crystal Cove PMIC.
 160  */
 161 static struct pwm_lookup byt_pwm_lookup[] = {
 162         PWM_LOOKUP_WITH_MODULE("80860F09:00", 0, "0000:00:02.0",
 163                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 164                                "pwm-lpss-platform"),
 165 };
 166
 167 static void byt_pwm_setup(struct lpss_private_data *pdata)
 168 {
 169         struct acpi_device *adev = pdata->adev;
 170
 171         /* Only call pwm_add_table for the first PWM controller */
 172         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 173                 return;
 174
 175         if (!acpi_dev_present("INT33FD", NULL, BYT_CRC_HRV))
 176                 pwm_add_table(byt_pwm_lookup, ARRAY_SIZE(byt_pwm_lookup));
 177 }
 178
 179 #define LPSS_I2C_ENABLE                 0x6c
 180
 181 static void byt_i2c_setup(struct lpss_private_data *pdata)
 182 {
 183         const char *uid_str = acpi_device_uid(pdata->adev);
 184         acpi_handle handle = pdata->adev->handle;
 185         unsigned long long shared_host = 0;
 186         acpi_status status;
 187         long uid = 0;
 188
 189         /* Expected to always be true, but better safe then sorry */
 190         if (uid_str)
 191                 uid = simple_strtol(uid_str, NULL, 10);
 192
 193         /* Detect I2C bus shared with PUNIT and ignore its d3 status */
 194         status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
 195         if (ACPI_SUCCESS(status) && shared_host && uid)
 196                 pmc_atom_d3_mask &= ~(BIT_LPSS2_F1_I2C1 << (uid - 1));
 197
 198         lpss_deassert_reset(pdata);
 199
 200         if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
 201                 pdata->fixed_clk_rate = 133000000;
 202
 203         writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
 204 }
 205
 206 /* BSW PWM used for backlight control by the i915 driver */
 207 static struct pwm_lookup bsw_pwm_lookup[] = {
 208         PWM_LOOKUP_WITH_MODULE("80862288:00", 0, "0000:00:02.0",
 209                                "pwm_backlight", 0, PWM_POLARITY_NORMAL,
 210                                "pwm-lpss-platform"),
 211 };
 212
 213 static void bsw_pwm_setup(struct lpss_private_data *pdata)
 214 {
 215         struct acpi_device *adev = pdata->adev;
 216
 217         /* Only call pwm_add_table for the first PWM controller */
 218         if (!adev->pnp.unique_id || strcmp(adev->pnp.unique_id, "1"))
 219                 return;
 220
 221         pwm_add_table(bsw_pwm_lookup, ARRAY_SIZE(bsw_pwm_lookup));
 222 }
 223
 224 static const struct lpss_device_desc lpt_dev_desc = {
 225         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 226         .prv_offset = 0x800,
 227 };
 228
 229 static const struct lpss_device_desc lpt_i2c_dev_desc = {
 230         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
 231         .prv_offset = 0x800,
 232 };
 233
 234 static struct property_entry uart_properties[] = {
 235         PROPERTY_ENTRY_U32("reg-io-width", 4),
 236         PROPERTY_ENTRY_U32("reg-shift", 2),
 237         PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"),
 238         { },
 239 };
 240
 241 static const struct lpss_device_desc lpt_uart_dev_desc = {
 242         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
 243         .clk_con_id = "baudclk",
 244         .prv_offset = 0x800,
 245         .setup = lpss_uart_setup,
 246         .properties = uart_properties,
 247 };
 248
 249 static const struct lpss_device_desc lpt_sdio_dev_desc = {
 250         .flags = LPSS_LTR,
 251         .prv_offset = 0x1000,
 252         .prv_size_override = 0x1018,
 253 };
 254
 255 static const struct lpss_device_desc byt_pwm_dev_desc = {
 256         .flags = LPSS_SAVE_CTX,
 257         .prv_offset = 0x800,
 258         .setup = byt_pwm_setup,
 259 };
 260
 261 static const struct lpss_device_desc bsw_pwm_dev_desc = {
 262         .flags = LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 263         .prv_offset = 0x800,
 264         .setup = bsw_pwm_setup,
 265 };
 266
 267 static const struct lpss_device_desc byt_uart_dev_desc = {
 268         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 269         .clk_con_id = "baudclk",
 270         .prv_offset = 0x800,
 271         .setup = lpss_uart_setup,
 272         .properties = uart_properties,
 273 };
 274
 275 static const struct lpss_device_desc bsw_uart_dev_desc = {
 276         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 277                         | LPSS_NO_D3_DELAY,
 278         .clk_con_id = "baudclk",
 279         .prv_offset = 0x800,
 280         .setup = lpss_uart_setup,
 281         .properties = uart_properties,
 282 };
 283
 284 static const struct lpss_device_desc byt_spi_dev_desc = {
 285         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
 286         .prv_offset = 0x400,
 287 };
 288
 289 static const struct lpss_device_desc byt_sdio_dev_desc = {
 290         .flags = LPSS_CLK,
 291 };
 292
 293 static const struct lpss_device_desc byt_i2c_dev_desc = {
 294         .flags = LPSS_CLK | LPSS_SAVE_CTX,
 295         .prv_offset = 0x800,
 296         .setup = byt_i2c_setup,
 297         .resume_from_noirq = true,
 298 };
 299
 300 static const struct lpss_device_desc bsw_i2c_dev_desc = {
 301         .flags = LPSS_CLK | LPSS_SAVE_CTX | LPSS_NO_D3_DELAY,
 302         .prv_offset = 0x800,
 303         .setup = byt_i2c_setup,
 304         .resume_from_noirq = true,
 305 };
 306
 307 static const struct lpss_device_desc bsw_spi_dev_desc = {
 308         .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX
 309                         | LPSS_NO_D3_DELAY,
 310         .prv_offset = 0x400,
 311         .setup = lpss_deassert_reset,
 312 };
 313
 314 #define ICPU(model)     { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
 315
 316 static const struct x86_cpu_id lpss_cpu_ids[] = {
 317         ICPU(INTEL_FAM6_ATOM_SILVERMONT),       /* Valleyview, Bay Trail */
 318         ICPU(INTEL_FAM6_ATOM_AIRMONT),  /* Braswell, Cherry Trail */
 319         {}
 320 };
 321
 322 #else
 323
 324 #define LPSS_ADDR(desc) (0UL)
 325
 326 #endif /* CONFIG_X86_INTEL_LPSS */
 327
 328 static const struct acpi_device_id acpi_lpss_device_ids[] = {
 329         /* Generic LPSS devices */
 330         { "INTL9C60", LPSS_ADDR(lpss_dma_desc) },
 331
 332         /* Lynxpoint LPSS devices */
 333         { "INT33C0", LPSS_ADDR(lpt_dev_desc) },
 334         { "INT33C1", LPSS_ADDR(lpt_dev_desc) },
 335         { "INT33C2", LPSS_ADDR(lpt_i2c_dev_desc) },
 336         { "INT33C3", LPSS_ADDR(lpt_i2c_dev_desc) },
 337         { "INT33C4", LPSS_ADDR(lpt_uart_dev_desc) },
 338         { "INT33C5", LPSS_ADDR(lpt_uart_dev_desc) },
 339         { "INT33C6", LPSS_ADDR(lpt_sdio_dev_desc) },
 340         { "INT33C7", },
 341
 342         /* BayTrail LPSS devices */
 343         { "80860F09", LPSS_ADDR(byt_pwm_dev_desc) },
 344         { "80860F0A", LPSS_ADDR(byt_uart_dev_desc) },
 345         { "80860F0E", LPSS_ADDR(byt_spi_dev_desc) },
 346         { "80860F14", LPSS_ADDR(byt_sdio_dev_desc) },
 347         { "80860F41", LPSS_ADDR(byt_i2c_dev_desc) },
 348         { "INT33B2", },
 349         { "INT33FC", },
 350
 351         /* Braswell LPSS devices */
 352         { "80862286", LPSS_ADDR(lpss_dma_desc) },
 353         { "80862288", LPSS_ADDR(bsw_pwm_dev_desc) },
 354         { "8086228A", LPSS_ADDR(bsw_uart_dev_desc) },
 355         { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
 356         { "808622C0", LPSS_ADDR(lpss_dma_desc) },
 357         { "808622C1", LPSS_ADDR(bsw_i2c_dev_desc) },
 358
 359         /* Broadwell LPSS devices */
 360         { "INT3430", LPSS_ADDR(lpt_dev_desc) },
 361         { "INT3431", LPSS_ADDR(lpt_dev_desc) },
 362         { "INT3432", LPSS_ADDR(lpt_i2c_dev_desc) },
 363         { "INT3433", LPSS_ADDR(lpt_i2c_dev_desc) },
 364         { "INT3434", LPSS_ADDR(lpt_uart_dev_desc) },
 365         { "INT3435", LPSS_ADDR(lpt_uart_dev_desc) },
 366         { "INT3436", LPSS_ADDR(lpt_sdio_dev_desc) },
 367         { "INT3437", },
 368
 369         /* Wildcat Point LPSS devices */
 370         { "INT3438", LPSS_ADDR(lpt_dev_desc) },
 371
 372         { }
 373 };
 374
 375 #ifdef CONFIG_X86_INTEL_LPSS
 376
 377 static int is_memory(struct acpi_resource *res, void *not_used)
 378 {
 379         struct resource r;
 380         return !acpi_dev_resource_memory(res, &r);
 381 }
 382
 383 /* LPSS main clock device. */
 384 static struct platform_device *lpss_clk_dev;
 385
 386 static inline void lpt_register_clock_device(void)
 387 {
 388         lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
 389 }
 390
 391 static int register_device_clock(struct acpi_device *adev,
 392                                  struct lpss_private_data *pdata)
 393 {
 394         const struct lpss_device_desc *dev_desc = pdata->dev_desc;
 395         const char *devname = dev_name(&adev->dev);
 396         struct clk *clk;
 397         struct lpss_clk_data *clk_data;
 398         const char *parent, *clk_name;
 399         void __iomem *prv_base;
 400
 401         if (!lpss_clk_dev)
 402                 lpt_register_clock_device();
 403
 404         clk_data = platform_get_drvdata(lpss_clk_dev);
 405         if (!clk_data)
 406                 return -ENODEV;
 407         clk = clk_data->clk;
 408
 409         if (!pdata->mmio_base
 410             || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
 411                 return -ENODATA;
 412
 413         parent = clk_data->name;
 414         prv_base = pdata->mmio_base + dev_desc->prv_offset;
 415
 416         if (pdata->fixed_clk_rate) {
 417                 clk = clk_register_fixed_rate(NULL, devname, parent, 0,
 418                                               pdata->fixed_clk_rate);
 419                 goto out;
 420         }
 421
 422         if (dev_desc->flags & LPSS_CLK_GATE) {
 423                 clk = clk_register_gate(NULL, devname, parent, 0,
 424                                         prv_base, 0, 0, NULL);
 425                 parent = devname;
 426         }
 427
 428         if (dev_desc->flags & LPSS_CLK_DIVIDER) {
 429                 /* Prevent division by zero */
 430                 if (!readl(prv_base))
 431                         writel(LPSS_CLK_DIVIDER_DEF_MASK, prv_base);
 432
 433                 clk_name = kasprintf(GFP_KERNEL, "%s-div", devname);
 434                 if (!clk_name)
 435                         return -ENOMEM;
 436                 clk = clk_register_fractional_divider(NULL, clk_name, parent,
 437                                                       0, prv_base,
 438                                                       1, 15, 16, 15, 0, NULL);
 439                 parent = clk_name;
 440
 441                 clk_name = kasprintf(GFP_KERNEL, "%s-update", devname);
 442                 if (!clk_name) {
 443                         kfree(parent);
 444                         return -ENOMEM;
 445                 }
 446                 clk = clk_register_gate(NULL, clk_name, parent,
 447                                         CLK_SET_RATE_PARENT | CLK_SET_RATE_GATE,
 448                                         prv_base, 31, 0, NULL);
 449                 kfree(parent);
 450                 kfree(clk_name);
 451         }
 452 out:
 453         if (IS_ERR(clk))
 454                 return PTR_ERR(clk);
 455
 456         pdata->clk = clk;
 457         clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
 458         return 0;
 459 }
 460
 461 struct lpss_device_links {
 462         const char *supplier_hid;
 463         const char *supplier_uid;
 464         const char *consumer_hid;
 465         const char *consumer_uid;
 466         u32 flags;
 467 };
 468
 469 /*
 470  * The _DEP method is used to identify dependencies but instead of creating
 471  * device links for every handle in _DEP, only links in the following list are
 472  * created. That is necessary because, in the general case, _DEP can refer to
 473  * devices that might not have drivers, or that are on different buses, or where
 474  * the supplier is not enumerated until after the consumer is probed.
 475  */
 476 static const struct lpss_device_links lpss_device_links[] = {
 477         {"808622C1", "7", "80860F14", "3", DL_FLAG_PM_RUNTIME},
 478 };
 479
 480 static bool hid_uid_match(const char *hid1, const char *uid1,
 481                           const char *hid2, const char *uid2)
 482 {
 483         return !strcmp(hid1, hid2) && uid1 && uid2 && !strcmp(uid1, uid2);
 484 }
 485
 486 static bool acpi_lpss_is_supplier(struct acpi_device *adev,
 487                                   const struct lpss_device_links *link)
 488 {
 489         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 490                              link->supplier_hid, link->supplier_uid);
 491 }
 492
 493 static bool acpi_lpss_is_consumer(struct acpi_device *adev,
 494                                   const struct lpss_device_links *link)
 495 {
 496         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 497                              link->consumer_hid, link->consumer_uid);
 498 }
 499
 500 struct hid_uid {
 501         const char *hid;
 502         const char *uid;
 503 };
 504
 505 static int match_hid_uid(struct device *dev, void *data)
 506 {
 507         struct acpi_device *adev = ACPI_COMPANION(dev);
 508         struct hid_uid *id = data;
 509
 510         if (!adev)
 511                 return 0;
 512
 513         return hid_uid_match(acpi_device_hid(adev), acpi_device_uid(adev),
 514                              id->hid, id->uid);
 515 }
 516
 517 static struct device *acpi_lpss_find_device(const char *hid, const char *uid)
 518 {
 519         struct device *dev;
 520
 521         struct hid_uid data = {
 522                 .hid = hid,
 523                 .uid = uid,
 524         };
 525
 526         dev = bus_find_device(&platform_bus_type, NULL, &data, match_hid_uid);
 527         if (dev)
 528                 return dev;
 529
 530         return bus_find_device(&pci_bus_type, NULL, &data, match_hid_uid);
 531 }
 532
 533 static bool acpi_lpss_dep(struct acpi_device *adev, acpi_handle handle)
 534 {
 535         struct acpi_handle_list dep_devices;
 536         acpi_status status;
 537         int i;
 538
 539         if (!acpi_has_method(adev->handle, "_DEP"))
 540                 return false;
 541
 542         status = acpi_evaluate_reference(adev->handle, "_DEP", NULL,
 543                                          &dep_devices);
 544         if (ACPI_FAILURE(status)) {
 545                 dev_dbg(&adev->dev, "Failed to evaluate _DEP.\n");
 546                 return false;
 547         }
 548
 549         for (i = 0; i < dep_devices.count; i++) {
 550                 if (dep_devices.handles[i] == handle)
 551                         return true;
 552         }
 553
 554         return false;
 555 }
 556
 557 static void acpi_lpss_link_consumer(struct device *dev1,
 558                                     const struct lpss_device_links *link)
 559 {
 560         struct device *dev2;
 561
 562         dev2 = acpi_lpss_find_device(link->consumer_hid, link->consumer_uid);
 563         if (!dev2)
 564                 return;
 565
 566         if (acpi_lpss_dep(ACPI_COMPANION(dev2), ACPI_HANDLE(dev1)))
 567                 device_link_add(dev2, dev1, link->flags);
 568
 569         put_device(dev2);
 570 }
 571
 572 static void acpi_lpss_link_supplier(struct device *dev1,
 573                                     const struct lpss_device_links *link)
 574 {
 575         struct device *dev2;
 576
 577         dev2 = acpi_lpss_find_device(link->supplier_hid, link->supplier_uid);
 578         if (!dev2)
 579                 return;
 580
 581         if (acpi_lpss_dep(ACPI_COMPANION(dev1), ACPI_HANDLE(dev2)))
 582                 device_link_add(dev1, dev2, link->flags);
 583
 584         put_device(dev2);
 585 }
 586
 587 static void acpi_lpss_create_device_links(struct acpi_device *adev,
 588                                           struct platform_device *pdev)
 589 {
 590         int i;
 591
 592         for (i = 0; i < ARRAY_SIZE(lpss_device_links); i++) {
 593                 const struct lpss_device_links *link = &lpss_device_links[i];
 594
 595                 if (acpi_lpss_is_supplier(adev, link))
 596                         acpi_lpss_link_consumer(&pdev->dev, link);
 597
 598                 if (acpi_lpss_is_consumer(adev, link))
 599                         acpi_lpss_link_supplier(&pdev->dev, link);
 600         }
 601 }
 602
 603 static int acpi_lpss_create_device(struct acpi_device *adev,
 604                                    const struct acpi_device_id *id)
 605 {
 606         const struct lpss_device_desc *dev_desc;
 607         struct lpss_private_data *pdata;
 608         struct resource_entry *rentry;
 609         struct list_head resource_list;
 610         struct platform_device *pdev;
 611         int ret;
 612
 613         dev_desc = (const struct lpss_device_desc *)id->driver_data;
 614         if (!dev_desc) {
 615                 pdev = acpi_create_platform_device(adev, NULL);
 616                 return IS_ERR_OR_NULL(pdev) ? PTR_ERR(pdev) : 1;
 617         }
 618         pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
 619         if (!pdata)
 620                 return -ENOMEM;
 621
 622         INIT_LIST_HEAD(&resource_list);
 623         ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
 624         if (ret < 0)
 625                 goto err_out;
 626
 627         list_for_each_entry(rentry, &resource_list, node)
 628                 if (resource_type(rentry->res) == IORESOURCE_MEM) {
 629                         if (dev_desc->prv_size_override)
 630                                 pdata->mmio_size = dev_desc->prv_size_override;
 631                         else
 632                                 pdata->mmio_size = resource_size(rentry->res);
 633                         pdata->mmio_base = ioremap(rentry->res->start,
 634                                                    pdata->mmio_size);
 635                         break;
 636                 }
 637
 638         acpi_dev_free_resource_list(&resource_list);
 639
 640         if (!pdata->mmio_base) {
 641                 /* Avoid acpi_bus_attach() instantiating a pdev for this dev. */
 642                 adev->pnp.type.platform_id = 0;
 643                 /* Skip the device, but continue the namespace scan. */
 644                 ret = 0;
 645                 goto err_out;
 646         }
 647
 648         pdata->adev = adev;
 649         pdata->dev_desc = dev_desc;
 650
 651         if (dev_desc->setup)
 652                 dev_desc->setup(pdata);
 653
 654         if (dev_desc->flags & LPSS_CLK) {
 655                 ret = register_device_clock(adev, pdata);
 656                 if (ret) {
 657                         /* Skip the device, but continue the namespace scan. */
 658                         ret = 0;
 659                         goto err_out;
 660                 }
 661         }
 662
 663         /*
 664          * This works around a known issue in ACPI tables where LPSS devices
 665          * have _PS0 and _PS3 without _PSC (and no power resources), so
 666          * acpi_bus_init_power() will assume that the BIOS has put them into D0.
 667          */
 668         acpi_device_fix_up_power(adev);
 669
 670         adev->driver_data = pdata;
 671         pdev = acpi_create_platform_device(adev, dev_desc->properties);
 672         if (!IS_ERR_OR_NULL(pdev)) {
 673                 acpi_lpss_create_device_links(adev, pdev);
 674                 return 1;
 675         }
 676
 677         ret = PTR_ERR(pdev);
 678         adev->driver_data = NULL;
 679
 680  err_out:
 681         kfree(pdata);
 682         return ret;
 683 }
 684
 685 static u32 __lpss_reg_read(struct lpss_private_data *pdata, unsigned int reg)
 686 {
 687         return readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 688 }
 689
 690 static void __lpss_reg_write(u32 val, struct lpss_private_data *pdata,
 691                              unsigned int reg)
 692 {
 693         writel(val, pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
 694 }
 695
 696 static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
 697 {
 698         struct acpi_device *adev;
 699         struct lpss_private_data *pdata;
 700         unsigned long flags;
 701         int ret;
 702
 703         ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
 704         if (WARN_ON(ret))
 705                 return ret;
 706
 707         spin_lock_irqsave(&dev->power.lock, flags);
 708         if (pm_runtime_suspended(dev)) {
 709                 ret = -EAGAIN;
 710                 goto out;
 711         }
 712         pdata = acpi_driver_data(adev);
 713         if (WARN_ON(!pdata || !pdata->mmio_base)) {
 714                 ret = -ENODEV;
 715                 goto out;
 716         }
 717         *val = __lpss_reg_read(pdata, reg);
 718
 719  out:
 720         spin_unlock_irqrestore(&dev->power.lock, flags);
 721         return ret;
 722 }
 723
 724 static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
 725                              char *buf)
 726 {
 727         u32 ltr_value = 0;
 728         unsigned int reg;
 729         int ret;
 730
 731         reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
 732         ret = lpss_reg_read(dev, reg, &ltr_value);
 733         if (ret)
 734                 return ret;
 735
 736         return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
 737 }
 738
 739 static ssize_t lpss_ltr_mode_show(struct device *dev,
 740                                   struct device_attribute *attr, char *buf)
 741 {
 742         u32 ltr_mode = 0;
 743         char *outstr;
 744         int ret;
 745
 746         ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
 747         if (ret)
 748                 return ret;
 749
 750         outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
 751         return sprintf(buf, "%s\n", outstr);
 752 }
 753
 754 static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
 755 static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
 756 static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
 757
 758 static struct attribute *lpss_attrs[] = {
 759         &dev_attr_auto_ltr.attr,
 760         &dev_attr_sw_ltr.attr,
 761         &dev_attr_ltr_mode.attr,
 762         NULL,
 763 };
 764
 765 static const struct attribute_group lpss_attr_group = {
 766         .attrs = lpss_attrs,
 767         .name = "lpss_ltr",
 768 };
 769
 770 static void acpi_lpss_set_ltr(struct device *dev, s32 val)
 771 {
 772         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 773         u32 ltr_mode, ltr_val;
 774
 775         ltr_mode = __lpss_reg_read(pdata, LPSS_GENERAL);
 776         if (val < 0) {
 777                 if (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) {
 778                         ltr_mode &= ~LPSS_GENERAL_LTR_MODE_SW;
 779                         __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 780                 }
 781                 return;
 782         }
 783         ltr_val = __lpss_reg_read(pdata, LPSS_SW_LTR) & ~LPSS_LTR_SNOOP_MASK;
 784         if (val >= LPSS_LTR_SNOOP_LAT_CUTOFF) {
 785                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US;
 786                 val = LPSS_LTR_MAX_VAL;
 787         } else if (val > LPSS_LTR_MAX_VAL) {
 788                 ltr_val |= LPSS_LTR_SNOOP_LAT_32US | LPSS_LTR_SNOOP_REQ;
 789                 val >>= LPSS_LTR_SNOOP_LAT_SHIFT;
 790         } else {
 791                 ltr_val |= LPSS_LTR_SNOOP_LAT_1US | LPSS_LTR_SNOOP_REQ;
 792         }
 793         ltr_val |= val;
 794         __lpss_reg_write(ltr_val, pdata, LPSS_SW_LTR);
 795         if (!(ltr_mode & LPSS_GENERAL_LTR_MODE_SW)) {
 796                 ltr_mode |= LPSS_GENERAL_LTR_MODE_SW;
 797                 __lpss_reg_write(ltr_mode, pdata, LPSS_GENERAL);
 798         }
 799 }
 800
 801 #ifdef CONFIG_PM
 802 /**
 803  * acpi_lpss_save_ctx() - Save the private registers of LPSS device
 804  * @dev: LPSS device
 805  * @pdata: pointer to the private data of the LPSS device
 806  *
 807  * Most LPSS devices have private registers which may loose their context when
 808  * the device is powered down. acpi_lpss_save_ctx() saves those registers into
 809  * prv_reg_ctx array.
 810  */
 811 static void acpi_lpss_save_ctx(struct device *dev,
 812                                struct lpss_private_data *pdata)
 813 {
 814         unsigned int i;
 815
 816         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 817                 unsigned long offset = i * sizeof(u32);
 818
 819                 pdata->prv_reg_ctx[i] = __lpss_reg_read(pdata, offset);
 820                 dev_dbg(dev, "saving 0x%08x from LPSS reg at offset 0x%02lx\n",
 821                         pdata->prv_reg_ctx[i], offset);
 822         }
 823 }
 824
 825 /**
 826  * acpi_lpss_restore_ctx() - Restore the private registers of LPSS device
 827  * @dev: LPSS device
 828  * @pdata: pointer to the private data of the LPSS device
 829  *
 830  * Restores the registers that were previously stored with acpi_lpss_save_ctx().
 831  */
 832 static void acpi_lpss_restore_ctx(struct device *dev,
 833                                   struct lpss_private_data *pdata)
 834 {
 835         unsigned int i;
 836
 837         for (i = 0; i < LPSS_PRV_REG_COUNT; i++) {
 838                 unsigned long offset = i * sizeof(u32);
 839
 840                 __lpss_reg_write(pdata->prv_reg_ctx[i], pdata, offset);
 841                 dev_dbg(dev, "restoring 0x%08x to LPSS reg at offset 0x%02lx\n",
 842                         pdata->prv_reg_ctx[i], offset);
 843         }
 844 }
 845
 846 static void acpi_lpss_d3_to_d0_delay(struct lpss_private_data *pdata)
 847 {
 848         /*
 849          * The following delay is needed or the subsequent write operations may
 850          * fail. The LPSS devices are actually PCI devices and the PCI spec
 851          * expects 10ms delay before the device can be accessed after D3 to D0
 852          * transition. However some platforms like BSW does not need this delay.
 853          */
 854         unsigned int delay = 10;        /* default 10ms delay */
 855
 856         if (pdata->dev_desc->flags & LPSS_NO_D3_DELAY)
 857                 delay = 0;
 858
 859         msleep(delay);
 860 }
 861
 862 static int acpi_lpss_activate(struct device *dev)
 863 {
 864         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 865         int ret;
 866
 867         ret = acpi_dev_resume(dev);
 868         if (ret)
 869                 return ret;
 870
 871         acpi_lpss_d3_to_d0_delay(pdata);
 872
 873         /*
 874          * This is called only on ->probe() stage where a device is either in
 875          * known state defined by BIOS or most likely powered off. Due to this
 876          * we have to deassert reset line to be sure that ->probe() will
 877          * recognize the device.
 878          */
 879         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 880                 lpss_deassert_reset(pdata);
 881
 882         return 0;
 883 }
 884
 885 static void acpi_lpss_dismiss(struct device *dev)
 886 {
 887         acpi_dev_suspend(dev, false);
 888 }
 889
 890 /* IOSF SB for LPSS island */
 891 #define LPSS_IOSF_UNIT_LPIOEP           0xA0
 892 #define LPSS_IOSF_UNIT_LPIO1            0xAB
 893 #define LPSS_IOSF_UNIT_LPIO2            0xAC
 894
 895 #define LPSS_IOSF_PMCSR                 0x84
 896 #define LPSS_PMCSR_D0                   0
 897 #define LPSS_PMCSR_D3hot                3
 898 #define LPSS_PMCSR_Dx_MASK              GENMASK(1, 0)
 899
 900 #define LPSS_IOSF_GPIODEF0              0x154
 901 #define LPSS_GPIODEF0_DMA1_D3           BIT(2)
 902 #define LPSS_GPIODEF0_DMA2_D3           BIT(3)
 903 #define LPSS_GPIODEF0_DMA_D3_MASK       GENMASK(3, 2)
 904 #define LPSS_GPIODEF0_DMA_LLP           BIT(13)
 905
 906 static DEFINE_MUTEX(lpss_iosf_mutex);
 907 static bool lpss_iosf_d3_entered = true;
 908
 909 static void lpss_iosf_enter_d3_state(void)
 910 {
 911         u32 value1 = 0;
 912         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 913         u32 value2 = LPSS_PMCSR_D3hot;
 914         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 915         /*
 916          * PMC provides an information about actual status of the LPSS devices.
 917          * Here we read the values related to LPSS power island, i.e. LPSS
 918          * devices, excluding both LPSS DMA controllers, along with SCC domain.
 919          */
 920         u32 func_dis, d3_sts_0, pmc_status;
 921         int ret;
 922
 923         ret = pmc_atom_read(PMC_FUNC_DIS, &func_dis);
 924         if (ret)
 925                 return;
 926
 927         mutex_lock(&lpss_iosf_mutex);
 928
 929         ret = pmc_atom_read(PMC_D3_STS_0, &d3_sts_0);
 930         if (ret)
 931                 goto exit;
 932
 933         /*
 934          * Get the status of entire LPSS power island per device basis.
 935          * Shutdown both LPSS DMA controllers if and only if all other devices
 936          * are already in D3hot.
 937          */
 938         pmc_status = (~(d3_sts_0 | func_dis)) & pmc_atom_d3_mask;
 939         if (pmc_status)
 940                 goto exit;
 941
 942         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 943                         LPSS_IOSF_PMCSR, value2, mask2);
 944
 945         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 946                         LPSS_IOSF_PMCSR, value2, mask2);
 947
 948         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 949                         LPSS_IOSF_GPIODEF0, value1, mask1);
 950
 951         lpss_iosf_d3_entered = true;
 952
 953 exit:
 954         mutex_unlock(&lpss_iosf_mutex);
 955 }
 956
 957 static void lpss_iosf_exit_d3_state(void)
 958 {
 959         u32 value1 = LPSS_GPIODEF0_DMA1_D3 | LPSS_GPIODEF0_DMA2_D3 |
 960                      LPSS_GPIODEF0_DMA_LLP;
 961         u32 mask1 = LPSS_GPIODEF0_DMA_D3_MASK | LPSS_GPIODEF0_DMA_LLP;
 962         u32 value2 = LPSS_PMCSR_D0;
 963         u32 mask2 = LPSS_PMCSR_Dx_MASK;
 964
 965         mutex_lock(&lpss_iosf_mutex);
 966
 967         if (!lpss_iosf_d3_entered)
 968                 goto exit;
 969
 970         lpss_iosf_d3_entered = false;
 971
 972         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIOEP, MBI_CR_WRITE,
 973                         LPSS_IOSF_GPIODEF0, value1, mask1);
 974
 975         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO2, MBI_CFG_WRITE,
 976                         LPSS_IOSF_PMCSR, value2, mask2);
 977
 978         iosf_mbi_modify(LPSS_IOSF_UNIT_LPIO1, MBI_CFG_WRITE,
 979                         LPSS_IOSF_PMCSR, value2, mask2);
 980
 981 exit:
 982         mutex_unlock(&lpss_iosf_mutex);
 983 }
 984
 985 static int acpi_lpss_suspend(struct device *dev, bool wakeup)
 986 {
 987         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
 988         int ret;
 989
 990         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
 991                 acpi_lpss_save_ctx(dev, pdata);
 992
 993         ret = acpi_dev_suspend(dev, wakeup);
 994
 995         /*
 996          * This call must be last in the sequence, otherwise PMC will return
 997          * wrong status for devices being about to be powered off. See
 998          * lpss_iosf_enter_d3_state() for further information.
 999          */
1000         if (acpi_target_system_state() == ACPI_STATE_S0 &&
1001             lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1002                 lpss_iosf_enter_d3_state();
1003
1004         return ret;
1005 }
1006
1007 static int acpi_lpss_resume(struct device *dev)
1008 {
1009         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1010         int ret;
1011
1012         /*
1013          * This call is kept first to be in symmetry with
1014          * acpi_lpss_runtime_suspend() one.
1015          */
1016         if (lpss_quirks & LPSS_QUIRK_ALWAYS_POWER_ON && iosf_mbi_available())
1017                 lpss_iosf_exit_d3_state();
1018
1019         ret = acpi_dev_resume(dev);
1020         if (ret)
1021                 return ret;
1022
1023         acpi_lpss_d3_to_d0_delay(pdata);
1024
1025         if (pdata->dev_desc->flags & LPSS_SAVE_CTX)
1026                 acpi_lpss_restore_ctx(dev, pdata);
1027
1028         return 0;
1029 }
1030
1031 #ifdef CONFIG_PM_SLEEP
1032 static int acpi_lpss_do_suspend_late(struct device *dev)
1033 {
1034         int ret;
1035
1036         if (dev_pm_smart_suspend_and_suspended(dev))
1037                 return 0;
1038
1039         ret = pm_generic_suspend_late(dev);
1040         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1041 }
1042
1043 static int acpi_lpss_suspend_late(struct device *dev)
1044 {
1045         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1046
1047         if (pdata->dev_desc->resume_from_noirq)
1048                 return 0;
1049
1050         return acpi_lpss_do_suspend_late(dev);
1051 }
1052
1053 static int acpi_lpss_suspend_noirq(struct device *dev)
1054 {
1055         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1056         int ret;
1057
1058         if (pdata->dev_desc->resume_from_noirq) {
1059                 /*
1060                  * The driver's ->suspend_late callback will be invoked by
1061                  * acpi_lpss_do_suspend_late(), with the assumption that the
1062                  * driver really wanted to run that code in ->suspend_noirq, but
1063                  * it could not run after acpi_dev_suspend() and the driver
1064                  * expected the latter to be called in the "late" phase.
1065                  */
1066                 ret = acpi_lpss_do_suspend_late(dev);
1067                 if (ret)
1068                         return ret;
1069         }
1070
1071         return acpi_subsys_suspend_noirq(dev);
1072 }
1073
1074 static int acpi_lpss_do_resume_early(struct device *dev)
1075 {
1076         int ret = acpi_lpss_resume(dev);
1077
1078         return ret ? ret : pm_generic_resume_early(dev);
1079 }
1080
1081 static int acpi_lpss_resume_early(struct device *dev)
1082 {
1083         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1084
1085         if (pdata->dev_desc->resume_from_noirq)
1086                 return 0;
1087
1088         return acpi_lpss_do_resume_early(dev);
1089 }
1090
1091 static int acpi_lpss_resume_noirq(struct device *dev)
1092 {
1093         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1094         int ret;
1095
1096         /* Follow acpi_subsys_resume_noirq(). */
1097         if (dev_pm_may_skip_resume(dev))
1098                 return 0;
1099
1100         if (dev_pm_smart_suspend_and_suspended(dev))
1101                 pm_runtime_set_active(dev);
1102
1103         ret = pm_generic_resume_noirq(dev);
1104         if (ret)
1105                 return ret;
1106
1107         if (!pdata->dev_desc->resume_from_noirq)
1108                 return 0;
1109
1110         /*
1111          * The driver's ->resume_early callback will be invoked by
1112          * acpi_lpss_do_resume_early(), with the assumption that the driver
1113          * really wanted to run that code in ->resume_noirq, but it could not
1114          * run before acpi_dev_resume() and the driver expected the latter to be
1115          * called in the "early" phase.
1116          */
1117         return acpi_lpss_do_resume_early(dev);
1118 }
1119
1120 static int acpi_lpss_do_restore_early(struct device *dev)
1121 {
1122         int ret = acpi_lpss_resume(dev);
1123
1124         return ret ? ret : pm_generic_restore_early(dev);
1125 }
1126
1127 static int acpi_lpss_restore_early(struct device *dev)
1128 {
1129         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1130
1131         if (pdata->dev_desc->resume_from_noirq)
1132                 return 0;
1133
1134         return acpi_lpss_do_restore_early(dev);
1135 }
1136
1137 static int acpi_lpss_restore_noirq(struct device *dev)
1138 {
1139         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1140         int ret;
1141
1142         ret = pm_generic_restore_noirq(dev);
1143         if (ret)
1144                 return ret;
1145
1146         if (!pdata->dev_desc->resume_from_noirq)
1147                 return 0;
1148
1149         /* This is analogous to what happens in acpi_lpss_resume_noirq(). */
1150         return acpi_lpss_do_restore_early(dev);
1151 }
1152
1153 static int acpi_lpss_do_poweroff_late(struct device *dev)
1154 {
1155         int ret = pm_generic_poweroff_late(dev);
1156
1157         return ret ? ret : acpi_lpss_suspend(dev, device_may_wakeup(dev));
1158 }
1159
1160 static int acpi_lpss_poweroff_late(struct device *dev)
1161 {
1162         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1163
1164         if (dev_pm_smart_suspend_and_suspended(dev))
1165                 return 0;
1166
1167         if (pdata->dev_desc->resume_from_noirq)
1168                 return 0;
1169
1170         return acpi_lpss_do_poweroff_late(dev);
1171 }
1172
1173 static int acpi_lpss_poweroff_noirq(struct device *dev)
1174 {
1175         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1176
1177         if (dev_pm_smart_suspend_and_suspended(dev))
1178                 return 0;
1179
1180         if (pdata->dev_desc->resume_from_noirq) {
1181                 /* This is analogous to the acpi_lpss_suspend_noirq() case. */
1182                 int ret = acpi_lpss_do_poweroff_late(dev);
1183                 if (ret)
1184                         return ret;
1185         }
1186
1187         return pm_generic_poweroff_noirq(dev);
1188 }
1189 #endif /* CONFIG_PM_SLEEP */
1190
1191 static int acpi_lpss_runtime_suspend(struct device *dev)
1192 {
1193         int ret = pm_generic_runtime_suspend(dev);
1194
1195         return ret ? ret : acpi_lpss_suspend(dev, true);
1196 }
1197
1198 static int acpi_lpss_runtime_resume(struct device *dev)
1199 {
1200         int ret = acpi_lpss_resume(dev);
1201
1202         return ret ? ret : pm_generic_runtime_resume(dev);
1203 }
1204 #endif /* CONFIG_PM */
1205
1206 static struct dev_pm_domain acpi_lpss_pm_domain = {
1207 #ifdef CONFIG_PM
1208         .activate = acpi_lpss_activate,
1209         .dismiss = acpi_lpss_dismiss,
1210 #endif
1211         .ops = {
1212 #ifdef CONFIG_PM
1213 #ifdef CONFIG_PM_SLEEP
1214                 .prepare = acpi_subsys_prepare,
1215                 .complete = acpi_subsys_complete,
1216                 .suspend = acpi_subsys_suspend,
1217                 .suspend_late = acpi_lpss_suspend_late,
1218                 .suspend_noirq = acpi_lpss_suspend_noirq,
1219                 .resume_noirq = acpi_lpss_resume_noirq,
1220                 .resume_early = acpi_lpss_resume_early,
1221                 .freeze = acpi_subsys_freeze,
1222                 .poweroff = acpi_subsys_poweroff,
1223                 .poweroff_late = acpi_lpss_poweroff_late,
1224                 .poweroff_noirq = acpi_lpss_poweroff_noirq,
1225                 .restore_noirq = acpi_lpss_restore_noirq,
1226                 .restore_early = acpi_lpss_restore_early,
1227 #endif
1228                 .runtime_suspend = acpi_lpss_runtime_suspend,
1229                 .runtime_resume = acpi_lpss_runtime_resume,
1230 #endif
1231         },
1232 };
1233
1234 static int acpi_lpss_platform_notify(struct notifier_block *nb,
1235                                      unsigned long action, void *data)
1236 {
1237         struct platform_device *pdev = to_platform_device(data);
1238         struct lpss_private_data *pdata;
1239         struct acpi_device *adev;
1240         const struct acpi_device_id *id;
1241
1242         id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
1243         if (!id || !id->driver_data)
1244                 return 0;
1245
1246         if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
1247                 return 0;
1248
1249         pdata = acpi_driver_data(adev);
1250         if (!pdata)
1251                 return 0;
1252
1253         if (pdata->mmio_base &&
1254             pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
1255                 dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
1256                 return 0;
1257         }
1258
1259         switch (action) {
1260         case BUS_NOTIFY_BIND_DRIVER:
1261                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1262                 break;
1263         case BUS_NOTIFY_DRIVER_NOT_BOUND:
1264         case BUS_NOTIFY_UNBOUND_DRIVER:
1265                 dev_pm_domain_set(&pdev->dev, NULL);
1266                 break;
1267         case BUS_NOTIFY_ADD_DEVICE:
1268                 dev_pm_domain_set(&pdev->dev, &acpi_lpss_pm_domain);
1269                 if (pdata->dev_desc->flags & LPSS_LTR)
1270                         return sysfs_create_group(&pdev->dev.kobj,
1271                                                   &lpss_attr_group);
1272                 break;
1273         case BUS_NOTIFY_DEL_DEVICE:
1274                 if (pdata->dev_desc->flags & LPSS_LTR)
1275                         sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
1276                 dev_pm_domain_set(&pdev->dev, NULL);
1277                 break;
1278         default:
1279                 break;
1280         }
1281
1282         return 0;
1283 }
1284
1285 static struct notifier_block acpi_lpss_nb = {
1286         .notifier_call = acpi_lpss_platform_notify,
1287 };
1288
1289 static void acpi_lpss_bind(struct device *dev)
1290 {
1291         struct lpss_private_data *pdata = acpi_driver_data(ACPI_COMPANION(dev));
1292
1293         if (!pdata || !pdata->mmio_base || !(pdata->dev_desc->flags & LPSS_LTR))
1294                 return;
1295
1296         if (pdata->mmio_size >= pdata->dev_desc->prv_offset + LPSS_LTR_SIZE)
1297                 dev->power.set_latency_tolerance = acpi_lpss_set_ltr;
1298         else
1299                 dev_err(dev, "MMIO size insufficient to access LTR\n");
1300 }
1301
1302 static void acpi_lpss_unbind(struct device *dev)
1303 {
1304         dev->power.set_latency_tolerance = NULL;
1305 }
1306
1307 static struct acpi_scan_handler lpss_handler = {
1308         .ids = acpi_lpss_device_ids,
1309         .attach = acpi_lpss_create_device,
1310         .bind = acpi_lpss_bind,
1311         .unbind = acpi_lpss_unbind,
1312 };
1313
1314 void __init acpi_lpss_init(void)
1315 {
1316         const struct x86_cpu_id *id;
1317         int ret;
1318
1319         ret = lpt_clk_init();
1320         if (ret)
1321                 return;
1322
1323         id = x86_match_cpu(lpss_cpu_ids);
1324         if (id)
1325                 lpss_quirks |= LPSS_QUIRK_ALWAYS_POWER_ON;
1326
1327         bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
1328         acpi_scan_add_handler(&lpss_handler);
1329 }
1330
1331 #else
1332
1333 static struct acpi_scan_handler lpss_handler = {
1334         .ids = acpi_lpss_device_ids,
1335 };
1336
1337 void __init acpi_lpss_init(void)
1338 {
1339         acpi_scan_add_handler(&lpss_handler);
1340 }
1341
1342 #endif /* CONFIG_X86_INTEL_LPSS */