1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2022 HabanaLabs, Ltd.
11 #include <linux/io-64-nonatomic-lo-hi.h>
16 #define HL_MAX_NUM_OF_GLBL_ERR_CAUSE 10
17 #define HL_GLBL_ERR_ADDRESS_MASK GENMASK(11, 0)
18 /* GLBL_ERR_ADDR register offset from the start of the block */
19 #define HL_GLBL_ERR_ADDR_OFFSET 0xF44
20 /* GLBL_ERR_CAUSE register offset from the start of the block */
21 #define HL_GLBL_ERR_CAUSE_OFFSET 0xF48
24 * struct hl_special_block_info - stores address details of a particular type of
25 * IP block which has a SPECIAL part.
27 * @block_type: block type as described in every ASIC's block_types enum.
28 * @base_addr: base address of the first block of particular type,
29 * e.g., address of NIC0_UMR0_0 of 'NIC_UMR' block.
30 * @major: number of major blocks of particular type.
31 * @minor: number of minor blocks of particular type.
32 * @sub_minor: number of sub minor blocks of particular type.
33 * @major_offset: address gap between 2 consecutive major blocks of particular type,
34 * e.g., offset between NIC0_UMR0_0 and NIC1_UMR0_0 is 0x80000.
35 * @minor_offset: address gap between 2 consecutive minor blocks of particular type,
36 * e.g., offset between NIC0_UMR0_0 and NIC0_UMR1_0 is 0x20000.
37 * @sub_minor_offset: address gap between 2 consecutive sub_minor blocks of particular
38 * type, e.g., offset between NIC0_UMR0_0 and NIC0_UMR0_1 is 0x1000.
40 * e.g., in Gaudi2, NIC_UMR blocks can be interpreted as:
41 * NIC<major>_UMR<minor>_<sub_minor> where major=12, minor=2, sub_minor=15.
42 * In other words, for each of 12 major numbers (i.e 0 to 11) there are
43 * 2 blocks with different minor numbers (i.e. 0 to 1). Again, for each minor
44 * number there are 15 blocks with different sub_minor numbers (i.e. 0 to 14).
45 * So different blocks are NIC0_UMR0_0, NIC0_UMR0_1, ..., NIC0_UMR1_0, ....,
48 * Struct's formatted data is located in the SOL-based auto-generated protbits headers.
50 struct hl_special_block_info {
62 * struct hl_automated_pb_cfg - represents configurations of a particular type
63 * of IP block which has protection bits.
65 * @addr: address details as described in hl_automation_pb_addr struct.
66 * @prot_map: each bit corresponds to one among 32 protection configuration regs
67 * (e.g., SPECIAL_GLBL_PRIV). '1' means 0xffffffff and '0' means 0x0
68 * to be written into the corresponding protection configuration reg.
69 * This bit is meaningful if same bit in data_map is 0, otherwise ignored.
70 * @data_map: each bit corresponds to one among 32 protection configuration regs
71 * (e.g., SPECIAL_GLBL_PRIV). '1' means corresponding protection
72 * configuration reg is to be written with a value in array pointed
73 * by 'data', otherwise the value is decided by 'prot_map'.
74 * @data: pointer to data array which stores the config value(s) to be written
75 * to corresponding protection configuration reg(s).
76 * @data_size: size of the data array.
78 * Each bit of 'data_map' and 'prot_map' fields corresponds to one among 32
79 * protection configuration registers e.g., SPECIAL GLBL PRIV regs (starting at
80 * offset 0xE80). '1' in 'data_map' means protection configuration to be done
81 * using configuration in data array. '0' in 'data_map" means protection
82 * configuration to be done as per the value of corresponding bit in 'prot_map'.
83 * '1' in 'prot_map' means the register to be programmed with 0xFFFFFFFF
84 * (all non-protected). '0' in 'prot_map' means the register to be programmed
85 * with 0x0 (all protected).
87 * e.g., prot_map = 0x00000001, data_map = 0xC0000000 , data = {0xff, 0x12}
88 * SPECIAL_GLBL_PRIV[0] = 0xFFFFFFFF
89 * SPECIAL_GLBL_PRIV[1..29] = 0x0
90 * SPECIAL_GLBL_PRIV[30] = 0xFF
91 * SPECIAL_GLBL_PRIV[31] = 0x12
93 struct hl_automated_pb_cfg {
94 struct hl_special_block_info addr;
101 /* struct hl_special_blocks_cfg - holds special blocks cfg data.
103 * @priv_automated_pb_cfg: points to the main privileged PB array.
104 * @sec_automated_pb_cfg: points to the main secured PB array.
105 * @skip_blocks_cfg: holds arrays of block types & block ranges to be excluded.
106 * @priv_cfg_size: size of the main privileged PB array.
107 * @sec_cfg_size: size of the main secured PB array.
108 * @prot_lvl_priv: indication if it's a privileged/secured PB configurations.
110 struct hl_special_blocks_cfg {
111 struct hl_automated_pb_cfg *priv_automated_pb_cfg;
112 struct hl_automated_pb_cfg *sec_automated_pb_cfg;
113 struct hl_skip_blocks_cfg *skip_blocks_cfg;
119 /* Automated security */
121 /* struct hl_skip_blocks_cfg - holds arrays of block types & block ranges to be
122 * excluded from special blocks configurations.
124 * @block_types: an array of block types NOT to be configured.
125 * @block_types_len: len of an array of block types not to be configured.
126 * @block_ranges: an array of block ranges not to be configured.
127 * @block_ranges_len: len of an array of block ranges not to be configured.
128 * @skip_block_hook: hook that will be called before initializing special blocks.
130 struct hl_skip_blocks_cfg {
132 size_t block_types_len;
133 struct range *block_ranges;
134 size_t block_ranges_len;
135 bool (*skip_block_hook)(struct hl_device *hdev,
136 struct hl_special_blocks_cfg *special_blocks_cfg,
137 u32 blk_idx, u32 major, u32 minor, u32 sub_minor);
141 * struct iterate_special_ctx - HW module special block iterator
142 * @fn: function to apply to each HW module special block instance
143 * @data: optional internal data to the function iterator
145 struct iterate_special_ctx {
147 * callback for the HW module special block iterator
148 * @hdev: pointer to the habanalabs device structure
149 * @block_id: block (ASIC specific definition can be dcore/hdcore)
150 * @major: major block index within block_id
151 * @minor: minor block index within the major block
152 * @sub_minor: sub_minor block index within the minor block
153 * @data: function specific data
155 int (*fn)(struct hl_device *hdev, u32 block_id, u32 major, u32 minor,
156 u32 sub_minor, void *data);
160 int hl_iterate_special_blocks(struct hl_device *hdev, struct iterate_special_ctx *ctx);
161 void hl_check_for_glbl_errors(struct hl_device *hdev);
163 #endif /* SECURITY_H_ */