1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 ARM Ltd.
4 * Author: Catalin Marinas <catalin.marinas@arm.com>
8 #include <linux/cache.h>
9 #include <linux/dma-map-ops.h>
10 #include <linux/iommu.h>
13 #include <asm/cacheflush.h>
14 #include <asm/xen/xen-ops.h>
16 void arch_sync_dma_for_device(phys_addr_t paddr, size_t size,
17 enum dma_data_direction dir)
19 unsigned long start = (unsigned long)phys_to_virt(paddr);
21 dcache_clean_poc(start, start + size);
24 void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size,
25 enum dma_data_direction dir)
27 unsigned long start = (unsigned long)phys_to_virt(paddr);
29 if (dir == DMA_TO_DEVICE)
32 dcache_inval_poc(start, start + size);
35 void arch_dma_prep_coherent(struct page *page, size_t size)
37 unsigned long start = (unsigned long)page_address(page);
39 dcache_clean_poc(start, start + size);
42 #ifdef CONFIG_IOMMU_DMA
43 void arch_teardown_dma_ops(struct device *dev)
49 void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
50 const struct iommu_ops *iommu, bool coherent)
52 int cls = cache_line_size_of_cpu();
54 WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN,
55 TAINT_CPU_OUT_OF_SPEC,
56 "%s %s: ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)",
57 dev_driver_string(dev), dev_name(dev),
58 ARCH_DMA_MINALIGN, cls);
60 dev->dma_coherent = coherent;
62 iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1);
64 xen_setup_dma_ops(dev);