2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
28 #include <drm/drm_dp_helper.h>
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
36 #define _INTEL_BIOS_PRIVATE
37 #include "intel_vbt_defs.h"
40 * DOC: Video BIOS Table (VBT)
42 * The Video BIOS Table, or VBT, provides platform and board specific
43 * configuration information to the driver that is not discoverable or available
44 * through other means. The configuration is mostly related to display
45 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
48 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
49 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
50 * contain the actual configuration information. The VBT Header, and thus the
51 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
52 * BDB Header. The data blocks are concatenated after the BDB Header. The data
53 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
54 * data. (Block 53, the MIPI Sequence Block is an exception.)
56 * The driver parses the VBT during load. The relevant information is stored in
57 * driver private data for ease of use, and the actual VBT is not read after
61 /* Wrapper for VBT child device config */
62 struct display_device_data {
63 struct child_device_config child;
64 struct dsc_compression_parameters_entry *dsc;
65 struct list_head node;
68 #define SLAVE_ADDR1 0x70
69 #define SLAVE_ADDR2 0x72
71 /* Get BDB block size given a pointer to Block ID. */
72 static u32 _get_blocksize(const u8 *block_base)
74 /* The MIPI Sequence Block v3+ has a separate size field. */
75 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
76 return *((const u32 *)(block_base + 4));
78 return *((const u16 *)(block_base + 1));
81 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
82 static u32 get_blocksize(const void *block_data)
84 return _get_blocksize(block_data - 3);
88 find_section(const void *_bdb, enum bdb_block_id section_id)
90 const struct bdb_header *bdb = _bdb;
91 const u8 *base = _bdb;
93 u32 total, current_size;
94 enum bdb_block_id current_id;
96 /* skip to first section */
97 index += bdb->header_size;
98 total = bdb->bdb_size;
100 /* walk the sections looking for section_id */
101 while (index + 3 < total) {
102 current_id = *(base + index);
103 current_size = _get_blocksize(base + index);
106 if (index + current_size > total)
109 if (current_id == section_id)
112 index += current_size;
119 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
120 const struct lvds_dvo_timing *dvo_timing)
122 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
123 dvo_timing->hactive_lo;
124 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
125 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
126 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
127 ((dvo_timing->hsync_pulse_width_hi << 8) |
128 dvo_timing->hsync_pulse_width_lo);
129 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
130 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
132 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
133 dvo_timing->vactive_lo;
134 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
135 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
136 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
137 ((dvo_timing->vsync_pulse_width_hi << 4) |
138 dvo_timing->vsync_pulse_width_lo);
139 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
140 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
141 panel_fixed_mode->clock = dvo_timing->clock * 10;
142 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
144 if (dvo_timing->hsync_positive)
145 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
147 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
149 if (dvo_timing->vsync_positive)
150 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
152 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
154 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
155 dvo_timing->himage_lo;
156 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
157 dvo_timing->vimage_lo;
159 /* Some VBTs have bogus h/vtotal values */
160 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
161 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
162 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
163 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
165 drm_mode_set_name(panel_fixed_mode);
168 static const struct lvds_dvo_timing *
169 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
170 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
174 * the size of fp_timing varies on the different platform.
175 * So calculate the DVO timing relative offset in LVDS data
176 * entry to get the DVO timing entry
180 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
181 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
182 int dvo_timing_offset =
183 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
184 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
185 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
187 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
190 /* get lvds_fp_timing entry
191 * this function may return NULL if the corresponding entry is invalid
193 static const struct lvds_fp_timing *
194 get_lvds_fp_timing(const struct bdb_header *bdb,
195 const struct bdb_lvds_lfp_data *data,
196 const struct bdb_lvds_lfp_data_ptrs *ptrs,
199 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
200 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
203 if (index >= ARRAY_SIZE(ptrs->ptr))
205 ofs = ptrs->ptr[index].fp_timing_offset;
206 if (ofs < data_ofs ||
207 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
209 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
212 /* Parse general panel options */
214 parse_panel_options(struct drm_i915_private *dev_priv,
215 const struct bdb_header *bdb)
217 const struct bdb_lvds_options *lvds_options;
222 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
226 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
228 ret = intel_opregion_get_panel_type(dev_priv);
230 drm_WARN_ON(&dev_priv->drm, ret > 0xf);
232 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (OpRegion)\n",
235 if (lvds_options->panel_type > 0xf) {
236 drm_dbg_kms(&dev_priv->drm,
237 "Invalid VBT panel type 0x%x\n",
238 lvds_options->panel_type);
241 panel_type = lvds_options->panel_type;
242 drm_dbg_kms(&dev_priv->drm, "Panel type: %d (VBT)\n",
246 dev_priv->vbt.panel_type = panel_type;
248 drrs_mode = (lvds_options->dps_panel_type_bits
249 >> (panel_type * 2)) & MODE_MASK;
251 * VBT has static DRRS = 0 and seamless DRRS = 2.
252 * The below piece of code is required to adjust vbt.drrs_type
253 * to match the enum drrs_support_type.
257 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
258 drm_dbg_kms(&dev_priv->drm, "DRRS supported mode is static\n");
261 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
262 drm_dbg_kms(&dev_priv->drm,
263 "DRRS supported mode is seamless\n");
266 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
267 drm_dbg_kms(&dev_priv->drm,
268 "DRRS not supported (VBT input)\n");
273 /* Try to find integrated panel timing data */
275 parse_lfp_panel_dtd(struct drm_i915_private *dev_priv,
276 const struct bdb_header *bdb)
278 const struct bdb_lvds_lfp_data *lvds_lfp_data;
279 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
280 const struct lvds_dvo_timing *panel_dvo_timing;
281 const struct lvds_fp_timing *fp_timing;
282 struct drm_display_mode *panel_fixed_mode;
283 int panel_type = dev_priv->vbt.panel_type;
285 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
289 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
290 if (!lvds_lfp_data_ptrs)
293 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
297 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
298 if (!panel_fixed_mode)
301 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
303 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
305 drm_dbg_kms(&dev_priv->drm,
306 "Found panel mode in BIOS VBT legacy lfp table:\n");
307 drm_mode_debug_printmodeline(panel_fixed_mode);
309 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
313 /* check the resolution, just to be sure */
314 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
315 fp_timing->y_res == panel_fixed_mode->vdisplay) {
316 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
317 drm_dbg_kms(&dev_priv->drm,
318 "VBT initial LVDS value %x\n",
319 dev_priv->vbt.bios_lvds_val);
325 parse_generic_dtd(struct drm_i915_private *dev_priv,
326 const struct bdb_header *bdb)
328 const struct bdb_generic_dtd *generic_dtd;
329 const struct generic_dtd_entry *dtd;
330 struct drm_display_mode *panel_fixed_mode;
333 generic_dtd = find_section(bdb, BDB_GENERIC_DTD);
337 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
338 drm_err(&dev_priv->drm, "GDTD size %u is too small.\n",
339 generic_dtd->gdtd_size);
341 } else if (generic_dtd->gdtd_size !=
342 sizeof(struct generic_dtd_entry)) {
343 drm_err(&dev_priv->drm, "Unexpected GDTD size %u\n",
344 generic_dtd->gdtd_size);
345 /* DTD has unknown fields, but keep going */
348 num_dtd = (get_blocksize(generic_dtd) -
349 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
350 if (dev_priv->vbt.panel_type >= num_dtd) {
351 drm_err(&dev_priv->drm,
352 "Panel type %d not found in table of %d DTD's\n",
353 dev_priv->vbt.panel_type, num_dtd);
357 dtd = &generic_dtd->dtd[dev_priv->vbt.panel_type];
359 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
360 if (!panel_fixed_mode)
363 panel_fixed_mode->hdisplay = dtd->hactive;
364 panel_fixed_mode->hsync_start =
365 panel_fixed_mode->hdisplay + dtd->hfront_porch;
366 panel_fixed_mode->hsync_end =
367 panel_fixed_mode->hsync_start + dtd->hsync;
368 panel_fixed_mode->htotal =
369 panel_fixed_mode->hdisplay + dtd->hblank;
371 panel_fixed_mode->vdisplay = dtd->vactive;
372 panel_fixed_mode->vsync_start =
373 panel_fixed_mode->vdisplay + dtd->vfront_porch;
374 panel_fixed_mode->vsync_end =
375 panel_fixed_mode->vsync_start + dtd->vsync;
376 panel_fixed_mode->vtotal =
377 panel_fixed_mode->vdisplay + dtd->vblank;
379 panel_fixed_mode->clock = dtd->pixel_clock;
380 panel_fixed_mode->width_mm = dtd->width_mm;
381 panel_fixed_mode->height_mm = dtd->height_mm;
383 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
384 drm_mode_set_name(panel_fixed_mode);
386 if (dtd->hsync_positive_polarity)
387 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
389 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
391 if (dtd->vsync_positive_polarity)
392 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
394 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
396 drm_dbg_kms(&dev_priv->drm,
397 "Found panel mode in BIOS VBT generic dtd table:\n");
398 drm_mode_debug_printmodeline(panel_fixed_mode);
400 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
404 parse_panel_dtd(struct drm_i915_private *dev_priv,
405 const struct bdb_header *bdb)
408 * Older VBTs provided provided DTD information for internal displays
409 * through the "LFP panel DTD" block (42). As of VBT revision 229,
410 * that block is now deprecated and DTD information should be provided
411 * via a newer "generic DTD" block (58). Just to be safe, we'll
412 * try the new generic DTD block first on VBT >= 229, but still fall
413 * back to trying the old LFP block if that fails.
415 if (bdb->version >= 229)
416 parse_generic_dtd(dev_priv, bdb);
417 if (!dev_priv->vbt.lfp_lvds_vbt_mode)
418 parse_lfp_panel_dtd(dev_priv, bdb);
422 parse_lfp_backlight(struct drm_i915_private *dev_priv,
423 const struct bdb_header *bdb)
425 const struct bdb_lfp_backlight_data *backlight_data;
426 const struct lfp_backlight_data_entry *entry;
427 int panel_type = dev_priv->vbt.panel_type;
429 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
433 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
434 drm_dbg_kms(&dev_priv->drm,
435 "Unsupported backlight data entry size %u\n",
436 backlight_data->entry_size);
440 entry = &backlight_data->data[panel_type];
442 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
443 if (!dev_priv->vbt.backlight.present) {
444 drm_dbg_kms(&dev_priv->drm,
445 "PWM backlight not present in VBT (type %u)\n",
450 dev_priv->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
451 if (bdb->version >= 191 &&
452 get_blocksize(backlight_data) >= sizeof(*backlight_data)) {
453 const struct lfp_backlight_control_method *method;
455 method = &backlight_data->backlight_control[panel_type];
456 dev_priv->vbt.backlight.type = method->type;
457 dev_priv->vbt.backlight.controller = method->controller;
460 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
461 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
462 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
463 drm_dbg_kms(&dev_priv->drm,
464 "VBT backlight PWM modulation frequency %u Hz, "
465 "active %s, min brightness %u, level %u, controller %u\n",
466 dev_priv->vbt.backlight.pwm_freq_hz,
467 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
468 dev_priv->vbt.backlight.min_brightness,
469 backlight_data->level[panel_type],
470 dev_priv->vbt.backlight.controller);
473 /* Try to find sdvo panel data */
475 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
476 const struct bdb_header *bdb)
478 const struct bdb_sdvo_panel_dtds *dtds;
479 struct drm_display_mode *panel_fixed_mode;
482 index = dev_priv->params.vbt_sdvo_panel_type;
484 drm_dbg_kms(&dev_priv->drm,
485 "Ignore SDVO panel mode from BIOS VBT tables.\n");
490 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
492 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
493 if (!sdvo_lvds_options)
496 index = sdvo_lvds_options->panel_type;
499 dtds = find_section(bdb, BDB_SDVO_PANEL_DTDS);
503 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
504 if (!panel_fixed_mode)
507 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
509 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
511 drm_dbg_kms(&dev_priv->drm,
512 "Found SDVO panel mode in BIOS VBT tables:\n");
513 drm_mode_debug_printmodeline(panel_fixed_mode);
516 static int intel_bios_ssc_frequency(struct drm_i915_private *dev_priv,
519 switch (INTEL_GEN(dev_priv)) {
521 return alternate ? 66667 : 48000;
524 return alternate ? 100000 : 96000;
526 return alternate ? 100000 : 120000;
531 parse_general_features(struct drm_i915_private *dev_priv,
532 const struct bdb_header *bdb)
534 const struct bdb_general_features *general;
536 general = find_section(bdb, BDB_GENERAL_FEATURES);
540 dev_priv->vbt.int_tv_support = general->int_tv_support;
541 /* int_crt_support can't be trusted on earlier platforms */
542 if (bdb->version >= 155 &&
543 (HAS_DDI(dev_priv) || IS_VALLEYVIEW(dev_priv)))
544 dev_priv->vbt.int_crt_support = general->int_crt_support;
545 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
546 dev_priv->vbt.lvds_ssc_freq =
547 intel_bios_ssc_frequency(dev_priv, general->ssc_freq);
548 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
549 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
550 if (bdb->version >= 181) {
551 dev_priv->vbt.orientation = general->rotate_180 ?
552 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
553 DRM_MODE_PANEL_ORIENTATION_NORMAL;
555 dev_priv->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
557 drm_dbg_kms(&dev_priv->drm,
558 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
559 dev_priv->vbt.int_tv_support,
560 dev_priv->vbt.int_crt_support,
561 dev_priv->vbt.lvds_use_ssc,
562 dev_priv->vbt.lvds_ssc_freq,
563 dev_priv->vbt.display_clock_mode,
564 dev_priv->vbt.fdi_rx_polarity_inverted);
567 static const struct child_device_config *
568 child_device_ptr(const struct bdb_general_definitions *defs, int i)
570 return (const void *) &defs->devices[i * defs->child_dev_size];
574 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
576 struct sdvo_device_mapping *mapping;
577 const struct display_device_data *devdata;
578 const struct child_device_config *child;
582 * Only parse SDVO mappings on gens that could have SDVO. This isn't
583 * accurate and doesn't have to be, as long as it's not too strict.
585 if (!IS_GEN_RANGE(dev_priv, 3, 7)) {
586 drm_dbg_kms(&dev_priv->drm, "Skipping SDVO device mapping\n");
590 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
591 child = &devdata->child;
593 if (child->slave_addr != SLAVE_ADDR1 &&
594 child->slave_addr != SLAVE_ADDR2) {
596 * If the slave address is neither 0x70 nor 0x72,
597 * it is not a SDVO device. Skip it.
601 if (child->dvo_port != DEVICE_PORT_DVOB &&
602 child->dvo_port != DEVICE_PORT_DVOC) {
603 /* skip the incorrect SDVO port */
604 drm_dbg_kms(&dev_priv->drm,
605 "Incorrect SDVO port. Skip it\n");
608 drm_dbg_kms(&dev_priv->drm,
609 "the SDVO device with slave addr %2x is found on"
612 (child->dvo_port == DEVICE_PORT_DVOB) ?
614 mapping = &dev_priv->vbt.sdvo_mappings[child->dvo_port - 1];
615 if (!mapping->initialized) {
616 mapping->dvo_port = child->dvo_port;
617 mapping->slave_addr = child->slave_addr;
618 mapping->dvo_wiring = child->dvo_wiring;
619 mapping->ddc_pin = child->ddc_pin;
620 mapping->i2c_pin = child->i2c_pin;
621 mapping->initialized = 1;
622 drm_dbg_kms(&dev_priv->drm,
623 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
624 mapping->dvo_port, mapping->slave_addr,
625 mapping->dvo_wiring, mapping->ddc_pin,
628 drm_dbg_kms(&dev_priv->drm,
629 "Maybe one SDVO port is shared by "
630 "two SDVO device.\n");
632 if (child->slave2_addr) {
633 /* Maybe this is a SDVO device with multiple inputs */
634 /* And the mapping info is not added */
635 drm_dbg_kms(&dev_priv->drm,
636 "there exists the slave2_addr. Maybe this"
637 " is a SDVO device with multiple inputs.\n");
643 /* No SDVO device info is found */
644 drm_dbg_kms(&dev_priv->drm,
645 "No SDVO device info is found in VBT\n");
650 parse_driver_features(struct drm_i915_private *dev_priv,
651 const struct bdb_header *bdb)
653 const struct bdb_driver_features *driver;
655 driver = find_section(bdb, BDB_DRIVER_FEATURES);
659 if (INTEL_GEN(dev_priv) >= 5) {
661 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
662 * to mean "eDP". The VBT spec doesn't agree with that
663 * interpretation, but real world VBTs seem to.
665 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
666 dev_priv->vbt.int_lvds_support = 0;
669 * FIXME it's not clear which BDB version has the LVDS config
670 * bits defined. Revision history in the VBT spec says:
671 * "0.92 | Add two definitions for VBT value of LVDS Active
672 * Config (00b and 11b values defined) | 06/13/2005"
673 * but does not the specify the BDB version.
675 * So far version 134 (on i945gm) is the oldest VBT observed
676 * in the wild with the bits correctly populated. Version
677 * 108 (on i85x) does not have the bits correctly populated.
679 if (bdb->version >= 134 &&
680 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
681 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
682 dev_priv->vbt.int_lvds_support = 0;
685 if (bdb->version < 228) {
686 drm_dbg_kms(&dev_priv->drm, "DRRS State Enabled:%d\n",
687 driver->drrs_enabled);
689 * If DRRS is not supported, drrs_type has to be set to 0.
690 * This is because, VBT is configured in such a way that
691 * static DRRS is 0 and DRRS not supported is represented by
692 * driver->drrs_enabled=false
694 if (!driver->drrs_enabled)
695 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
697 dev_priv->vbt.psr.enable = driver->psr_enabled;
702 parse_power_conservation_features(struct drm_i915_private *dev_priv,
703 const struct bdb_header *bdb)
705 const struct bdb_lfp_power *power;
706 u8 panel_type = dev_priv->vbt.panel_type;
708 if (bdb->version < 228)
711 power = find_section(bdb, BDB_LFP_POWER);
715 dev_priv->vbt.psr.enable = power->psr & BIT(panel_type);
718 * If DRRS is not supported, drrs_type has to be set to 0.
719 * This is because, VBT is configured in such a way that
720 * static DRRS is 0 and DRRS not supported is represented by
721 * power->drrs & BIT(panel_type)=false
723 if (!(power->drrs & BIT(panel_type)))
724 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
726 if (bdb->version >= 232)
727 dev_priv->vbt.edp.hobl = power->hobl & BIT(panel_type);
731 parse_edp(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
733 const struct bdb_edp *edp;
734 const struct edp_power_seq *edp_pps;
735 const struct edp_fast_link_params *edp_link_params;
736 int panel_type = dev_priv->vbt.panel_type;
738 edp = find_section(bdb, BDB_EDP);
742 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
744 dev_priv->vbt.edp.bpp = 18;
747 dev_priv->vbt.edp.bpp = 24;
750 dev_priv->vbt.edp.bpp = 30;
754 /* Get the eDP sequencing and link info */
755 edp_pps = &edp->power_seqs[panel_type];
756 edp_link_params = &edp->fast_link_params[panel_type];
758 dev_priv->vbt.edp.pps = *edp_pps;
760 switch (edp_link_params->rate) {
762 dev_priv->vbt.edp.rate = DP_LINK_BW_1_62;
765 dev_priv->vbt.edp.rate = DP_LINK_BW_2_7;
768 drm_dbg_kms(&dev_priv->drm,
769 "VBT has unknown eDP link rate value %u\n",
770 edp_link_params->rate);
774 switch (edp_link_params->lanes) {
776 dev_priv->vbt.edp.lanes = 1;
779 dev_priv->vbt.edp.lanes = 2;
782 dev_priv->vbt.edp.lanes = 4;
785 drm_dbg_kms(&dev_priv->drm,
786 "VBT has unknown eDP lane count value %u\n",
787 edp_link_params->lanes);
791 switch (edp_link_params->preemphasis) {
792 case EDP_PREEMPHASIS_NONE:
793 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
795 case EDP_PREEMPHASIS_3_5dB:
796 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
798 case EDP_PREEMPHASIS_6dB:
799 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
801 case EDP_PREEMPHASIS_9_5dB:
802 dev_priv->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
805 drm_dbg_kms(&dev_priv->drm,
806 "VBT has unknown eDP pre-emphasis value %u\n",
807 edp_link_params->preemphasis);
811 switch (edp_link_params->vswing) {
812 case EDP_VSWING_0_4V:
813 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
815 case EDP_VSWING_0_6V:
816 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
818 case EDP_VSWING_0_8V:
819 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
821 case EDP_VSWING_1_2V:
822 dev_priv->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
825 drm_dbg_kms(&dev_priv->drm,
826 "VBT has unknown eDP voltage swing value %u\n",
827 edp_link_params->vswing);
831 if (bdb->version >= 173) {
834 /* Don't read from VBT if module parameter has valid value*/
835 if (dev_priv->params.edp_vswing) {
836 dev_priv->vbt.edp.low_vswing =
837 dev_priv->params.edp_vswing == 1;
839 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
840 dev_priv->vbt.edp.low_vswing = vswing == 0;
846 parse_psr(struct drm_i915_private *dev_priv, const struct bdb_header *bdb)
848 const struct bdb_psr *psr;
849 const struct psr_table *psr_table;
850 int panel_type = dev_priv->vbt.panel_type;
852 psr = find_section(bdb, BDB_PSR);
854 drm_dbg_kms(&dev_priv->drm, "No PSR BDB found.\n");
858 psr_table = &psr->psr_table[panel_type];
860 dev_priv->vbt.psr.full_link = psr_table->full_link;
861 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
863 /* Allowed VBT values goes from 0 to 15 */
864 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
865 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
867 switch (psr_table->lines_to_wait) {
869 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
872 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
875 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
878 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
881 drm_dbg_kms(&dev_priv->drm,
882 "VBT has unknown PSR lines to wait %u\n",
883 psr_table->lines_to_wait);
888 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
889 * Old decimal value is wake up time in multiples of 100 us.
891 if (bdb->version >= 205 &&
892 (IS_GEN9_BC(dev_priv) || IS_GEMINILAKE(dev_priv) ||
893 INTEL_GEN(dev_priv) >= 10)) {
894 switch (psr_table->tp1_wakeup_time) {
896 dev_priv->vbt.psr.tp1_wakeup_time_us = 500;
899 dev_priv->vbt.psr.tp1_wakeup_time_us = 100;
902 dev_priv->vbt.psr.tp1_wakeup_time_us = 0;
905 drm_dbg_kms(&dev_priv->drm,
906 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
907 psr_table->tp1_wakeup_time);
910 dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
914 switch (psr_table->tp2_tp3_wakeup_time) {
916 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 500;
919 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 100;
922 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 0;
925 drm_dbg_kms(&dev_priv->drm,
926 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
927 psr_table->tp2_tp3_wakeup_time);
930 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
934 dev_priv->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
935 dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
938 if (bdb->version >= 226) {
939 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
941 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
942 switch (wakeup_time) {
957 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
959 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
960 dev_priv->vbt.psr.psr2_tp2_tp3_wakeup_time_us = dev_priv->vbt.psr.tp2_tp3_wakeup_time_us;
964 static void parse_dsi_backlight_ports(struct drm_i915_private *dev_priv,
965 u16 version, enum port port)
967 if (!dev_priv->vbt.dsi.config->dual_link || version < 197) {
968 dev_priv->vbt.dsi.bl_ports = BIT(port);
969 if (dev_priv->vbt.dsi.config->cabc_supported)
970 dev_priv->vbt.dsi.cabc_ports = BIT(port);
975 switch (dev_priv->vbt.dsi.config->dl_dcs_backlight_ports) {
977 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
980 dev_priv->vbt.dsi.bl_ports = BIT(PORT_C);
983 case DL_DCS_PORT_A_AND_C:
984 dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
988 if (!dev_priv->vbt.dsi.config->cabc_supported)
991 switch (dev_priv->vbt.dsi.config->dl_dcs_cabc_ports) {
993 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
996 dev_priv->vbt.dsi.cabc_ports = BIT(PORT_C);
999 case DL_DCS_PORT_A_AND_C:
1000 dev_priv->vbt.dsi.cabc_ports =
1001 BIT(PORT_A) | BIT(PORT_C);
1007 parse_mipi_config(struct drm_i915_private *dev_priv,
1008 const struct bdb_header *bdb)
1010 const struct bdb_mipi_config *start;
1011 const struct mipi_config *config;
1012 const struct mipi_pps_data *pps;
1013 int panel_type = dev_priv->vbt.panel_type;
1016 /* parse MIPI blocks only if LFP type is MIPI */
1017 if (!intel_bios_is_dsi_present(dev_priv, &port))
1020 /* Initialize this to undefined indicating no generic MIPI support */
1021 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1023 /* Block #40 is already parsed and panel_fixed_mode is
1024 * stored in dev_priv->lfp_lvds_vbt_mode
1025 * resuse this when needed
1028 /* Parse #52 for panel index used from panel_type already
1031 start = find_section(bdb, BDB_MIPI_CONFIG);
1033 drm_dbg_kms(&dev_priv->drm, "No MIPI config BDB found");
1037 drm_dbg(&dev_priv->drm, "Found MIPI Config block, panel index = %d\n",
1041 * get hold of the correct configuration block and pps data as per
1042 * the panel_type as index
1044 config = &start->config[panel_type];
1045 pps = &start->pps[panel_type];
1047 /* store as of now full data. Trim when we realise all is not needed */
1048 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1049 if (!dev_priv->vbt.dsi.config)
1052 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1053 if (!dev_priv->vbt.dsi.pps) {
1054 kfree(dev_priv->vbt.dsi.config);
1058 parse_dsi_backlight_ports(dev_priv, bdb->version, port);
1060 /* FIXME is the 90 vs. 270 correct? */
1061 switch (config->rotation) {
1062 case ENABLE_ROTATION_0:
1064 * Most (all?) VBTs claim 0 degrees despite having
1065 * an upside down panel, thus we do not trust this.
1067 dev_priv->vbt.dsi.orientation =
1068 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1070 case ENABLE_ROTATION_90:
1071 dev_priv->vbt.dsi.orientation =
1072 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1074 case ENABLE_ROTATION_180:
1075 dev_priv->vbt.dsi.orientation =
1076 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1078 case ENABLE_ROTATION_270:
1079 dev_priv->vbt.dsi.orientation =
1080 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1084 /* We have mandatory mipi config blocks. Initialize as generic panel */
1085 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1088 /* Find the sequence block and size for the given panel. */
1090 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1091 u16 panel_id, u32 *seq_size)
1093 u32 total = get_blocksize(sequence);
1094 const u8 *data = &sequence->data[0];
1097 int header_size = sequence->version >= 3 ? 5 : 3;
1101 /* skip new block size */
1102 if (sequence->version >= 3)
1105 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1106 if (index + header_size > total) {
1107 DRM_ERROR("Invalid sequence block (header)\n");
1111 current_id = *(data + index);
1112 if (sequence->version >= 3)
1113 current_size = *((const u32 *)(data + index + 1));
1115 current_size = *((const u16 *)(data + index + 1));
1117 index += header_size;
1119 if (index + current_size > total) {
1120 DRM_ERROR("Invalid sequence block\n");
1124 if (current_id == panel_id) {
1125 *seq_size = current_size;
1126 return data + index;
1129 index += current_size;
1132 DRM_ERROR("Sequence block detected but no valid configuration\n");
1137 static int goto_next_sequence(const u8 *data, int index, int total)
1141 /* Skip Sequence Byte. */
1142 for (index = index + 1; index < total; index += len) {
1143 u8 operation_byte = *(data + index);
1146 switch (operation_byte) {
1147 case MIPI_SEQ_ELEM_END:
1149 case MIPI_SEQ_ELEM_SEND_PKT:
1150 if (index + 4 > total)
1153 len = *((const u16 *)(data + index + 2)) + 4;
1155 case MIPI_SEQ_ELEM_DELAY:
1158 case MIPI_SEQ_ELEM_GPIO:
1161 case MIPI_SEQ_ELEM_I2C:
1162 if (index + 7 > total)
1164 len = *(data + index + 6) + 7;
1167 DRM_ERROR("Unknown operation byte\n");
1175 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1179 u32 size_of_sequence;
1182 * Could skip sequence based on Size of Sequence alone, but also do some
1183 * checking on the structure.
1186 DRM_ERROR("Too small sequence size\n");
1190 /* Skip Sequence Byte. */
1194 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1195 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1198 size_of_sequence = *((const u32 *)(data + index));
1201 seq_end = index + size_of_sequence;
1202 if (seq_end > total) {
1203 DRM_ERROR("Invalid sequence size\n");
1207 for (; index < total; index += len) {
1208 u8 operation_byte = *(data + index);
1211 if (operation_byte == MIPI_SEQ_ELEM_END) {
1212 if (index != seq_end) {
1213 DRM_ERROR("Invalid element structure\n");
1219 len = *(data + index);
1223 * FIXME: Would be nice to check elements like for v1/v2 in
1224 * goto_next_sequence() above.
1226 switch (operation_byte) {
1227 case MIPI_SEQ_ELEM_SEND_PKT:
1228 case MIPI_SEQ_ELEM_DELAY:
1229 case MIPI_SEQ_ELEM_GPIO:
1230 case MIPI_SEQ_ELEM_I2C:
1231 case MIPI_SEQ_ELEM_SPI:
1232 case MIPI_SEQ_ELEM_PMIC:
1235 DRM_ERROR("Unknown operation byte %u\n",
1245 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1246 * skip all delay + gpio operands and stop at the first DSI packet op.
1248 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *dev_priv)
1250 const u8 *data = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1253 if (drm_WARN_ON(&dev_priv->drm,
1254 !data || dev_priv->vbt.dsi.seq_version != 1))
1257 /* index = 1 to skip sequence byte */
1258 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1259 switch (data[index]) {
1260 case MIPI_SEQ_ELEM_SEND_PKT:
1261 return index == 1 ? 0 : index;
1262 case MIPI_SEQ_ELEM_DELAY:
1263 len = 5; /* 1 byte for operand + uint32 */
1265 case MIPI_SEQ_ELEM_GPIO:
1266 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1277 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1278 * The deassert must be done before calling intel_dsi_device_ready, so for
1279 * these devices we split the init OTP sequence into a deassert sequence and
1280 * the actual init OTP part.
1282 static void fixup_mipi_sequences(struct drm_i915_private *dev_priv)
1287 /* Limit this to VLV for now. */
1288 if (!IS_VALLEYVIEW(dev_priv))
1291 /* Limit this to v1 vid-mode sequences */
1292 if (dev_priv->vbt.dsi.config->is_cmd_mode ||
1293 dev_priv->vbt.dsi.seq_version != 1)
1296 /* Only do this if there are otp and assert seqs and no deassert seq */
1297 if (!dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1298 !dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1299 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1302 /* The deassert-sequence ends at the first DSI packet */
1303 len = get_init_otp_deassert_fragment_len(dev_priv);
1307 drm_dbg_kms(&dev_priv->drm,
1308 "Using init OTP fragment to deassert reset\n");
1310 /* Copy the fragment, update seq byte and terminate it */
1311 init_otp = (u8 *)dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1312 dev_priv->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1313 if (!dev_priv->vbt.dsi.deassert_seq)
1315 dev_priv->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1316 dev_priv->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1317 /* Use the copy for deassert */
1318 dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1319 dev_priv->vbt.dsi.deassert_seq;
1320 /* Replace the last byte of the fragment with init OTP seq byte */
1321 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1322 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1323 dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1327 parse_mipi_sequence(struct drm_i915_private *dev_priv,
1328 const struct bdb_header *bdb)
1330 int panel_type = dev_priv->vbt.panel_type;
1331 const struct bdb_mipi_sequence *sequence;
1337 /* Only our generic panel driver uses the sequence block. */
1338 if (dev_priv->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1341 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
1343 drm_dbg_kms(&dev_priv->drm,
1344 "No MIPI Sequence found, parsing complete\n");
1348 /* Fail gracefully for forward incompatible sequence block. */
1349 if (sequence->version >= 4) {
1350 drm_err(&dev_priv->drm,
1351 "Unable to parse MIPI Sequence Block v%u\n",
1356 drm_dbg(&dev_priv->drm, "Found MIPI sequence block v%u\n",
1359 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1363 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1367 /* Parse the sequences, store pointers to each sequence. */
1369 u8 seq_id = *(data + index);
1370 if (seq_id == MIPI_SEQ_END)
1373 if (seq_id >= MIPI_SEQ_MAX) {
1374 drm_err(&dev_priv->drm, "Unknown sequence %u\n",
1379 /* Log about presence of sequences we won't run. */
1380 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1381 drm_dbg_kms(&dev_priv->drm,
1382 "Unsupported sequence %u\n", seq_id);
1384 dev_priv->vbt.dsi.sequence[seq_id] = data + index;
1386 if (sequence->version >= 3)
1387 index = goto_next_sequence_v3(data, index, seq_size);
1389 index = goto_next_sequence(data, index, seq_size);
1391 drm_err(&dev_priv->drm, "Invalid sequence %u\n",
1397 dev_priv->vbt.dsi.data = data;
1398 dev_priv->vbt.dsi.size = seq_size;
1399 dev_priv->vbt.dsi.seq_version = sequence->version;
1401 fixup_mipi_sequences(dev_priv);
1403 drm_dbg(&dev_priv->drm, "MIPI related VBT parsing complete\n");
1408 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
1412 parse_compression_parameters(struct drm_i915_private *i915,
1413 const struct bdb_header *bdb)
1415 const struct bdb_compression_parameters *params;
1416 struct display_device_data *devdata;
1417 const struct child_device_config *child;
1421 if (bdb->version < 198)
1424 params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
1427 if (params->entry_size != sizeof(params->data[0])) {
1428 drm_dbg_kms(&i915->drm,
1429 "VBT: unsupported compression param entry size\n");
1433 block_size = get_blocksize(params);
1434 if (block_size < sizeof(*params)) {
1435 drm_dbg_kms(&i915->drm,
1436 "VBT: expected 16 compression param entries\n");
1441 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1442 child = &devdata->child;
1444 if (!child->compression_enable)
1448 drm_dbg_kms(&i915->drm,
1449 "VBT: compression params not available\n");
1453 if (child->compression_method_cps) {
1454 drm_dbg_kms(&i915->drm,
1455 "VBT: CPS compression not supported\n");
1459 index = child->compression_structure_index;
1461 devdata->dsc = kmemdup(¶ms->data[index],
1462 sizeof(*devdata->dsc), GFP_KERNEL);
1466 static u8 translate_iboost(u8 val)
1468 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1470 if (val >= ARRAY_SIZE(mapping)) {
1471 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1474 return mapping[val];
1477 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1479 const struct ddi_vbt_port_info *info;
1482 for_each_port(port) {
1483 info = &i915->vbt.ddi_port_info[port];
1485 if (info->child && ddc_pin == info->alternate_ddc_pin)
1492 static void sanitize_ddc_pin(struct drm_i915_private *dev_priv,
1495 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1498 if (!info->alternate_ddc_pin)
1501 p = get_port_by_ddc_pin(dev_priv, info->alternate_ddc_pin);
1502 if (p != PORT_NONE) {
1503 drm_dbg_kms(&dev_priv->drm,
1504 "port %c trying to use the same DDC pin (0x%x) as port %c, "
1505 "disabling port %c DVI/HDMI support\n",
1506 port_name(port), info->alternate_ddc_pin,
1507 port_name(p), port_name(p));
1510 * If we have multiple ports supposedly sharing the
1511 * pin, then dvi/hdmi couldn't exist on the shared
1512 * port. Otherwise they share the same ddc bin and
1513 * system couldn't communicate with them separately.
1515 * Give inverse child device order the priority,
1516 * last one wins. Yes, there are real machines
1517 * (eg. Asrock B250M-HDV) where VBT has both
1518 * port A and port E with the same AUX ch and
1519 * we must pick port E :(
1521 info = &dev_priv->vbt.ddi_port_info[p];
1523 info->supports_dvi = false;
1524 info->supports_hdmi = false;
1525 info->alternate_ddc_pin = 0;
1529 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
1531 const struct ddi_vbt_port_info *info;
1534 for_each_port(port) {
1535 info = &i915->vbt.ddi_port_info[port];
1537 if (info->child && aux_ch == info->alternate_aux_channel)
1544 static void sanitize_aux_ch(struct drm_i915_private *dev_priv,
1547 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
1550 if (!info->alternate_aux_channel)
1553 p = get_port_by_aux_ch(dev_priv, info->alternate_aux_channel);
1554 if (p != PORT_NONE) {
1555 drm_dbg_kms(&dev_priv->drm,
1556 "port %c trying to use the same AUX CH (0x%x) as port %c, "
1557 "disabling port %c DP support\n",
1558 port_name(port), info->alternate_aux_channel,
1559 port_name(p), port_name(p));
1562 * If we have multiple ports supposedlt sharing the
1563 * aux channel, then DP couldn't exist on the shared
1564 * port. Otherwise they share the same aux channel
1565 * and system couldn't communicate with them separately.
1567 * Give inverse child device order the priority,
1568 * last one wins. Yes, there are real machines
1569 * (eg. Asrock B250M-HDV) where VBT has both
1570 * port A and port E with the same AUX ch and
1571 * we must pick port E :(
1573 info = &dev_priv->vbt.ddi_port_info[p];
1575 info->supports_dp = false;
1576 info->alternate_aux_channel = 0;
1580 static const u8 cnp_ddc_pin_map[] = {
1582 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1583 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1584 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1585 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1588 static const u8 icp_ddc_pin_map[] = {
1589 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1590 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1591 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1592 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1593 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1594 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1595 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1596 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1597 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1600 static u8 map_ddc_pin(struct drm_i915_private *dev_priv, u8 vbt_pin)
1602 const u8 *ddc_pin_map;
1605 if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP) {
1606 ddc_pin_map = icp_ddc_pin_map;
1607 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1608 } else if (HAS_PCH_CNP(dev_priv)) {
1609 ddc_pin_map = cnp_ddc_pin_map;
1610 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1612 /* Assuming direct map */
1616 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1617 return ddc_pin_map[vbt_pin];
1619 drm_dbg_kms(&dev_priv->drm,
1620 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1625 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
1626 const int port_mapping[][3], u8 dvo_port)
1631 for (port = PORT_A; port < n_ports; port++) {
1632 for (i = 0; i < n_dvo; i++) {
1633 if (port_mapping[port][i] == -1)
1636 if (dvo_port == port_mapping[port][i])
1644 static enum port dvo_port_to_port(struct drm_i915_private *dev_priv,
1648 * Each DDI port can have more than one value on the "DVO Port" field,
1649 * so look for all the possible values for each port.
1651 static const int port_mapping[][3] = {
1652 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1653 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1654 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1655 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1656 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
1657 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
1658 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
1659 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
1660 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
1663 * Bspec lists the ports as A, B, C, D - however internally in our
1664 * driver we keep them as PORT_A, PORT_B, PORT_D and PORT_E so the
1665 * registers in Display Engine match the right offsets. Apply the
1666 * mapping here to translate from VBT to internal convention.
1668 static const int rkl_port_mapping[][3] = {
1669 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
1670 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
1672 [PORT_D] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
1673 [PORT_E] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
1676 if (IS_ROCKETLAKE(dev_priv))
1677 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
1678 ARRAY_SIZE(rkl_port_mapping[0]),
1682 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
1683 ARRAY_SIZE(port_mapping[0]),
1688 static void parse_ddi_port(struct drm_i915_private *dev_priv,
1689 struct display_device_data *devdata,
1692 const struct child_device_config *child = &devdata->child;
1693 struct ddi_vbt_port_info *info;
1694 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
1697 port = dvo_port_to_port(dev_priv, child->dvo_port);
1698 if (port == PORT_NONE)
1701 info = &dev_priv->vbt.ddi_port_info[port];
1704 drm_dbg_kms(&dev_priv->drm,
1705 "More than one child device for port %c in VBT, using the first.\n",
1710 is_dvi = child->device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
1711 is_dp = child->device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
1712 is_crt = child->device_type & DEVICE_TYPE_ANALOG_OUTPUT;
1713 is_hdmi = is_dvi && (child->device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
1714 is_edp = is_dp && (child->device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
1716 if (port == PORT_A && is_dvi && INTEL_GEN(dev_priv) < 12) {
1717 drm_dbg_kms(&dev_priv->drm,
1718 "VBT claims port A supports DVI%s, ignoring\n",
1719 is_hdmi ? "/HDMI" : "");
1724 info->supports_dvi = is_dvi;
1725 info->supports_hdmi = is_hdmi;
1726 info->supports_dp = is_dp;
1727 info->supports_edp = is_edp;
1729 if (bdb_version >= 195)
1730 info->supports_typec_usb = child->dp_usb_type_c;
1732 if (bdb_version >= 209)
1733 info->supports_tbt = child->tbt;
1735 drm_dbg_kms(&dev_priv->drm,
1736 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
1737 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
1738 HAS_LSPCON(dev_priv) && child->lspcon,
1739 info->supports_typec_usb, info->supports_tbt,
1740 devdata->dsc != NULL);
1745 ddc_pin = map_ddc_pin(dev_priv, child->ddc_pin);
1746 if (intel_gmbus_is_valid_pin(dev_priv, ddc_pin)) {
1747 info->alternate_ddc_pin = ddc_pin;
1748 sanitize_ddc_pin(dev_priv, port);
1750 drm_dbg_kms(&dev_priv->drm,
1751 "Port %c has invalid DDC pin %d, "
1752 "sticking to defaults\n",
1753 port_name(port), ddc_pin);
1758 info->alternate_aux_channel = child->aux_channel;
1760 sanitize_aux_ch(dev_priv, port);
1763 if (bdb_version >= 158) {
1764 /* The VBT HDMI level shift values match the table we have. */
1765 u8 hdmi_level_shift = child->hdmi_level_shifter_value;
1766 drm_dbg_kms(&dev_priv->drm,
1767 "VBT HDMI level shift for port %c: %d\n",
1770 info->hdmi_level_shift = hdmi_level_shift;
1771 info->hdmi_level_shift_set = true;
1774 if (bdb_version >= 204) {
1777 switch (child->hdmi_max_data_rate) {
1779 MISSING_CASE(child->hdmi_max_data_rate);
1781 case HDMI_MAX_DATA_RATE_PLATFORM:
1784 case HDMI_MAX_DATA_RATE_297:
1785 max_tmds_clock = 297000;
1787 case HDMI_MAX_DATA_RATE_165:
1788 max_tmds_clock = 165000;
1793 drm_dbg_kms(&dev_priv->drm,
1794 "VBT HDMI max TMDS clock for port %c: %d kHz\n",
1795 port_name(port), max_tmds_clock);
1796 info->max_tmds_clock = max_tmds_clock;
1799 /* Parse the I_boost config for SKL and above */
1800 if (bdb_version >= 196 && child->iboost) {
1801 info->dp_boost_level = translate_iboost(child->dp_iboost_level);
1802 drm_dbg_kms(&dev_priv->drm,
1803 "VBT (e)DP boost level for port %c: %d\n",
1804 port_name(port), info->dp_boost_level);
1805 info->hdmi_boost_level = translate_iboost(child->hdmi_iboost_level);
1806 drm_dbg_kms(&dev_priv->drm,
1807 "VBT HDMI boost level for port %c: %d\n",
1808 port_name(port), info->hdmi_boost_level);
1811 /* DP max link rate for CNL+ */
1812 if (bdb_version >= 216) {
1813 switch (child->dp_max_link_rate) {
1815 case VBT_DP_MAX_LINK_RATE_HBR3:
1816 info->dp_max_link_rate = 810000;
1818 case VBT_DP_MAX_LINK_RATE_HBR2:
1819 info->dp_max_link_rate = 540000;
1821 case VBT_DP_MAX_LINK_RATE_HBR:
1822 info->dp_max_link_rate = 270000;
1824 case VBT_DP_MAX_LINK_RATE_LBR:
1825 info->dp_max_link_rate = 162000;
1828 drm_dbg_kms(&dev_priv->drm,
1829 "VBT DP max link rate for port %c: %d\n",
1830 port_name(port), info->dp_max_link_rate);
1833 info->child = child;
1836 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
1838 struct display_device_data *devdata;
1840 if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
1843 if (bdb_version < 155)
1846 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
1847 parse_ddi_port(dev_priv, devdata, bdb_version);
1851 parse_general_definitions(struct drm_i915_private *dev_priv,
1852 const struct bdb_header *bdb)
1854 const struct bdb_general_definitions *defs;
1855 struct display_device_data *devdata;
1856 const struct child_device_config *child;
1857 int i, child_device_num;
1862 defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1864 drm_dbg_kms(&dev_priv->drm,
1865 "No general definition block is found, no devices defined.\n");
1869 block_size = get_blocksize(defs);
1870 if (block_size < sizeof(*defs)) {
1871 drm_dbg_kms(&dev_priv->drm,
1872 "General definitions block too small (%u)\n",
1877 bus_pin = defs->crt_ddc_gmbus_pin;
1878 drm_dbg_kms(&dev_priv->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
1879 if (intel_gmbus_is_valid_pin(dev_priv, bus_pin))
1880 dev_priv->vbt.crt_ddc_pin = bus_pin;
1882 if (bdb->version < 106) {
1884 } else if (bdb->version < 111) {
1886 } else if (bdb->version < 195) {
1887 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
1888 } else if (bdb->version == 195) {
1890 } else if (bdb->version <= 215) {
1892 } else if (bdb->version <= 229) {
1895 expected_size = sizeof(*child);
1896 BUILD_BUG_ON(sizeof(*child) < 39);
1897 drm_dbg(&dev_priv->drm,
1898 "Expected child device config size for VBT version %u not known; assuming %u\n",
1899 bdb->version, expected_size);
1902 /* Flag an error for unexpected size, but continue anyway. */
1903 if (defs->child_dev_size != expected_size)
1904 drm_err(&dev_priv->drm,
1905 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
1906 defs->child_dev_size, expected_size, bdb->version);
1908 /* The legacy sized child device config is the minimum we need. */
1909 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
1910 drm_dbg_kms(&dev_priv->drm,
1911 "Child device config size %u is too small.\n",
1912 defs->child_dev_size);
1916 /* get the number of child device */
1917 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
1919 for (i = 0; i < child_device_num; i++) {
1920 child = child_device_ptr(defs, i);
1921 if (!child->device_type)
1924 drm_dbg_kms(&dev_priv->drm,
1925 "Found VBT child device with type 0x%x\n",
1926 child->device_type);
1928 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
1933 * Copy as much as we know (sizeof) and is available
1934 * (child_dev_size) of the child device config. Accessing the
1935 * data must depend on VBT version.
1937 memcpy(&devdata->child, child,
1938 min_t(size_t, defs->child_dev_size, sizeof(*child)));
1940 list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
1943 if (list_empty(&dev_priv->vbt.display_devices))
1944 drm_dbg_kms(&dev_priv->drm,
1945 "no child dev is parsed from VBT\n");
1948 /* Common defaults which may be overridden by VBT. */
1950 init_vbt_defaults(struct drm_i915_private *dev_priv)
1952 dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
1954 /* Default to having backlight */
1955 dev_priv->vbt.backlight.present = true;
1957 /* LFP panel data */
1958 dev_priv->vbt.lvds_dither = 1;
1960 /* SDVO panel data */
1961 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1963 /* general features */
1964 dev_priv->vbt.int_tv_support = 1;
1965 dev_priv->vbt.int_crt_support = 1;
1967 /* driver features */
1968 dev_priv->vbt.int_lvds_support = 1;
1970 /* Default to using SSC */
1971 dev_priv->vbt.lvds_use_ssc = 1;
1973 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1976 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
1977 !HAS_PCH_SPLIT(dev_priv));
1978 drm_dbg_kms(&dev_priv->drm, "Set default to SSC at %d kHz\n",
1979 dev_priv->vbt.lvds_ssc_freq);
1982 /* Defaults to initialize only if there is no VBT. */
1984 init_vbt_missing_defaults(struct drm_i915_private *dev_priv)
1988 for_each_port(port) {
1989 struct ddi_vbt_port_info *info =
1990 &dev_priv->vbt.ddi_port_info[port];
1991 enum phy phy = intel_port_to_phy(dev_priv, port);
1994 * VBT has the TypeC mode (native,TBT/USB) and we don't want
1997 if (intel_phy_is_tc(dev_priv, phy))
2000 info->supports_dvi = (port != PORT_A && port != PORT_E);
2001 info->supports_hdmi = info->supports_dvi;
2002 info->supports_dp = (port != PORT_E);
2003 info->supports_edp = (port == PORT_A);
2007 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2009 const void *_vbt = vbt;
2011 return _vbt + vbt->bdb_offset;
2015 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2016 * @buf: pointer to a buffer to validate
2017 * @size: size of the buffer
2019 * Returns true on valid VBT.
2021 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2023 const struct vbt_header *vbt = buf;
2024 const struct bdb_header *bdb;
2029 if (sizeof(struct vbt_header) > size) {
2030 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2034 if (memcmp(vbt->signature, "$VBT", 4)) {
2035 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2039 if (vbt->vbt_size > size) {
2040 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2044 size = vbt->vbt_size;
2046 if (range_overflows_t(size_t,
2048 sizeof(struct bdb_header),
2050 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2054 bdb = get_bdb_header(vbt);
2055 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2056 DRM_DEBUG_DRIVER("BDB incomplete\n");
2063 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *dev_priv)
2065 struct pci_dev *pdev = dev_priv->drm.pdev;
2066 void __iomem *p = NULL, *oprom;
2067 struct vbt_header *vbt;
2071 oprom = pci_map_rom(pdev, &size);
2075 /* Scour memory looking for the VBT signature. */
2076 for (i = 0; i + 4 < size; i += 4) {
2077 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2086 goto err_unmap_oprom;
2088 if (sizeof(struct vbt_header) > size) {
2089 drm_dbg(&dev_priv->drm, "VBT header incomplete\n");
2090 goto err_unmap_oprom;
2093 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2094 if (vbt_size > size) {
2095 drm_dbg(&dev_priv->drm,
2096 "VBT incomplete (vbt_size overflows)\n");
2097 goto err_unmap_oprom;
2100 /* The rest will be validated by intel_bios_is_valid_vbt() */
2101 vbt = kmalloc(vbt_size, GFP_KERNEL);
2103 goto err_unmap_oprom;
2105 memcpy_fromio(vbt, p, vbt_size);
2107 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2110 pci_unmap_rom(pdev, oprom);
2117 pci_unmap_rom(pdev, oprom);
2123 * intel_bios_init - find VBT and initialize settings from the BIOS
2124 * @dev_priv: i915 device instance
2126 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2127 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2128 * initialize some defaults if the VBT is not present at all.
2130 void intel_bios_init(struct drm_i915_private *dev_priv)
2132 const struct vbt_header *vbt = dev_priv->opregion.vbt;
2133 struct vbt_header *oprom_vbt = NULL;
2134 const struct bdb_header *bdb;
2136 INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
2138 if (!HAS_DISPLAY(dev_priv)) {
2139 drm_dbg_kms(&dev_priv->drm,
2140 "Skipping VBT init due to disabled display.\n");
2144 init_vbt_defaults(dev_priv);
2146 /* If the OpRegion does not have VBT, look in PCI ROM. */
2148 oprom_vbt = oprom_get_vbt(dev_priv);
2154 drm_dbg_kms(&dev_priv->drm, "Found valid VBT in PCI ROM\n");
2157 bdb = get_bdb_header(vbt);
2159 drm_dbg_kms(&dev_priv->drm,
2160 "VBT signature \"%.*s\", BDB version %d\n",
2161 (int)sizeof(vbt->signature), vbt->signature, bdb->version);
2163 /* Grab useful general definitions */
2164 parse_general_features(dev_priv, bdb);
2165 parse_general_definitions(dev_priv, bdb);
2166 parse_panel_options(dev_priv, bdb);
2167 parse_panel_dtd(dev_priv, bdb);
2168 parse_lfp_backlight(dev_priv, bdb);
2169 parse_sdvo_panel_data(dev_priv, bdb);
2170 parse_driver_features(dev_priv, bdb);
2171 parse_power_conservation_features(dev_priv, bdb);
2172 parse_edp(dev_priv, bdb);
2173 parse_psr(dev_priv, bdb);
2174 parse_mipi_config(dev_priv, bdb);
2175 parse_mipi_sequence(dev_priv, bdb);
2177 /* Depends on child device list */
2178 parse_compression_parameters(dev_priv, bdb);
2180 /* Further processing on pre-parsed data */
2181 parse_sdvo_device_mapping(dev_priv, bdb->version);
2182 parse_ddi_ports(dev_priv, bdb->version);
2186 drm_info(&dev_priv->drm,
2187 "Failed to find VBIOS tables (VBT)\n");
2188 init_vbt_missing_defaults(dev_priv);
2195 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2196 * @dev_priv: i915 device instance
2198 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
2200 struct display_device_data *devdata, *n;
2202 list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
2203 list_del(&devdata->node);
2204 kfree(devdata->dsc);
2208 kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
2209 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
2210 kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
2211 dev_priv->vbt.lfp_lvds_vbt_mode = NULL;
2212 kfree(dev_priv->vbt.dsi.data);
2213 dev_priv->vbt.dsi.data = NULL;
2214 kfree(dev_priv->vbt.dsi.pps);
2215 dev_priv->vbt.dsi.pps = NULL;
2216 kfree(dev_priv->vbt.dsi.config);
2217 dev_priv->vbt.dsi.config = NULL;
2218 kfree(dev_priv->vbt.dsi.deassert_seq);
2219 dev_priv->vbt.dsi.deassert_seq = NULL;
2223 * intel_bios_is_tv_present - is integrated TV present in VBT
2224 * @dev_priv: i915 device instance
2226 * Return true if TV is present. If no child devices were parsed from VBT,
2227 * assume TV is present.
2229 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
2231 const struct display_device_data *devdata;
2232 const struct child_device_config *child;
2234 if (!dev_priv->vbt.int_tv_support)
2237 if (list_empty(&dev_priv->vbt.display_devices))
2240 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2241 child = &devdata->child;
2244 * If the device type is not TV, continue.
2246 switch (child->device_type) {
2247 case DEVICE_TYPE_INT_TV:
2248 case DEVICE_TYPE_TV:
2249 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2254 /* Only when the addin_offset is non-zero, it is regarded
2257 if (child->addin_offset)
2265 * intel_bios_is_lvds_present - is LVDS present in VBT
2266 * @dev_priv: i915 device instance
2267 * @i2c_pin: i2c pin for LVDS if present
2269 * Return true if LVDS is present. If no child devices were parsed from VBT,
2270 * assume LVDS is present.
2272 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
2274 const struct display_device_data *devdata;
2275 const struct child_device_config *child;
2277 if (list_empty(&dev_priv->vbt.display_devices))
2280 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2281 child = &devdata->child;
2283 /* If the device type is not LFP, continue.
2284 * We have to check both the new identifiers as well as the
2285 * old for compatibility with some BIOSes.
2287 if (child->device_type != DEVICE_TYPE_INT_LFP &&
2288 child->device_type != DEVICE_TYPE_LFP)
2291 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
2292 *i2c_pin = child->i2c_pin;
2294 /* However, we cannot trust the BIOS writers to populate
2295 * the VBT correctly. Since LVDS requires additional
2296 * information from AIM blocks, a non-zero addin offset is
2297 * a good indicator that the LVDS is actually present.
2299 if (child->addin_offset)
2302 /* But even then some BIOS writers perform some black magic
2303 * and instantiate the device without reference to any
2304 * additional data. Trust that if the VBT was written into
2305 * the OpRegion then they have validated the LVDS's existence.
2307 if (dev_priv->opregion.vbt)
2315 * intel_bios_is_port_present - is the specified digital port present
2316 * @dev_priv: i915 device instance
2317 * @port: port to check
2319 * Return true if the device in %port is present.
2321 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
2323 const struct display_device_data *devdata;
2324 const struct child_device_config *child;
2325 static const struct {
2327 } port_mapping[] = {
2328 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2329 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2330 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2331 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2332 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2335 if (HAS_DDI(dev_priv)) {
2336 const struct ddi_vbt_port_info *port_info =
2337 &dev_priv->vbt.ddi_port_info[port];
2339 return port_info->child;
2342 /* FIXME maybe deal with port A as well? */
2343 if (drm_WARN_ON(&dev_priv->drm,
2344 port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
2347 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2348 child = &devdata->child;
2350 if ((child->dvo_port == port_mapping[port].dp ||
2351 child->dvo_port == port_mapping[port].hdmi) &&
2352 (child->device_type & (DEVICE_TYPE_TMDS_DVI_SIGNALING |
2353 DEVICE_TYPE_DISPLAYPORT_OUTPUT)))
2361 * intel_bios_is_port_edp - is the device in given port eDP
2362 * @dev_priv: i915 device instance
2363 * @port: port to check
2365 * Return true if the device in %port is eDP.
2367 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
2369 const struct display_device_data *devdata;
2370 const struct child_device_config *child;
2371 static const short port_mapping[] = {
2372 [PORT_B] = DVO_PORT_DPB,
2373 [PORT_C] = DVO_PORT_DPC,
2374 [PORT_D] = DVO_PORT_DPD,
2375 [PORT_E] = DVO_PORT_DPE,
2376 [PORT_F] = DVO_PORT_DPF,
2379 if (HAS_DDI(dev_priv))
2380 return dev_priv->vbt.ddi_port_info[port].supports_edp;
2382 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2383 child = &devdata->child;
2385 if (child->dvo_port == port_mapping[port] &&
2386 (child->device_type & DEVICE_TYPE_eDP_BITS) ==
2387 (DEVICE_TYPE_eDP & DEVICE_TYPE_eDP_BITS))
2394 static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
2397 static const struct {
2399 } port_mapping[] = {
2401 * Buggy VBTs may declare DP ports as having
2402 * HDMI type dvo_port :( So let's check both.
2404 [PORT_B] = { DVO_PORT_DPB, DVO_PORT_HDMIB, },
2405 [PORT_C] = { DVO_PORT_DPC, DVO_PORT_HDMIC, },
2406 [PORT_D] = { DVO_PORT_DPD, DVO_PORT_HDMID, },
2407 [PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
2408 [PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
2411 if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
2414 if ((child->device_type & DEVICE_TYPE_DP_DUAL_MODE_BITS) !=
2415 (DEVICE_TYPE_DP_DUAL_MODE & DEVICE_TYPE_DP_DUAL_MODE_BITS))
2418 if (child->dvo_port == port_mapping[port].dp)
2421 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
2422 if (child->dvo_port == port_mapping[port].hdmi &&
2423 child->aux_channel != 0)
2429 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
2432 const struct display_device_data *devdata;
2434 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2435 if (child_dev_is_dp_dual_mode(&devdata->child, port))
2443 * intel_bios_is_dsi_present - is DSI present in VBT
2444 * @dev_priv: i915 device instance
2445 * @port: port for DSI if present
2447 * Return true if DSI is present, and return the port in %port.
2449 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
2452 const struct display_device_data *devdata;
2453 const struct child_device_config *child;
2456 list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
2457 child = &devdata->child;
2459 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2462 dvo_port = child->dvo_port;
2464 if (dvo_port == DVO_PORT_MIPIA ||
2465 (dvo_port == DVO_PORT_MIPIB && INTEL_GEN(dev_priv) >= 11) ||
2466 (dvo_port == DVO_PORT_MIPIC && INTEL_GEN(dev_priv) < 11)) {
2468 *port = dvo_port - DVO_PORT_MIPIA;
2470 } else if (dvo_port == DVO_PORT_MIPIB ||
2471 dvo_port == DVO_PORT_MIPIC ||
2472 dvo_port == DVO_PORT_MIPID) {
2473 drm_dbg_kms(&dev_priv->drm,
2474 "VBT has unsupported DSI port %c\n",
2475 port_name(dvo_port - DVO_PORT_MIPIA));
2482 static void fill_dsc(struct intel_crtc_state *crtc_state,
2483 struct dsc_compression_parameters_entry *dsc,
2486 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
2489 vdsc_cfg->dsc_version_major = dsc->version_major;
2490 vdsc_cfg->dsc_version_minor = dsc->version_minor;
2492 if (dsc->support_12bpc && dsc_max_bpc >= 12)
2494 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
2496 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
2499 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
2502 crtc_state->pipe_bpp = bpc * 3;
2504 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
2505 VBT_DSC_MAX_BPP(dsc->max_bpp));
2508 * FIXME: This is ugly, and slice count should take DSC engine
2509 * throughput etc. into account.
2511 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
2513 if (dsc->slices_per_line & BIT(2)) {
2514 crtc_state->dsc.slice_count = 4;
2515 } else if (dsc->slices_per_line & BIT(1)) {
2516 crtc_state->dsc.slice_count = 2;
2519 if (!(dsc->slices_per_line & BIT(0)))
2520 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
2522 crtc_state->dsc.slice_count = 1;
2525 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
2526 crtc_state->dsc.slice_count != 0)
2527 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
2528 crtc_state->hw.adjusted_mode.crtc_hdisplay,
2529 crtc_state->dsc.slice_count);
2532 * FIXME: Use VBT rc_buffer_block_size and rc_buffer_size for the
2533 * implementation specific physical rate buffer size. Currently we use
2534 * the required rate buffer model size calculated in
2535 * drm_dsc_compute_rc_parameters() according to VESA DSC Annex E.
2537 * The VBT rc_buffer_block_size and rc_buffer_size definitions
2538 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63. The DP DSC
2539 * implementation should also use the DPCD (or perhaps VBT for eDP)
2540 * provided value for the buffer size.
2543 /* FIXME: DSI spec says bpc + 1 for this one */
2544 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
2546 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
2548 vdsc_cfg->slice_height = dsc->slice_height;
2551 /* FIXME: initially DSI specific */
2552 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
2553 struct intel_crtc_state *crtc_state,
2556 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2557 const struct display_device_data *devdata;
2558 const struct child_device_config *child;
2560 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2561 child = &devdata->child;
2563 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
2566 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
2571 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
2581 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
2582 * @i915: i915 device instance
2583 * @port: port to check
2585 * Return true if HPD should be inverted for %port.
2588 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
2591 const struct child_device_config *child =
2592 i915->vbt.ddi_port_info[port].child;
2594 if (drm_WARN_ON_ONCE(&i915->drm, !IS_GEN9_LP(i915)))
2597 return child && child->hpd_invert;
2601 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
2602 * @i915: i915 device instance
2603 * @port: port to check
2605 * Return true if LSPCON is present on this port
2608 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
2611 const struct child_device_config *child =
2612 i915->vbt.ddi_port_info[port].child;
2614 return HAS_LSPCON(i915) && child && child->lspcon;
2617 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv,
2620 const struct ddi_vbt_port_info *info =
2621 &dev_priv->vbt.ddi_port_info[port];
2624 if (!info->alternate_aux_channel) {
2625 aux_ch = (enum aux_ch)port;
2627 drm_dbg_kms(&dev_priv->drm,
2628 "using AUX %c for port %c (platform default)\n",
2629 aux_ch_name(aux_ch), port_name(port));
2633 switch (info->alternate_aux_channel) {
2641 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_D : AUX_CH_C;
2644 aux_ch = IS_ROCKETLAKE(dev_priv) ? AUX_CH_E : AUX_CH_D;
2662 MISSING_CASE(info->alternate_aux_channel);
2667 drm_dbg_kms(&dev_priv->drm, "using AUX %c for port %c (VBT)\n",
2668 aux_ch_name(aux_ch), port_name(port));
2673 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
2675 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2677 return i915->vbt.ddi_port_info[encoder->port].max_tmds_clock;
2680 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
2682 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2683 const struct ddi_vbt_port_info *info =
2684 &i915->vbt.ddi_port_info[encoder->port];
2686 return info->hdmi_level_shift_set ? info->hdmi_level_shift : -1;
2689 int intel_bios_dp_boost_level(struct intel_encoder *encoder)
2691 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2693 return i915->vbt.ddi_port_info[encoder->port].dp_boost_level;
2696 int intel_bios_hdmi_boost_level(struct intel_encoder *encoder)
2698 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2700 return i915->vbt.ddi_port_info[encoder->port].hdmi_boost_level;
2703 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
2705 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2707 return i915->vbt.ddi_port_info[encoder->port].dp_max_link_rate;
2710 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
2712 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
2714 return i915->vbt.ddi_port_info[encoder->port].alternate_ddc_pin;
2717 bool intel_bios_port_supports_dvi(struct drm_i915_private *i915, enum port port)
2719 return i915->vbt.ddi_port_info[port].supports_dvi;
2722 bool intel_bios_port_supports_hdmi(struct drm_i915_private *i915, enum port port)
2724 return i915->vbt.ddi_port_info[port].supports_hdmi;
2727 bool intel_bios_port_supports_dp(struct drm_i915_private *i915, enum port port)
2729 return i915->vbt.ddi_port_info[port].supports_dp;
2732 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915,
2735 return i915->vbt.ddi_port_info[port].supports_typec_usb;
2738 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port port)
2740 return i915->vbt.ddi_port_info[port].supports_tbt;