2 * Copyright (C) 2006-2010 Michael Buesch <mb@bu3sch.de>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2
6 * as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
25 struct bin_instruction {
27 unsigned int operands[3];
38 struct bin_instruction *bin;
40 const char *operands[5];
43 unsigned int labeladdr;
44 struct statement *labelref;
51 struct list_head list;
54 struct disassembler_context {
55 /* The architecture of the input file. */
58 struct bin_instruction *code;
61 struct list_head stmt_list;
67 const char *infile_name;
68 const char *outfile_name;
71 #define _msg_helper(type, msg, x...) do { \
72 fprintf(stderr, "Disassembler " type \
73 ":\n " msg "\n" ,##x); \
76 #define dasm_error(msg, x...) do { \
77 _msg_helper("ERROR", msg ,##x); \
81 #define dasm_int_error(msg, x...) \
82 dasm_error("Internal error (bug): " msg ,##x)
84 #define dasm_warn(msg, x...) \
85 _msg_helper("warning", msg ,##x)
87 #define asm_info(msg, x...) \
88 _msg_helper("info", msg ,##x)
90 static const char * gen_raw_code(unsigned int operand)
95 snprintf(ret, 6, "@%X", operand);
100 static const char * disasm_mem_operand(unsigned int operand)
105 snprintf(ret, 9, "[0x%X]", operand);
110 static const char * disasm_indirect_mem_operand(unsigned int operand)
113 unsigned int offset, reg;
115 switch (cmdargs.arch) {
117 offset = (operand & 0x3F);
118 reg = ((operand >> 6) & 0x7);
121 offset = (operand & 0x7F);
122 reg = ((operand >> 7) & 0x7);
125 dasm_int_error("disasm_indirect_mem_operand invalid arch");
128 snprintf(ret, 12, "[0x%02X,off%u]", offset, reg);
133 static const char * disasm_imm_operand(unsigned int operand)
136 unsigned int signmask;
139 switch (cmdargs.arch) {
145 signmask = (1 << 10);
149 dasm_int_error("disasm_imm_operand invalid arch");
155 if (operand & signmask)
156 operand = (operand | (~mask & 0xFFFF));
157 snprintf(ret, 7, "0x%X", operand);
162 static const char * disasm_spr_operand(unsigned int operand)
167 switch (cmdargs.arch) {
175 dasm_int_error("disasm_spr_operand invalid arch");
179 snprintf(ret, 8, "spr%X", (operand & mask));
184 static const char * disasm_gpr_operand(unsigned int operand)
189 switch (cmdargs.arch) {
197 dasm_int_error("disasm_gpr_operand invalid arch");
201 snprintf(ret, 5, "r%u", (operand & mask));
206 static void disasm_raw_operand(struct statement *stmt,
210 unsigned int operand = stmt->u.insn.bin->operands[oper_idx];
212 stmt->u.insn.operands[out_idx] = gen_raw_code(operand);
215 static void disasm_std_operand(struct statement *stmt,
219 unsigned int operand = stmt->u.insn.bin->operands[oper_idx];
221 switch (cmdargs.arch) {
223 if (!(operand & 0x800)) {
224 stmt->u.insn.operands[out_idx] = disasm_mem_operand(operand);
226 } else if ((operand & 0xC00) == 0xC00) {
227 stmt->u.insn.operands[out_idx] = disasm_imm_operand(operand);
229 } else if ((operand & 0xFC0) == 0xBC0) {
230 stmt->u.insn.operands[out_idx] = disasm_gpr_operand(operand);
232 } else if ((operand & 0xE00) == 0x800) {
233 stmt->u.insn.operands[out_idx] = disasm_spr_operand(operand);
235 } else if ((operand & 0xE00) == 0xA00) {
236 stmt->u.insn.operands[out_idx] = disasm_indirect_mem_operand(operand);
241 if (!(operand & 0x1000)) {
242 stmt->u.insn.operands[out_idx] = disasm_mem_operand(operand);
244 } else if ((operand & 0x1800) == 0x1800) {
245 stmt->u.insn.operands[out_idx] = disasm_imm_operand(operand);
247 } else if ((operand & 0x1F80) == 0x1780) {
248 stmt->u.insn.operands[out_idx] = disasm_gpr_operand(operand);
250 } else if ((operand & 0x1C00) == 0x1000) {
251 stmt->u.insn.operands[out_idx] = disasm_spr_operand(operand);
253 } else if ((operand & 0x1C00) == 0x1400) {
254 stmt->u.insn.operands[out_idx] = disasm_indirect_mem_operand(operand);
259 dasm_int_error("disasm_std_operand invalid arch");
261 /* No luck. Disassemble to raw operand. */
262 disasm_raw_operand(stmt, oper_idx, out_idx);
265 static void disasm_opcode_raw(struct disassembler_context *ctx,
266 struct statement *stmt,
269 stmt->u.insn.name = gen_raw_code(stmt->u.insn.bin->opcode);
271 disasm_raw_operand(stmt, 0, 0);
272 disasm_raw_operand(stmt, 1, 1);
273 disasm_raw_operand(stmt, 2, 2);
275 disasm_std_operand(stmt, 0, 0);
276 disasm_std_operand(stmt, 1, 1);
277 disasm_std_operand(stmt, 2, 2);
281 static void disasm_constant_opcodes(struct disassembler_context *ctx,
282 struct statement *stmt)
284 struct bin_instruction *bin = stmt->u.insn.bin;
286 switch (bin->opcode) {
288 stmt->u.insn.name = "add";
289 disasm_std_operand(stmt, 0, 0);
290 disasm_std_operand(stmt, 1, 1);
291 disasm_std_operand(stmt, 2, 2);
294 stmt->u.insn.name = "add.";
295 disasm_std_operand(stmt, 0, 0);
296 disasm_std_operand(stmt, 1, 1);
297 disasm_std_operand(stmt, 2, 2);
300 stmt->u.insn.name = "addc";
301 disasm_std_operand(stmt, 0, 0);
302 disasm_std_operand(stmt, 1, 1);
303 disasm_std_operand(stmt, 2, 2);
306 stmt->u.insn.name = "addc.";
307 disasm_std_operand(stmt, 0, 0);
308 disasm_std_operand(stmt, 1, 1);
309 disasm_std_operand(stmt, 2, 2);
312 stmt->u.insn.name = "sub";
313 disasm_std_operand(stmt, 0, 0);
314 disasm_std_operand(stmt, 1, 1);
315 disasm_std_operand(stmt, 2, 2);
318 stmt->u.insn.name = "sub.";
319 disasm_std_operand(stmt, 0, 0);
320 disasm_std_operand(stmt, 1, 1);
321 disasm_std_operand(stmt, 2, 2);
324 stmt->u.insn.name = "subc";
325 disasm_std_operand(stmt, 0, 0);
326 disasm_std_operand(stmt, 1, 1);
327 disasm_std_operand(stmt, 2, 2);
330 stmt->u.insn.name = "subc.";
331 disasm_std_operand(stmt, 0, 0);
332 disasm_std_operand(stmt, 1, 1);
333 disasm_std_operand(stmt, 2, 2);
336 stmt->u.insn.name = "sra";
337 disasm_std_operand(stmt, 0, 0);
338 disasm_std_operand(stmt, 1, 1);
339 disasm_std_operand(stmt, 2, 2);
342 stmt->u.insn.name = "or";
343 disasm_std_operand(stmt, 0, 0);
344 disasm_std_operand(stmt, 1, 1);
345 disasm_std_operand(stmt, 2, 2);
348 stmt->u.insn.name = "and";
349 disasm_std_operand(stmt, 0, 0);
350 disasm_std_operand(stmt, 1, 1);
351 disasm_std_operand(stmt, 2, 2);
354 stmt->u.insn.name = "xor";
355 disasm_std_operand(stmt, 0, 0);
356 disasm_std_operand(stmt, 1, 1);
357 disasm_std_operand(stmt, 2, 2);
360 stmt->u.insn.name = "sr";
361 disasm_std_operand(stmt, 0, 0);
362 disasm_std_operand(stmt, 1, 1);
363 disasm_std_operand(stmt, 2, 2);
366 stmt->u.insn.name = "sl";
367 disasm_std_operand(stmt, 0, 0);
368 disasm_std_operand(stmt, 1, 1);
369 disasm_std_operand(stmt, 2, 2);
372 stmt->u.insn.name = "rl";
373 disasm_std_operand(stmt, 0, 0);
374 disasm_std_operand(stmt, 1, 1);
375 disasm_std_operand(stmt, 2, 2);
378 stmt->u.insn.name = "rr";
379 disasm_std_operand(stmt, 0, 0);
380 disasm_std_operand(stmt, 1, 1);
381 disasm_std_operand(stmt, 2, 2);
384 stmt->u.insn.name = "nand";
385 disasm_std_operand(stmt, 0, 0);
386 disasm_std_operand(stmt, 1, 1);
387 disasm_std_operand(stmt, 2, 2);
390 stmt->u.insn.name = "jand";
391 stmt->u.insn.is_labelref = 2;
392 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
393 disasm_std_operand(stmt, 0, 0);
394 disasm_std_operand(stmt, 1, 1);
397 stmt->u.insn.name = "jnand";
398 stmt->u.insn.is_labelref = 2;
399 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
400 disasm_std_operand(stmt, 0, 0);
401 disasm_std_operand(stmt, 1, 1);
404 stmt->u.insn.name = "js";
405 stmt->u.insn.is_labelref = 2;
406 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
407 disasm_std_operand(stmt, 0, 0);
408 disasm_std_operand(stmt, 1, 1);
411 stmt->u.insn.name = "jns";
412 stmt->u.insn.is_labelref = 2;
413 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
414 disasm_std_operand(stmt, 0, 0);
415 disasm_std_operand(stmt, 1, 1);
418 stmt->u.insn.name = "je";
419 stmt->u.insn.is_labelref = 2;
420 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
421 disasm_std_operand(stmt, 0, 0);
422 disasm_std_operand(stmt, 1, 1);
425 stmt->u.insn.name = "jne";
426 stmt->u.insn.is_labelref = 2;
427 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
428 disasm_std_operand(stmt, 0, 0);
429 disasm_std_operand(stmt, 1, 1);
432 stmt->u.insn.name = "jls";
433 stmt->u.insn.is_labelref = 2;
434 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
435 disasm_std_operand(stmt, 0, 0);
436 disasm_std_operand(stmt, 1, 1);
439 stmt->u.insn.name = "jges";
440 stmt->u.insn.is_labelref = 2;
441 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
442 disasm_std_operand(stmt, 0, 0);
443 disasm_std_operand(stmt, 1, 1);
446 stmt->u.insn.name = "jgs";
447 stmt->u.insn.is_labelref = 2;
448 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
449 disasm_std_operand(stmt, 0, 0);
450 disasm_std_operand(stmt, 1, 1);
453 stmt->u.insn.name = "jles";
454 stmt->u.insn.is_labelref = 2;
455 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
456 disasm_std_operand(stmt, 0, 0);
457 disasm_std_operand(stmt, 1, 1);
460 stmt->u.insn.name = "jl";
461 stmt->u.insn.is_labelref = 2;
462 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
463 disasm_std_operand(stmt, 0, 0);
464 disasm_std_operand(stmt, 1, 1);
467 stmt->u.insn.name = "jge";
468 stmt->u.insn.is_labelref = 2;
469 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
470 disasm_std_operand(stmt, 0, 0);
471 disasm_std_operand(stmt, 1, 1);
474 stmt->u.insn.name = "jg";
475 stmt->u.insn.is_labelref = 2;
476 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
477 disasm_std_operand(stmt, 0, 0);
478 disasm_std_operand(stmt, 1, 1);
481 stmt->u.insn.name = "jle";
482 stmt->u.insn.is_labelref = 2;
483 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
484 disasm_std_operand(stmt, 0, 0);
485 disasm_std_operand(stmt, 1, 1);
490 switch (cmdargs.arch) {
492 stmt->u.insn.name = "call";
493 stmt->u.insn.is_labelref = 1;
494 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
496 snprintf(str, 4, "lr%u", stmt->u.insn.bin->operands[0]);
497 stmt->u.insn.operands[0] = str;
500 //FIXME: This opcode is different on r15. Decode raw for now.
501 disasm_opcode_raw(ctx, stmt, 1);
509 stmt->u.insn.name = "ret";
511 snprintf(str, 4, "lr%u", stmt->u.insn.bin->operands[0]);
512 stmt->u.insn.operands[0] = str;
514 snprintf(str, 4, "lr%u", stmt->u.insn.bin->operands[2]);
515 stmt->u.insn.operands[2] = str;
519 if (cmdargs.arch != 15) {
520 dasm_error("arch 15 'calls' instruction found in arch %d binary",
523 stmt->u.insn.name = "calls";
524 stmt->u.insn.is_labelref = 0;
525 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
526 if (stmt->u.insn.bin->operands[0] != 0x1780 ||
527 stmt->u.insn.bin->operands[1] != 0x1780)
528 dasm_warn("r15 calls: Invalid first or second argument");
532 if (cmdargs.arch != 15) {
533 dasm_error("arch 15 'rets' instruction found in arch %d binary",
536 stmt->u.insn.name = "rets";
537 if (stmt->u.insn.bin->operands[0] != 0x1780 ||
538 stmt->u.insn.bin->operands[1] != 0x1780 ||
539 stmt->u.insn.bin->operands[2] != 0)
540 dasm_warn("r15 rets: Invalid argument(s)");
544 unsigned int flags, mask;
546 switch (cmdargs.arch) {
554 dasm_int_error("TKIP invalid arch");
557 flags = stmt->u.insn.bin->operands[1];
558 switch (flags & mask) {
560 stmt->u.insn.name = "tkiph";
563 stmt->u.insn.name = "tkiphs";
566 stmt->u.insn.name = "tkipl";
569 stmt->u.insn.name = "tkipls";
572 dasm_error("Invalid TKIP flags %X", flags);
574 disasm_std_operand(stmt, 0, 0);
575 disasm_std_operand(stmt, 2, 2);
581 stmt->u.insn.name = "nap";
582 switch (cmdargs.arch) {
590 dasm_int_error("NAP invalid arch");
592 if (stmt->u.insn.bin->operands[0] != mask) {
593 dasm_warn("NAP: invalid first argument 0x%04X\n",
594 stmt->u.insn.bin->operands[0]);
596 if (stmt->u.insn.bin->operands[1] != mask) {
597 dasm_warn("NAP: invalid second argument 0x%04X\n",
598 stmt->u.insn.bin->operands[1]);
600 if (stmt->u.insn.bin->operands[2] != 0) {
601 dasm_warn("NAP: invalid third argument 0x%04X\n",
602 stmt->u.insn.bin->operands[2]);
607 disasm_opcode_raw(ctx, stmt, 1);
610 disasm_opcode_raw(ctx, stmt, (cmdargs.unknown_decode == 0));
615 static void disasm_opcodes(struct disassembler_context *ctx)
617 struct bin_instruction *bin;
619 struct statement *stmt;
622 for (i = 0; i < ctx->nr_insns; i++) {
623 bin = &(ctx->code[i]);
625 stmt = xmalloc(sizeof(struct statement));
626 stmt->type = STMT_INSN;
627 INIT_LIST_HEAD(&stmt->list);
628 stmt->u.insn.bin = bin;
629 stmt->u.insn.is_labelref = -1;
631 switch (bin->opcode & 0xF00) {
633 stmt->u.insn.name = "srx";
636 snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
637 stmt->u.insn.operands[0] = str;
639 snprintf(str, 3, "%d", (bin->opcode & 0x00F));
640 stmt->u.insn.operands[1] = str;
642 disasm_std_operand(stmt, 0, 2);
643 disasm_std_operand(stmt, 1, 3);
644 disasm_std_operand(stmt, 2, 4);
647 stmt->u.insn.name = "orx";
650 snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
651 stmt->u.insn.operands[0] = str;
653 snprintf(str, 3, "%d", (bin->opcode & 0x00F));
654 stmt->u.insn.operands[1] = str;
656 disasm_std_operand(stmt, 0, 2);
657 disasm_std_operand(stmt, 1, 3);
658 disasm_std_operand(stmt, 2, 4);
661 stmt->u.insn.name = "jzx";
664 snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
665 stmt->u.insn.operands[0] = str;
667 snprintf(str, 3, "%d", (bin->opcode & 0x00F));
668 stmt->u.insn.operands[1] = str;
670 disasm_std_operand(stmt, 0, 2);
671 disasm_std_operand(stmt, 1, 3);
672 stmt->u.insn.is_labelref = 4;
673 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
676 stmt->u.insn.name = "jnzx";
679 snprintf(str, 3, "%d", (bin->opcode & 0x0F0) >> 4);
680 stmt->u.insn.operands[0] = str;
682 snprintf(str, 3, "%d", (bin->opcode & 0x00F));
683 stmt->u.insn.operands[1] = str;
685 disasm_std_operand(stmt, 0, 2);
686 disasm_std_operand(stmt, 1, 3);
687 stmt->u.insn.is_labelref = 4;
688 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
691 stmt->u.insn.name = "jnext";
694 snprintf(str, 5, "0x%02X", (bin->opcode & 0x0FF));
695 stmt->u.insn.operands[0] = str;
697 /* We don't disassemble the first and second operand, as
698 * that always is a dummy r0 operand.
699 * disasm_std_operand(stmt, 0, 1);
700 * disasm_std_operand(stmt, 1, 2);
701 * stmt->u.insn.is_labelref = 3;
703 stmt->u.insn.is_labelref = 1;
704 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
707 stmt->u.insn.name = "jext";
710 snprintf(str, 5, "0x%02X", (bin->opcode & 0x0FF));
711 stmt->u.insn.operands[0] = str;
713 /* We don't disassemble the first and second operand, as
714 * that always is a dummy r0 operand.
715 * disasm_std_operand(stmt, 0, 1);
716 * disasm_std_operand(stmt, 1, 2);
717 * stmt->u.insn.is_labelref = 3;
719 stmt->u.insn.is_labelref = 1;
720 stmt->u.insn.labeladdr = stmt->u.insn.bin->operands[2];
723 disasm_constant_opcodes(ctx, stmt);
727 list_add_tail(&stmt->list, &ctx->stmt_list);
731 static struct statement * get_label_at(struct disassembler_context *ctx,
734 unsigned int addrcnt = 0;
735 struct statement *stmt, *ret, *prev;
737 list_for_each_entry(stmt, &ctx->stmt_list, list) {
738 if (stmt->type != STMT_INSN)
740 if (addrcnt == addr) {
741 prev = list_entry(stmt->list.prev, struct statement, list);
742 if (prev->type == STMT_LABEL)
744 ret = xmalloc(sizeof(struct statement));
745 INIT_LIST_HEAD(&ret->list);
746 ret->type = STMT_LABEL;
747 list_add(&ret->list, &prev->list);
757 static void resolve_labels(struct disassembler_context *ctx)
759 struct statement *stmt;
760 struct statement *label;
762 unsigned int labeladdr;
763 unsigned int namecnt = 0;
765 /* Resolve label references */
766 list_for_each_entry_safe(stmt, n, &ctx->stmt_list, list) {
767 if (stmt->type != STMT_INSN)
769 if (stmt->u.insn.is_labelref == -1)
771 labeladdr = stmt->u.insn.labeladdr;
772 label = get_label_at(ctx, labeladdr);
774 dasm_error("Labeladdress %X out of bounds", labeladdr);
775 stmt->u.insn.labelref = label;
778 /* Name the labels */
779 list_for_each_entry(stmt, &ctx->stmt_list, list) {
780 if (stmt->type != STMT_LABEL)
782 stmt->u.label.name = xmalloc(20);
783 snprintf(stmt->u.label.name, 20, "L%u", namecnt);
788 static void emit_asm(struct disassembler_context *ctx)
790 struct statement *stmt;
793 unsigned int i, addr = 0;
795 err = open_output_file();
799 fprintf(outfile, "%%arch %u\n", ctx->arch);
800 fprintf(outfile, "%%start entry\n\n");
801 fprintf(outfile, "entry:\n");
802 list_for_each_entry(stmt, &ctx->stmt_list, list) {
803 switch (stmt->type) {
805 if (cmdargs.print_addresses)
806 fprintf(outfile, "/* %04X */", addr);
807 fprintf(outfile, "\t%s", stmt->u.insn.name);
809 for (i = 0; i < ARRAY_SIZE(stmt->u.insn.operands); i++) {
810 if (!stmt->u.insn.operands[i] &&
811 (stmt->u.insn.is_labelref < 0 ||
812 (unsigned int)stmt->u.insn.is_labelref != i))
815 fprintf(outfile, "\t");
817 fprintf(outfile, ", ");
819 if (stmt->u.insn.is_labelref >= 0 &&
820 (unsigned int)stmt->u.insn.is_labelref == i) {
821 fprintf(outfile, "%s",
822 stmt->u.insn.labelref->u.label.name);
824 fprintf(outfile, "%s",
825 stmt->u.insn.operands[i]);
828 fprintf(outfile, "\n");
832 fprintf(outfile, "%s:\n", stmt->u.label.name);
840 static int read_input(struct disassembler_context *ctx)
842 size_t size = 0, pos = 0;
844 struct bin_instruction *code = NULL;
845 unsigned char tmp[sizeof(uint64_t)];
847 struct fw_header hdr;
850 err = open_input_file();
854 switch (cmdargs.informat) {
860 ret = fread(&hdr, 1, sizeof(hdr), infile);
861 if (ret != sizeof(hdr)) {
862 fprintf(stderr, "Corrupt input file (no b43 header found)\n");
865 if (hdr.type != FW_TYPE_UCODE) {
866 fprintf(stderr, "Corrupt input file. Not a b43 microcode image.\n");
869 if (hdr.ver != FW_HDR_VER) {
870 fprintf(stderr, "Invalid input file header version.\n");
879 code = xrealloc(code, size * sizeof(struct bin_instruction));
881 ret = fread(tmp, 1, sizeof(uint64_t), infile);
884 if (ret != sizeof(uint64_t)) {
885 fprintf(stderr, "Corrupt input file (not 8 byte aligned)\n");
889 switch (cmdargs.informat) {
893 codeword |= ((uint64_t)tmp[0]) << 56;
894 codeword |= ((uint64_t)tmp[1]) << 48;
895 codeword |= ((uint64_t)tmp[2]) << 40;
896 codeword |= ((uint64_t)tmp[3]) << 32;
897 codeword |= ((uint64_t)tmp[4]) << 24;
898 codeword |= ((uint64_t)tmp[5]) << 16;
899 codeword |= ((uint64_t)tmp[6]) << 8;
900 codeword |= ((uint64_t)tmp[7]);
901 codeword = ((codeword & (uint64_t)0xFFFFFFFF00000000ULL) >> 32) |
902 ((codeword & (uint64_t)0x00000000FFFFFFFFULL) << 32);
906 codeword |= ((uint64_t)tmp[7]) << 56;
907 codeword |= ((uint64_t)tmp[6]) << 48;
908 codeword |= ((uint64_t)tmp[5]) << 40;
909 codeword |= ((uint64_t)tmp[4]) << 32;
910 codeword |= ((uint64_t)tmp[3]) << 24;
911 codeword |= ((uint64_t)tmp[2]) << 16;
912 codeword |= ((uint64_t)tmp[1]) << 8;
913 codeword |= ((uint64_t)tmp[0]);
917 switch (cmdargs.arch) {
919 if (codeword >> 48) {
920 fprintf(stderr, "Instruction format error at 0x%X (upper not clear). "
921 "Wrong input format or architecture?\n", (unsigned int)pos);
924 code[pos].opcode = (codeword >> 36) & 0xFFF;
925 code[pos].operands[2] = codeword & 0xFFF;
926 code[pos].operands[1] = (codeword >> 12) & 0xFFF;
927 code[pos].operands[0] = (codeword >> 24) & 0xFFF;
930 if (codeword >> 51) {
931 fprintf(stderr, "Instruction format error at 0x%X (upper not clear). "
932 "Wrong input format or architecture?\n", (unsigned int)pos);
935 code[pos].opcode = (codeword >> 39) & 0xFFF;
936 code[pos].operands[2] = codeword & 0x1FFF;
937 code[pos].operands[1] = (codeword >> 13) & 0x1FFF;
938 code[pos].operands[0] = (codeword >> 26) & 0x1FFF;
941 fprintf(stderr, "Internal error: read_input unknown arch %u\n",
964 static void disassemble(void)
966 struct disassembler_context ctx;
969 memset(&ctx, 0, sizeof(ctx));
970 INIT_LIST_HEAD(&ctx.stmt_list);
971 ctx.arch = cmdargs.arch;
973 err = read_input(&ctx);
976 disasm_opcodes(&ctx);
977 resolve_labels(&ctx);
981 int main(int argc, char **argv)
985 err = parse_args(argc, argv);
995 /* Lazyman simply leaks all allocated memory. */