1 Renesas R-Car Video Input driver (rcar_vin)
2 -------------------------------------------
4 The rcar_vin device provides video input capabilities for the Renesas R-Car
7 Each VIN instance has a single parallel input that supports RGB and YUV video,
8 with both external synchronization and BT.656 synchronization for the latter.
9 Depending on the instance the VIN input is connected to external SoC pins, or
10 on Gen3 platforms to a CSI-2 receiver.
12 - compatible: Must be one or more of the following
13 - "renesas,vin-r8a7743" for the R8A7743 device
14 - "renesas,vin-r8a7745" for the R8A7745 device
15 - "renesas,vin-r8a7778" for the R8A7778 device
16 - "renesas,vin-r8a7779" for the R8A7779 device
17 - "renesas,vin-r8a7790" for the R8A7790 device
18 - "renesas,vin-r8a7791" for the R8A7791 device
19 - "renesas,vin-r8a7792" for the R8A7792 device
20 - "renesas,vin-r8a7793" for the R8A7793 device
21 - "renesas,vin-r8a7794" for the R8A7794 device
22 - "renesas,vin-r8a7795" for the R8A7795 device
23 - "renesas,vin-r8a7796" for the R8A7796 device
24 - "renesas,vin-r8a77965" for the R8A77965 device
25 - "renesas,vin-r8a77970" for the R8A77970 device
26 - "renesas,vin-r8a77995" for the R8A77995 device
27 - "renesas,rcar-gen2-vin" for a generic R-Car Gen2 or RZ/G1 compatible
30 When compatible with the generic version nodes must list the
31 SoC-specific version corresponding to the platform first
32 followed by the generic version.
34 - reg: the register base and size for the device registers
35 - interrupts: the interrupt for the device
36 - clocks: Reference to the parent clock
38 Additionally, an alias named vinX will need to be created to specify
39 which video input device this is.
41 The per-board settings Gen2 platforms:
43 - port - sub-node describing a single endpoint connected to the VIN
44 from external SoC pins as described in video-interfaces.txt[1].
45 Only the first one will be considered as each vin interface has one
48 - Optional properties for endpoint nodes:
49 - hsync-active: see [1] for description. Default is active high.
50 - vsync-active: see [1] for description. Default is active high.
51 If both HSYNC and VSYNC polarities are not specified, embedded
52 synchronization is selected.
53 - field-active-even: see [1] for description. Default is active high.
54 - bus-width: see [1] for description. The selected bus width depends on
55 the SoC type and selected input image format.
56 Valid values are: 8, 10, 12, 16, 24 and 32.
57 - data-shift: see [1] for description. Valid values are 0 and 8.
58 - data-enable-active: polarity of CLKENB signal, see [1] for
59 description. Default is active high.
61 The per-board settings Gen3 platforms:
63 Gen3 platforms can support both a single connected parallel input source
64 from external SoC pins (port@0) and/or multiple parallel input sources
65 from local SoC CSI-2 receivers (port@1) depending on SoC.
67 - renesas,id - ID number of the VIN, VINx in the documentation.
69 - port@0 - sub-node describing a single endpoint connected to the VIN
70 from external SoC pins as described in video-interfaces.txt[1].
71 Describing more than one endpoint in port@0 is invalid. Only VIN
72 instances that are connected to external pins should have port@0.
74 Endpoint nodes of port@0 support the optional properties listed in
75 the Gen2 per-board settings description.
77 - port@1 - sub-nodes describing one or more endpoints connected to
78 the VIN from local SoC CSI-2 receivers. The endpoint numbers must
79 use the following schema.
81 - endpoint@0 - sub-node describing the endpoint connected to CSI20
82 - endpoint@1 - sub-node describing the endpoint connected to CSI21
83 - endpoint@2 - sub-node describing the endpoint connected to CSI40
84 - endpoint@3 - sub-node describing the endpoint connected to CSI41
86 Endpoint nodes of port@1 do not support any optional endpoint property.
88 Device node example for Gen2 platforms
89 --------------------------------------
96 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
97 clocks = <&mstp8_clks R8A7790_CLK_VIN0>;
98 reg = <0 0xe6ef0000 0 0x1000>;
99 interrupts = <0 188 IRQ_TYPE_LEVEL_HIGH>;
103 Board setup example for Gen2 platforms (vin1 composite video input)
104 -------------------------------------------------------------------
108 pinctrl-0 = <&i2c2_pins>;
109 pinctrl-names = "default";
112 compatible = "adi,adv7180";
119 remote-endpoint = <&vin1ep0>;
125 /* composite video input */
127 pinctrl-0 = <&vin1_pins>;
128 pinctrl-names = "default";
134 remote-endpoint = <&adv7180>;
140 Device node example for Gen3 platforms
141 --------------------------------------
143 vin0: video@e6ef0000 {
144 compatible = "renesas,vin-r8a7795";
145 reg = <0 0xe6ef0000 0 0x1000>;
146 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
147 clocks = <&cpg CPG_MOD 811>;
148 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
153 #address-cells = <1>;
157 #address-cells = <1>;
162 vin0csi20: endpoint@0 {
164 remote-endpoint= <&csi20vin0>;
166 vin0csi21: endpoint@1 {
168 remote-endpoint= <&csi21vin0>;
170 vin0csi40: endpoint@2 {
172 remote-endpoint= <&csi40vin0>;
178 csi20: csi2@fea80000 {
179 compatible = "renesas,r8a7795-csi2";
180 reg = <0 0xfea80000 0 0x10000>;
181 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
182 clocks = <&cpg CPG_MOD 714>;
183 power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
187 #address-cells = <1>;
195 remote-endpoint = <&adv7482_txb>;
200 #address-cells = <1>;
205 csi20vin0: endpoint@0 {
207 remote-endpoint = <&vin0csi20>;
213 [1] video-interfaces.txt common video media interface