2 // Applications downloaded in RAM using a debug monitor (eg. XMON, RedBoot)
3 // start here at _app_reset. Such applications don't have any vectors:
4 // all exceptions are handled by the debug monitor.
5 // Thus, this file essentially plays the role of the reset vector
6 // to setup a few things before jumping to _start (in crt1*.S).
8 // Copyright (c) 2005-2010 Tensilica Inc.
10 // Permission is hereby granted, free of charge, to any person obtaining
11 // a copy of this software and associated documentation files (the
12 // "Software"), to deal in the Software without restriction, including
13 // without limitation the rights to use, copy, modify, merge, publish,
14 // distribute, sublicense, and/or sell copies of the Software, and to
15 // permit persons to whom the Software is furnished to do so, subject to
16 // the following conditions:
18 // The above copyright notice and this permission notice shall be included
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23 // MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
24 // IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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29 #include <xtensa/cacheattrasm.h>
30 #include <xtensa/xt2000.h>
31 #include <xtensa/coreasm.h>
34 // Assumptions on entry to _app_reset:
35 // - debug monitor handles all exceptions, has setup all vectors
36 // - interrupt related state is initialized
37 // (interrupts disabled or enabled for debug monitor's purposes)
38 // - debug option related state is initialized (for debug monitor)
39 // - any MMU related state is initialized (all handled by debug monitor)
40 // - caches are initialized (cache attributes not necessarily correct)
41 // - entire application is loaded (no unpacking needed here)
43 // Assumptions on exit from _app_reset, ie. when jumping to _start:
44 // - low (level-one) and medium priority interrupts are disabled
45 // - C calling context not initialized:
46 // - PS not fully initialized (eg. PS.WOE not set per ABI)
47 // - SP not initialized
48 // - the following are initialized:
49 // - LITBASE, WindowBase, WindowStart, LCOUNT, CPENABLE, FP's FCR and FSR,
52 /**************************************************************************/
57 /* _app_reset may be required to be located at the beginning of the text
58 segment. However, the constant pool for _app_reset must be placed
59 before the code. Jump over the constant pool to solve this. */
60 j .LpastInitialConstants
62 .literal_position // tells the assembler/linker to place literals here
64 .LpastInitialConstants:
65 // Keep a0 zero. It is used to initialize a few things.
66 // It is also the return address, where zero indicates
67 // that the frame used by _start is the bottommost frame.
69 movi a0, 0 // keep this register zero.
72 wsr a0, LCOUNT // loop count = 0
73 #endif /* XCHAL_HAVE_LOOPS */
75 // Interrupts might be enabled, make sure at least medium and low priority
76 // interrupts are disabled until WindowBase, WindowStart, SP, and the stack
77 // are all properly setup (which will happen outside this file, after the
78 // _start label). We leave loops enabled on new exception architecture.
79 #if XCHAL_HAVE_EXCEPTIONS
80 movi a2, XCHAL_EXCM_LEVEL
81 wsr a2, PS // set PS.INTLEVEL=EXCM_LEVEL, PS.WOE=0, PS.EXCM=0
85 // DO THIS FIRST: initialize the window start and base
86 // before, so that windows don't move under us.
87 #if XCHAL_HAVE_WINDOWED
88 // We do this even if we are assembling for the
89 // call0 abi, but it's not really needed.
91 wsr a2, WINDOWSTART // window start = 1
92 wsr a0, WINDOWBASE // window base = 0
95 // NOTE: a0 may no longer be zero here, because
96 // we wrote to WindowBase. So clear it again.
100 // Now, BEFORE we do any L32R (or MOVI with non-immediate
101 // range which results in an L32R), ensure LITBASE is set
102 // correctly. This is necessary for RAM applications loaded
103 // using a target-side debug monitor -- such applications
104 // don't have a reset vector and start execution at _start.
105 // (This part is unnecessary if running from a reset vector.)
106 // The target-side debug monitor might have set LITBASE to
107 // anything at all, so we cannot rely on its value here.
108 #if XCHAL_HAVE_ABSOLUTE_LITERALS
109 wsr a0, LITBASE // force PC-relative L32R
111 # if XSHAL_USE_ABSOLUTE_LITERALS
112 .begin no-absolute-literals // use PC-rel L32R to load
113 movi a2, _lit4_start + 0x40001 // address of absolute literals
114 .end no-absolute-literals // (see handlers/ResetVector.S
115 wsr a2, LITBASE // for explanation)
122 * Enable the caches correctly for this board.
123 * We use the "safe" sequence.
125 * NOTE: We don't *initialize* the caches here, because the
126 * target debugger agent (debug monitor) has initialized them for us.
128 movi a2, XTBOARD_CACHEATTR_DEFAULT
129 cacheattr_set /* set CACHEATTR from a2 (clobbers a3-a8) */
133 // Coprocessor option initialization
135 //movi a2, XCHAL_CP_MASK // enable existing CPs
136 // To allow creating new coprocessors using TC that are not known
137 // at GUI build time without having to explicitly enable them,
138 // all CPENABLE bits must be set, even though they may not always
139 // correspond to a coprocessor.
140 movi a2, 0xFF // enable *all* bits, to allow dynamic TIE
144 // Floating point coprocessor option initialization
146 # define FCR 232 /* floating-point control register (user register number) */
147 # define FSR 233 /* floating-point status register (user register number) */
148 rsync /* wait for WSR to CPENABLE to complete before accessing FP coproc state */
149 wur a0, FCR /* clear FCR (default rounding mode, round-nearest) */
150 wur a0, FSR /* clear FSR */
154 /* NOTE: Future releases may clear BSS here rather than in the CRT1. */
158 * Now jump to the application. This is typically the
159 * C run-time initialization ("CRT") which in turn calls main():
162 jx a4 // jump to _start
164 .size _app_reset, . - _app_reset