2 * Memory copy functions for 32-bit PowerPC.
4 * Copyright (C) 1996-2005 Paul Mackerras.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
11 #include <asm/processor.h>
12 #include <asm/cache.h>
13 #include <asm/errno.h>
14 #include <asm/ppc_asm.h>
15 #include <asm/export.h>
16 #include <asm/code-patching-asm.h>
18 #define COPY_16_BYTES \
28 #define COPY_16_BYTES_WITHEX(n) \
46 #define COPY_16_BYTES_EXCODE(n) \
48 addi r5,r5,-(16 * n); \
51 addi r5,r5,-(16 * n); \
53 EX_TABLE(8 ## n ## 0b,9 ## n ## 0b); \
54 EX_TABLE(8 ## n ## 1b,9 ## n ## 0b); \
55 EX_TABLE(8 ## n ## 2b,9 ## n ## 0b); \
56 EX_TABLE(8 ## n ## 3b,9 ## n ## 0b); \
57 EX_TABLE(8 ## n ## 4b,9 ## n ## 1b); \
58 EX_TABLE(8 ## n ## 5b,9 ## n ## 1b); \
59 EX_TABLE(8 ## n ## 6b,9 ## n ## 1b); \
60 EX_TABLE(8 ## n ## 7b,9 ## n ## 1b)
63 .stabs "arch/powerpc/lib/",N_SO,0,0,0f
64 .stabs "copy_32.S",N_SO,0,0,0f
67 CACHELINE_BYTES = L1_CACHE_BYTES
68 LG_CACHELINE_BYTES = L1_CACHE_SHIFT
69 CACHELINE_MASK = (L1_CACHE_BYTES-1)
72 rlwinm. r0 ,r5, 31, 1, 31
75 rlwimi r4 ,r4 ,16 ,0 ,15
83 EXPORT_SYMBOL(memset16)
86 * Use dcbz on the complete cache lines in the destination
87 * to set them to zero. This requires that the destination
88 * area is cacheable. -- paulus
90 * During early init, cache might not be active yet, so dcbz cannot be used.
91 * We therefore skip the optimised bloc that uses dcbz. This jump is
92 * replaced by a nop once cache is active. This is done in machine_init()
108 * Skip optimised bloc until cache is enabled. Will be replaced
109 * by 'bne' during boot to use normal procedure if r4 is not zero
112 patch_site 5b, patch__memset_nocache
114 clrlwi r7,r6,32-LG_CACHELINE_BYTES
116 srwi r9,r8,LG_CACHELINE_BYTES
117 addic. r9,r9,-1 /* total number of complete cachelines */
119 xori r0,r7,CACHELINE_MASK & ~3
128 addi r6,r6,CACHELINE_BYTES
130 clrlwi r5,r8,32-LG_CACHELINE_BYTES
153 EXPORT_SYMBOL(memset)
156 * This version uses dcbz on the complete cache lines in the
157 * destination area to reduce memory traffic. This requires that
158 * the destination area is cacheable.
159 * We only use this version if the source and dest don't overlap.
162 * During early init, cache might not be active yet, so dcbz cannot be used.
163 * We therefore jump to generic_memcpy which doesn't use dcbz. This jump is
164 * replaced by a nop once cache is active. This is done in machine_init()
173 patch_site 1b, patch__memcpy_nocache
175 add r7,r3,r5 /* test if the src & dst overlap */
179 crand 0,0,4 /* cr0.lt &= cr1.lt */
180 blt generic_memcpy /* if regions overlap */
185 andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
188 cmplw 0,r5,r0 /* is this more than total to do? */
189 blt 63f /* if not much to do */
190 andi. r8,r0,3 /* get it word-aligned first */
194 70: lbz r9,4(r4) /* do some bytes */
202 72: lwzu r9,4(r4) /* do some words */
206 58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
207 clrlwi r5,r5,32-LG_CACHELINE_BYTES
214 #if L1_CACHE_BYTES >= 32
216 #if L1_CACHE_BYTES >= 64
219 #if L1_CACHE_BYTES >= 128
245 EXPORT_SYMBOL(memcpy)
246 EXPORT_SYMBOL(memmove)
252 beq 2f /* if less than 8 bytes to do */
253 andi. r0,r6,3 /* get dest word aligned */
284 rlwinm. r7,r5,32-3,3,31
289 _GLOBAL(backwards_memcpy)
290 rlwinm. r7,r5,32-3,3,31 /* r0 = r5 >> 3 */
320 rlwinm. r7,r5,32-3,3,31
325 _GLOBAL(__copy_tofrom_user)
329 andi. r0,r0,CACHELINE_MASK /* # bytes to start of cache line */
332 cmplw 0,r5,r0 /* is this more than total to do? */
333 blt 63f /* if not much to do */
334 andi. r8,r0,3 /* get it word-aligned first */
337 70: lbz r9,4(r4) /* do some bytes */
346 72: lwzu r9,4(r4) /* do some words */
355 58: srwi. r0,r5,LG_CACHELINE_BYTES /* # complete cachelines */
356 clrlwi r5,r5,32-LG_CACHELINE_BYTES
360 /* Here we decide how far ahead to prefetch the source */
366 #if MAX_COPY_PREFETCH > 1
367 /* Heuristically, for large transfers we prefetch
368 MAX_COPY_PREFETCH cachelines ahead. For small transfers
369 we prefetch 1 cacheline ahead. */
370 cmpwi r0,MAX_COPY_PREFETCH
372 li r7,MAX_COPY_PREFETCH
375 addi r3,r3,CACHELINE_BYTES
379 addi r3,r3,CACHELINE_BYTES
380 #endif /* MAX_COPY_PREFETCH > 1 */
389 /* the main body of the cacheline loop */
390 COPY_16_BYTES_WITHEX(0)
391 #if L1_CACHE_BYTES >= 32
392 COPY_16_BYTES_WITHEX(1)
393 #if L1_CACHE_BYTES >= 64
394 COPY_16_BYTES_WITHEX(2)
395 COPY_16_BYTES_WITHEX(3)
396 #if L1_CACHE_BYTES >= 128
397 COPY_16_BYTES_WITHEX(4)
398 COPY_16_BYTES_WITHEX(5)
399 COPY_16_BYTES_WITHEX(6)
400 COPY_16_BYTES_WITHEX(7)
428 /* read fault, initial single-byte copy */
431 /* write fault, initial single-byte copy */
436 /* read fault, initial word copy */
439 /* write fault, initial word copy */
445 * this stuff handles faults in the cacheline loop and branches to either
446 * 104f (if in read part) or 105f (if in write part), after updating r5
448 COPY_16_BYTES_EXCODE(0)
449 #if L1_CACHE_BYTES >= 32
450 COPY_16_BYTES_EXCODE(1)
451 #if L1_CACHE_BYTES >= 64
452 COPY_16_BYTES_EXCODE(2)
453 COPY_16_BYTES_EXCODE(3)
454 #if L1_CACHE_BYTES >= 128
455 COPY_16_BYTES_EXCODE(4)
456 COPY_16_BYTES_EXCODE(5)
457 COPY_16_BYTES_EXCODE(6)
458 COPY_16_BYTES_EXCODE(7)
463 /* read fault in cacheline loop */
466 /* fault on dcbz (effectively a write fault) */
467 /* or write fault in cacheline loop */
469 92: li r3,LG_CACHELINE_BYTES
473 /* read fault in final word loop */
476 /* write fault in final word loop */
481 /* read fault in final byte loop */
484 /* write fault in final byte loop */
489 * At this stage the number of bytes not copied is
490 * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
495 beq 120f /* shouldn't happen */
498 /* for a read fault, first try to continue the copy one byte at a time */
505 /* then clear out the destination: r3 bytes starting at 4(r6) */
516 EXPORT_SYMBOL(__copy_tofrom_user)