codecs/rt5645.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * rt5645.c  --  RT5645 ALSA SoC audio codec driver
   4  *
   5  * Copyright 2013 Realtek Semiconductor Corp.
   6  * Author: Bard Liao <bardliao@realtek.com>
   7  */
   8
   9 #include <linux/module.h>
  10 #include <linux/moduleparam.h>
  11 #include <linux/init.h>
  12 #include <linux/delay.h>
  13 #include <linux/pm.h>
  14 #include <linux/i2c.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/gpio.h>
  18 #include <linux/gpio/consumer.h>
  19 #include <linux/acpi.h>
  20 #include <linux/dmi.h>
  21 #include <linux/regulator/consumer.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/jack.h>
  26 #include <sound/soc.h>
  27 #include <sound/soc-dapm.h>
  28 #include <sound/initval.h>
  29 #include <sound/tlv.h>
  30
  31 #include "rl6231.h"
  32 #include "rt5645.h"
  33
  34 #define QUIRK_INV_JD1_1(q)      ((q) & 1)
  35 #define QUIRK_LEVEL_IRQ(q)      (((q) >> 1) & 1)
  36 #define QUIRK_IN2_DIFF(q)       (((q) >> 2) & 1)
  37 #define QUIRK_INV_HP_POL(q)     (((q) >> 3) & 1)
  38 #define QUIRK_JD_MODE(q)        (((q) >> 4) & 7)
  39 #define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
  40 #define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
  41
  42 static unsigned int quirk = -1;
  43 module_param(quirk, uint, 0444);
  44 MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
  45
  46 static const struct acpi_gpio_mapping *cht_rt5645_gpios;
  47
  48 #define RT5645_DEVICE_ID 0x6308
  49 #define RT5650_DEVICE_ID 0x6419
  50
  51 #define RT5645_PR_RANGE_BASE (0xff + 1)
  52 #define RT5645_PR_SPACING 0x100
  53
  54 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
  55
  56 #define RT5645_HWEQ_NUM 57
  57
  58 #define TIME_TO_POWER_MS 400
  59
  60 static const struct regmap_range_cfg rt5645_ranges[] = {
  61         {
  62                 .name = "PR",
  63                 .range_min = RT5645_PR_BASE,
  64                 .range_max = RT5645_PR_BASE + 0xf8,
  65                 .selector_reg = RT5645_PRIV_INDEX,
  66                 .selector_mask = 0xff,
  67                 .selector_shift = 0x0,
  68                 .window_start = RT5645_PRIV_DATA,
  69                 .window_len = 0x1,
  70         },
  71 };
  72
  73 static const struct reg_sequence init_list[] = {
  74         {RT5645_PR_BASE + 0x3d, 0x3600},
  75         {RT5645_PR_BASE + 0x1c, 0xfd70},
  76         {RT5645_PR_BASE + 0x20, 0x611f},
  77         {RT5645_PR_BASE + 0x21, 0x4040},
  78         {RT5645_PR_BASE + 0x23, 0x0004},
  79         {RT5645_ASRC_4, 0x0120},
  80 };
  81
  82 static const struct reg_sequence rt5650_init_list[] = {
  83         {0xf6,  0x0100},
  84 };
  85
  86 static const struct reg_default rt5645_reg[] = {
  87         { 0x00, 0x0000 },
  88         { 0x01, 0xc8c8 },
  89         { 0x02, 0xc8c8 },
  90         { 0x03, 0xc8c8 },
  91         { 0x0a, 0x0002 },
  92         { 0x0b, 0x2827 },
  93         { 0x0c, 0xe000 },
  94         { 0x0d, 0x0000 },
  95         { 0x0e, 0x0000 },
  96         { 0x0f, 0x0808 },
  97         { 0x14, 0x3333 },
  98         { 0x16, 0x4b00 },
  99         { 0x18, 0x018b },
 100         { 0x19, 0xafaf },
 101         { 0x1a, 0xafaf },
 102         { 0x1b, 0x0001 },
 103         { 0x1c, 0x2f2f },
 104         { 0x1d, 0x2f2f },
 105         { 0x1e, 0x0000 },
 106         { 0x20, 0x0000 },
 107         { 0x27, 0x7060 },
 108         { 0x28, 0x7070 },
 109         { 0x29, 0x8080 },
 110         { 0x2a, 0x5656 },
 111         { 0x2b, 0x5454 },
 112         { 0x2c, 0xaaa0 },
 113         { 0x2d, 0x0000 },
 114         { 0x2f, 0x1002 },
 115         { 0x31, 0x5000 },
 116         { 0x32, 0x0000 },
 117         { 0x33, 0x0000 },
 118         { 0x34, 0x0000 },
 119         { 0x35, 0x0000 },
 120         { 0x3b, 0x0000 },
 121         { 0x3c, 0x007f },
 122         { 0x3d, 0x0000 },
 123         { 0x3e, 0x007f },
 124         { 0x3f, 0x0000 },
 125         { 0x40, 0x001f },
 126         { 0x41, 0x0000 },
 127         { 0x42, 0x001f },
 128         { 0x45, 0x6000 },
 129         { 0x46, 0x003e },
 130         { 0x47, 0x003e },
 131         { 0x48, 0xf807 },
 132         { 0x4a, 0x0004 },
 133         { 0x4d, 0x0000 },
 134         { 0x4e, 0x0000 },
 135         { 0x4f, 0x01ff },
 136         { 0x50, 0x0000 },
 137         { 0x51, 0x0000 },
 138         { 0x52, 0x01ff },
 139         { 0x53, 0xf000 },
 140         { 0x56, 0x0111 },
 141         { 0x57, 0x0064 },
 142         { 0x58, 0xef0e },
 143         { 0x59, 0xf0f0 },
 144         { 0x5a, 0xef0e },
 145         { 0x5b, 0xf0f0 },
 146         { 0x5c, 0xef0e },
 147         { 0x5d, 0xf0f0 },
 148         { 0x5e, 0xf000 },
 149         { 0x5f, 0x0000 },
 150         { 0x61, 0x0300 },
 151         { 0x62, 0x0000 },
 152         { 0x63, 0x00c2 },
 153         { 0x64, 0x0000 },
 154         { 0x65, 0x0000 },
 155         { 0x66, 0x0000 },
 156         { 0x6a, 0x0000 },
 157         { 0x6c, 0x0aaa },
 158         { 0x70, 0x8000 },
 159         { 0x71, 0x8000 },
 160         { 0x72, 0x8000 },
 161         { 0x73, 0x7770 },
 162         { 0x74, 0x3e00 },
 163         { 0x75, 0x2409 },
 164         { 0x76, 0x000a },
 165         { 0x77, 0x0c00 },
 166         { 0x78, 0x0000 },
 167         { 0x79, 0x0123 },
 168         { 0x80, 0x0000 },
 169         { 0x81, 0x0000 },
 170         { 0x82, 0x0000 },
 171         { 0x83, 0x0000 },
 172         { 0x84, 0x0000 },
 173         { 0x85, 0x0000 },
 174         { 0x8a, 0x0120 },
 175         { 0x8e, 0x0004 },
 176         { 0x8f, 0x1100 },
 177         { 0x90, 0x0646 },
 178         { 0x91, 0x0c06 },
 179         { 0x93, 0x0000 },
 180         { 0x94, 0x0200 },
 181         { 0x95, 0x0000 },
 182         { 0x9a, 0x2184 },
 183         { 0x9b, 0x010a },
 184         { 0x9c, 0x0aea },
 185         { 0x9d, 0x000c },
 186         { 0x9e, 0x0400 },
 187         { 0xa0, 0xa0a8 },
 188         { 0xa1, 0x0059 },
 189         { 0xa2, 0x0001 },
 190         { 0xae, 0x6000 },
 191         { 0xaf, 0x0000 },
 192         { 0xb0, 0x6000 },
 193         { 0xb1, 0x0000 },
 194         { 0xb2, 0x0000 },
 195         { 0xb3, 0x001f },
 196         { 0xb4, 0x020c },
 197         { 0xb5, 0x1f00 },
 198         { 0xb6, 0x0000 },
 199         { 0xbb, 0x0000 },
 200         { 0xbc, 0x0000 },
 201         { 0xbd, 0x0000 },
 202         { 0xbe, 0x0000 },
 203         { 0xbf, 0x3100 },
 204         { 0xc0, 0x0000 },
 205         { 0xc1, 0x0000 },
 206         { 0xc2, 0x0000 },
 207         { 0xc3, 0x2000 },
 208         { 0xcd, 0x0000 },
 209         { 0xce, 0x0000 },
 210         { 0xcf, 0x1813 },
 211         { 0xd0, 0x0690 },
 212         { 0xd1, 0x1c17 },
 213         { 0xd3, 0xb320 },
 214         { 0xd4, 0x0000 },
 215         { 0xd6, 0x0400 },
 216         { 0xd9, 0x0809 },
 217         { 0xda, 0x0000 },
 218         { 0xdb, 0x0003 },
 219         { 0xdc, 0x0049 },
 220         { 0xdd, 0x001b },
 221         { 0xdf, 0x0008 },
 222         { 0xe0, 0x4000 },
 223         { 0xe6, 0x8000 },
 224         { 0xe7, 0x0200 },
 225         { 0xec, 0xb300 },
 226         { 0xed, 0x0000 },
 227         { 0xf0, 0x001f },
 228         { 0xf1, 0x020c },
 229         { 0xf2, 0x1f00 },
 230         { 0xf3, 0x0000 },
 231         { 0xf4, 0x4000 },
 232         { 0xf8, 0x0000 },
 233         { 0xf9, 0x0000 },
 234         { 0xfa, 0x2060 },
 235         { 0xfb, 0x4040 },
 236         { 0xfc, 0x0000 },
 237         { 0xfd, 0x0002 },
 238         { 0xfe, 0x10ec },
 239         { 0xff, 0x6308 },
 240 };
 241
 242 static const struct reg_default rt5650_reg[] = {
 243         { 0x00, 0x0000 },
 244         { 0x01, 0xc8c8 },
 245         { 0x02, 0xc8c8 },
 246         { 0x03, 0xc8c8 },
 247         { 0x0a, 0x0002 },
 248         { 0x0b, 0x2827 },
 249         { 0x0c, 0xe000 },
 250         { 0x0d, 0x0000 },
 251         { 0x0e, 0x0000 },
 252         { 0x0f, 0x0808 },
 253         { 0x14, 0x3333 },
 254         { 0x16, 0x4b00 },
 255         { 0x18, 0x018b },
 256         { 0x19, 0xafaf },
 257         { 0x1a, 0xafaf },
 258         { 0x1b, 0x0001 },
 259         { 0x1c, 0x2f2f },
 260         { 0x1d, 0x2f2f },
 261         { 0x1e, 0x0000 },
 262         { 0x20, 0x0000 },
 263         { 0x27, 0x7060 },
 264         { 0x28, 0x7070 },
 265         { 0x29, 0x8080 },
 266         { 0x2a, 0x5656 },
 267         { 0x2b, 0x5454 },
 268         { 0x2c, 0xaaa0 },
 269         { 0x2d, 0x0000 },
 270         { 0x2f, 0x5002 },
 271         { 0x31, 0x5000 },
 272         { 0x32, 0x0000 },
 273         { 0x33, 0x0000 },
 274         { 0x34, 0x0000 },
 275         { 0x35, 0x0000 },
 276         { 0x3b, 0x0000 },
 277         { 0x3c, 0x007f },
 278         { 0x3d, 0x0000 },
 279         { 0x3e, 0x007f },
 280         { 0x3f, 0x0000 },
 281         { 0x40, 0x001f },
 282         { 0x41, 0x0000 },
 283         { 0x42, 0x001f },
 284         { 0x45, 0x6000 },
 285         { 0x46, 0x003e },
 286         { 0x47, 0x003e },
 287         { 0x48, 0xf807 },
 288         { 0x4a, 0x0004 },
 289         { 0x4d, 0x0000 },
 290         { 0x4e, 0x0000 },
 291         { 0x4f, 0x01ff },
 292         { 0x50, 0x0000 },
 293         { 0x51, 0x0000 },
 294         { 0x52, 0x01ff },
 295         { 0x53, 0xf000 },
 296         { 0x56, 0x0111 },
 297         { 0x57, 0x0064 },
 298         { 0x58, 0xef0e },
 299         { 0x59, 0xf0f0 },
 300         { 0x5a, 0xef0e },
 301         { 0x5b, 0xf0f0 },
 302         { 0x5c, 0xef0e },
 303         { 0x5d, 0xf0f0 },
 304         { 0x5e, 0xf000 },
 305         { 0x5f, 0x0000 },
 306         { 0x61, 0x0300 },
 307         { 0x62, 0x0000 },
 308         { 0x63, 0x00c2 },
 309         { 0x64, 0x0000 },
 310         { 0x65, 0x0000 },
 311         { 0x66, 0x0000 },
 312         { 0x6a, 0x0000 },
 313         { 0x6c, 0x0aaa },
 314         { 0x70, 0x8000 },
 315         { 0x71, 0x8000 },
 316         { 0x72, 0x8000 },
 317         { 0x73, 0x7770 },
 318         { 0x74, 0x3e00 },
 319         { 0x75, 0x2409 },
 320         { 0x76, 0x000a },
 321         { 0x77, 0x0c00 },
 322         { 0x78, 0x0000 },
 323         { 0x79, 0x0123 },
 324         { 0x7a, 0x0123 },
 325         { 0x80, 0x0000 },
 326         { 0x81, 0x0000 },
 327         { 0x82, 0x0000 },
 328         { 0x83, 0x0000 },
 329         { 0x84, 0x0000 },
 330         { 0x85, 0x0000 },
 331         { 0x8a, 0x0120 },
 332         { 0x8e, 0x0004 },
 333         { 0x8f, 0x1100 },
 334         { 0x90, 0x0646 },
 335         { 0x91, 0x0c06 },
 336         { 0x93, 0x0000 },
 337         { 0x94, 0x0200 },
 338         { 0x95, 0x0000 },
 339         { 0x9a, 0x2184 },
 340         { 0x9b, 0x010a },
 341         { 0x9c, 0x0aea },
 342         { 0x9d, 0x000c },
 343         { 0x9e, 0x0400 },
 344         { 0xa0, 0xa0a8 },
 345         { 0xa1, 0x0059 },
 346         { 0xa2, 0x0001 },
 347         { 0xae, 0x6000 },
 348         { 0xaf, 0x0000 },
 349         { 0xb0, 0x6000 },
 350         { 0xb1, 0x0000 },
 351         { 0xb2, 0x0000 },
 352         { 0xb3, 0x001f },
 353         { 0xb4, 0x020c },
 354         { 0xb5, 0x1f00 },
 355         { 0xb6, 0x0000 },
 356         { 0xbb, 0x0000 },
 357         { 0xbc, 0x0000 },
 358         { 0xbd, 0x0000 },
 359         { 0xbe, 0x0000 },
 360         { 0xbf, 0x3100 },
 361         { 0xc0, 0x0000 },
 362         { 0xc1, 0x0000 },
 363         { 0xc2, 0x0000 },
 364         { 0xc3, 0x2000 },
 365         { 0xcd, 0x0000 },
 366         { 0xce, 0x0000 },
 367         { 0xcf, 0x1813 },
 368         { 0xd0, 0x0690 },
 369         { 0xd1, 0x1c17 },
 370         { 0xd3, 0xb320 },
 371         { 0xd4, 0x0000 },
 372         { 0xd6, 0x0400 },
 373         { 0xd9, 0x0809 },
 374         { 0xda, 0x0000 },
 375         { 0xdb, 0x0003 },
 376         { 0xdc, 0x0049 },
 377         { 0xdd, 0x001b },
 378         { 0xdf, 0x0008 },
 379         { 0xe0, 0x4000 },
 380         { 0xe6, 0x8000 },
 381         { 0xe7, 0x0200 },
 382         { 0xec, 0xb300 },
 383         { 0xed, 0x0000 },
 384         { 0xf0, 0x001f },
 385         { 0xf1, 0x020c },
 386         { 0xf2, 0x1f00 },
 387         { 0xf3, 0x0000 },
 388         { 0xf4, 0x4000 },
 389         { 0xf8, 0x0000 },
 390         { 0xf9, 0x0000 },
 391         { 0xfa, 0x2060 },
 392         { 0xfb, 0x4040 },
 393         { 0xfc, 0x0000 },
 394         { 0xfd, 0x0002 },
 395         { 0xfe, 0x10ec },
 396         { 0xff, 0x6308 },
 397 };
 398
 399 struct rt5645_eq_param_s {
 400         unsigned short reg;
 401         unsigned short val;
 402 };
 403
 404 struct rt5645_eq_param_s_be16 {
 405         __be16 reg;
 406         __be16 val;
 407 };
 408
 409 static const char *const rt5645_supply_names[] = {
 410         "avdd",
 411         "cpvdd",
 412 };
 413
 414 struct rt5645_platform_data {
 415         /* IN2 can optionally be differential */
 416         bool in2_diff;
 417
 418         unsigned int dmic1_data_pin;
 419         /* 0 = IN2N; 1 = GPIO5; 2 = GPIO11 */
 420         unsigned int dmic2_data_pin;
 421         /* 0 = IN2P; 1 = GPIO6; 2 = GPIO10; 3 = GPIO12 */
 422
 423         unsigned int jd_mode;
 424         /* Use level triggered irq */
 425         bool level_trigger_irq;
 426         /* Invert JD1_1 status polarity */
 427         bool inv_jd1_1;
 428         /* Invert HP detect status polarity */
 429         bool inv_hp_pol;
 430
 431         /* Value to assign to snd_soc_card.long_name */
 432         const char *long_name;
 433
 434         /* Some (package) variants have the headset-mic pin not-connected */
 435         bool no_headset_mic;
 436 };
 437
 438 struct rt5645_priv {
 439         struct snd_soc_component *component;
 440         struct rt5645_platform_data pdata;
 441         struct regmap *regmap;
 442         struct i2c_client *i2c;
 443         struct gpio_desc *gpiod_hp_det;
 444         struct snd_soc_jack *hp_jack;
 445         struct snd_soc_jack *mic_jack;
 446         struct snd_soc_jack *btn_jack;
 447         struct delayed_work jack_detect_work, rcclock_work;
 448         struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
 449         struct rt5645_eq_param_s *eq_param;
 450         struct timer_list btn_check_timer;
 451         struct mutex jd_mutex;
 452
 453         int codec_type;
 454         int sysclk;
 455         int sysclk_src;
 456         int lrck[RT5645_AIFS];
 457         int bclk[RT5645_AIFS];
 458         int master[RT5645_AIFS];
 459
 460         int pll_src;
 461         int pll_in;
 462         int pll_out;
 463
 464         int jack_type;
 465         bool en_button_func;
 466         int v_id;
 467 };
 468
 469 static int rt5645_reset(struct snd_soc_component *component)
 470 {
 471         return snd_soc_component_write(component, RT5645_RESET, 0);
 472 }
 473
 474 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
 475 {
 476         int i;
 477
 478         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 479                 if (reg >= rt5645_ranges[i].range_min &&
 480                         reg <= rt5645_ranges[i].range_max) {
 481                         return true;
 482                 }
 483         }
 484
 485         switch (reg) {
 486         case RT5645_RESET:
 487         case RT5645_PRIV_INDEX:
 488         case RT5645_PRIV_DATA:
 489         case RT5645_IN1_CTRL1:
 490         case RT5645_IN1_CTRL2:
 491         case RT5645_IN1_CTRL3:
 492         case RT5645_A_JD_CTRL1:
 493         case RT5645_ADC_EQ_CTRL1:
 494         case RT5645_EQ_CTRL1:
 495         case RT5645_ALC_CTRL_1:
 496         case RT5645_IRQ_CTRL2:
 497         case RT5645_IRQ_CTRL3:
 498         case RT5645_INT_IRQ_ST:
 499         case RT5645_IL_CMD:
 500         case RT5650_4BTN_IL_CMD1:
 501         case RT5645_VENDOR_ID:
 502         case RT5645_VENDOR_ID1:
 503         case RT5645_VENDOR_ID2:
 504                 return true;
 505         default:
 506                 return false;
 507         }
 508 }
 509
 510 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
 511 {
 512         int i;
 513
 514         for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
 515                 if (reg >= rt5645_ranges[i].range_min &&
 516                         reg <= rt5645_ranges[i].range_max) {
 517                         return true;
 518                 }
 519         }
 520
 521         switch (reg) {
 522         case RT5645_RESET:
 523         case RT5645_SPK_VOL:
 524         case RT5645_HP_VOL:
 525         case RT5645_LOUT1:
 526         case RT5645_IN1_CTRL1:
 527         case RT5645_IN1_CTRL2:
 528         case RT5645_IN1_CTRL3:
 529         case RT5645_IN2_CTRL:
 530         case RT5645_INL1_INR1_VOL:
 531         case RT5645_SPK_FUNC_LIM:
 532         case RT5645_ADJ_HPF_CTRL:
 533         case RT5645_DAC1_DIG_VOL:
 534         case RT5645_DAC2_DIG_VOL:
 535         case RT5645_DAC_CTRL:
 536         case RT5645_STO1_ADC_DIG_VOL:
 537         case RT5645_MONO_ADC_DIG_VOL:
 538         case RT5645_ADC_BST_VOL1:
 539         case RT5645_ADC_BST_VOL2:
 540         case RT5645_STO1_ADC_MIXER:
 541         case RT5645_MONO_ADC_MIXER:
 542         case RT5645_AD_DA_MIXER:
 543         case RT5645_STO_DAC_MIXER:
 544         case RT5645_MONO_DAC_MIXER:
 545         case RT5645_DIG_MIXER:
 546         case RT5650_A_DAC_SOUR:
 547         case RT5645_DIG_INF1_DATA:
 548         case RT5645_PDM_OUT_CTRL:
 549         case RT5645_REC_L1_MIXER:
 550         case RT5645_REC_L2_MIXER:
 551         case RT5645_REC_R1_MIXER:
 552         case RT5645_REC_R2_MIXER:
 553         case RT5645_HPMIXL_CTRL:
 554         case RT5645_HPOMIXL_CTRL:
 555         case RT5645_HPMIXR_CTRL:
 556         case RT5645_HPOMIXR_CTRL:
 557         case RT5645_HPO_MIXER:
 558         case RT5645_SPK_L_MIXER:
 559         case RT5645_SPK_R_MIXER:
 560         case RT5645_SPO_MIXER:
 561         case RT5645_SPO_CLSD_RATIO:
 562         case RT5645_OUT_L1_MIXER:
 563         case RT5645_OUT_R1_MIXER:
 564         case RT5645_OUT_L_GAIN1:
 565         case RT5645_OUT_L_GAIN2:
 566         case RT5645_OUT_R_GAIN1:
 567         case RT5645_OUT_R_GAIN2:
 568         case RT5645_LOUT_MIXER:
 569         case RT5645_HAPTIC_CTRL1:
 570         case RT5645_HAPTIC_CTRL2:
 571         case RT5645_HAPTIC_CTRL3:
 572         case RT5645_HAPTIC_CTRL4:
 573         case RT5645_HAPTIC_CTRL5:
 574         case RT5645_HAPTIC_CTRL6:
 575         case RT5645_HAPTIC_CTRL7:
 576         case RT5645_HAPTIC_CTRL8:
 577         case RT5645_HAPTIC_CTRL9:
 578         case RT5645_HAPTIC_CTRL10:
 579         case RT5645_PWR_DIG1:
 580         case RT5645_PWR_DIG2:
 581         case RT5645_PWR_ANLG1:
 582         case RT5645_PWR_ANLG2:
 583         case RT5645_PWR_MIXER:
 584         case RT5645_PWR_VOL:
 585         case RT5645_PRIV_INDEX:
 586         case RT5645_PRIV_DATA:
 587         case RT5645_I2S1_SDP:
 588         case RT5645_I2S2_SDP:
 589         case RT5645_ADDA_CLK1:
 590         case RT5645_ADDA_CLK2:
 591         case RT5645_DMIC_CTRL1:
 592         case RT5645_DMIC_CTRL2:
 593         case RT5645_TDM_CTRL_1:
 594         case RT5645_TDM_CTRL_2:
 595         case RT5645_TDM_CTRL_3:
 596         case RT5650_TDM_CTRL_4:
 597         case RT5645_GLB_CLK:
 598         case RT5645_PLL_CTRL1:
 599         case RT5645_PLL_CTRL2:
 600         case RT5645_ASRC_1:
 601         case RT5645_ASRC_2:
 602         case RT5645_ASRC_3:
 603         case RT5645_ASRC_4:
 604         case RT5645_DEPOP_M1:
 605         case RT5645_DEPOP_M2:
 606         case RT5645_DEPOP_M3:
 607         case RT5645_CHARGE_PUMP:
 608         case RT5645_MICBIAS:
 609         case RT5645_A_JD_CTRL1:
 610         case RT5645_VAD_CTRL4:
 611         case RT5645_CLSD_OUT_CTRL:
 612         case RT5645_ADC_EQ_CTRL1:
 613         case RT5645_ADC_EQ_CTRL2:
 614         case RT5645_EQ_CTRL1:
 615         case RT5645_EQ_CTRL2:
 616         case RT5645_ALC_CTRL_1:
 617         case RT5645_ALC_CTRL_2:
 618         case RT5645_ALC_CTRL_3:
 619         case RT5645_ALC_CTRL_4:
 620         case RT5645_ALC_CTRL_5:
 621         case RT5645_JD_CTRL:
 622         case RT5645_IRQ_CTRL1:
 623         case RT5645_IRQ_CTRL2:
 624         case RT5645_IRQ_CTRL3:
 625         case RT5645_INT_IRQ_ST:
 626         case RT5645_GPIO_CTRL1:
 627         case RT5645_GPIO_CTRL2:
 628         case RT5645_GPIO_CTRL3:
 629         case RT5645_BASS_BACK:
 630         case RT5645_MP3_PLUS1:
 631         case RT5645_MP3_PLUS2:
 632         case RT5645_ADJ_HPF1:
 633         case RT5645_ADJ_HPF2:
 634         case RT5645_HP_CALIB_AMP_DET:
 635         case RT5645_SV_ZCD1:
 636         case RT5645_SV_ZCD2:
 637         case RT5645_IL_CMD:
 638         case RT5645_IL_CMD2:
 639         case RT5645_IL_CMD3:
 640         case RT5650_4BTN_IL_CMD1:
 641         case RT5650_4BTN_IL_CMD2:
 642         case RT5645_DRC1_HL_CTRL1:
 643         case RT5645_DRC2_HL_CTRL1:
 644         case RT5645_ADC_MONO_HP_CTRL1:
 645         case RT5645_ADC_MONO_HP_CTRL2:
 646         case RT5645_DRC2_CTRL1:
 647         case RT5645_DRC2_CTRL2:
 648         case RT5645_DRC2_CTRL3:
 649         case RT5645_DRC2_CTRL4:
 650         case RT5645_DRC2_CTRL5:
 651         case RT5645_JD_CTRL3:
 652         case RT5645_JD_CTRL4:
 653         case RT5645_GEN_CTRL1:
 654         case RT5645_GEN_CTRL2:
 655         case RT5645_GEN_CTRL3:
 656         case RT5645_VENDOR_ID:
 657         case RT5645_VENDOR_ID1:
 658         case RT5645_VENDOR_ID2:
 659                 return true;
 660         default:
 661                 return false;
 662         }
 663 }
 664
 665 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
 666 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
 667 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
 668 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
 669 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
 670
 671 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
 672 static const DECLARE_TLV_DB_RANGE(bst_tlv,
 673         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 674         1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
 675         2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
 676         3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
 677         6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
 678         7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
 679         8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
 680 );
 681
 682 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
 683 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
 684         0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
 685         5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
 686         6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
 687         7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
 688 );
 689
 690 static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
 691                          struct snd_ctl_elem_info *uinfo)
 692 {
 693         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 694         uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
 695
 696         return 0;
 697 }
 698
 699 static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
 700                         struct snd_ctl_elem_value *ucontrol)
 701 {
 702         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 703         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 704         struct rt5645_eq_param_s_be16 *eq_param =
 705                 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 706         int i;
 707
 708         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 709                 eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
 710                 eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
 711         }
 712
 713         return 0;
 714 }
 715
 716 static bool rt5645_validate_hweq(unsigned short reg)
 717 {
 718         if ((reg >= 0x1a4 && reg <= 0x1cd) || (reg >= 0x1e5 && reg <= 0x1f8) ||
 719                 (reg == RT5645_EQ_CTRL2))
 720                 return true;
 721
 722         return false;
 723 }
 724
 725 static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
 726                         struct snd_ctl_elem_value *ucontrol)
 727 {
 728         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 729         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 730         struct rt5645_eq_param_s_be16 *eq_param =
 731                 (struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
 732         int i;
 733
 734         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 735                 rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
 736                 rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
 737         }
 738
 739         /* The final setting of the table should be RT5645_EQ_CTRL2 */
 740         for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
 741                 if (rt5645->eq_param[i].reg == 0)
 742                         continue;
 743                 else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
 744                         return 0;
 745                 else
 746                         break;
 747         }
 748
 749         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 750                 if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
 751                     rt5645->eq_param[i].reg != 0)
 752                         return 0;
 753                 else if (rt5645->eq_param[i].reg == 0)
 754                         break;
 755         }
 756
 757         return 0;
 758 }
 759
 760 #define RT5645_HWEQ(xname) \
 761 {       .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
 762         .info = rt5645_hweq_info, \
 763         .get = rt5645_hweq_get, \
 764         .put = rt5645_hweq_put \
 765 }
 766
 767 static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
 768                 struct snd_ctl_elem_value *ucontrol)
 769 {
 770         struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
 771         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 772         int ret;
 773
 774         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
 775                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
 776
 777         ret = snd_soc_put_volsw(kcontrol, ucontrol);
 778
 779         mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
 780                 msecs_to_jiffies(200));
 781
 782         return ret;
 783 }
 784
 785 static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
 786         "immediately", "zero crossing", "soft ramp"
 787 };
 788
 789 static SOC_ENUM_SINGLE_DECL(
 790         rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
 791         RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
 792
 793 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
 794         /* Speaker Output Volume */
 795         SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
 796                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 797         SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
 798                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
 799                 rt5645_spk_put_volsw, out_vol_tlv),
 800
 801         /* ClassD modulator Speaker Gain Ratio */
 802         SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
 803                 RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
 804
 805         /* Headphone Output Volume */
 806         SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
 807                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 808         SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
 809                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 810
 811         /* OUTPUT Control */
 812         SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
 813                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 814         SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
 815                 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
 816         SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
 817                 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
 818
 819         /* DAC Digital Volume */
 820         SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
 821                 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
 822         SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
 823                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 824         SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
 825                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
 826
 827         /* IN1/IN2 Control */
 828         SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
 829                 RT5645_BST_SFT1, 12, 0, bst_tlv),
 830         SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
 831                 RT5645_BST_SFT2, 8, 0, bst_tlv),
 832
 833         /* INL/INR Volume Control */
 834         SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
 835                 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
 836
 837         /* ADC Digital Volume Control */
 838         SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
 839                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 840         SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
 841                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 842         SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
 843                 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
 844         SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
 845                 RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
 846
 847         /* ADC Boost Volume Control */
 848         SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
 849                 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
 850                 adc_bst_tlv),
 851         SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
 852                 RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
 853                 adc_bst_tlv),
 854
 855         /* I2S2 function select */
 856         SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
 857                 1, 1),
 858         RT5645_HWEQ("Speaker HWEQ"),
 859
 860         /* Digital Soft Volume Control */
 861         SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
 862 };
 863
 864 /**
 865  * set_dmic_clk - Set parameter of dmic.
 866  *
 867  * @w: DAPM widget.
 868  * @kcontrol: The kcontrol of this widget.
 869  * @event: Event id.
 870  *
 871  */
 872 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 873         struct snd_kcontrol *kcontrol, int event)
 874 {
 875         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
 876         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 877         int idx, rate;
 878
 879         rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
 880                 RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
 881         idx = rl6231_calc_dmic_clk(rate);
 882         if (idx < 0)
 883                 dev_err(component->dev, "Failed to set DMIC clock\n");
 884         else
 885                 snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
 886                         RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
 887         return idx;
 888 }
 889
 890 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
 891                          struct snd_soc_dapm_widget *sink)
 892 {
 893         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 894         unsigned int val;
 895
 896         val = snd_soc_component_read(component, RT5645_GLB_CLK);
 897         val &= RT5645_SCLK_SRC_MASK;
 898         if (val == RT5645_SCLK_SRC_PLL1)
 899                 return 1;
 900         else
 901                 return 0;
 902 }
 903
 904 static int is_using_asrc(struct snd_soc_dapm_widget *source,
 905                          struct snd_soc_dapm_widget *sink)
 906 {
 907         struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
 908         unsigned int reg, shift, val;
 909
 910         switch (source->shift) {
 911         case 0:
 912                 reg = RT5645_ASRC_3;
 913                 shift = 0;
 914                 break;
 915         case 1:
 916                 reg = RT5645_ASRC_3;
 917                 shift = 4;
 918                 break;
 919         case 3:
 920                 reg = RT5645_ASRC_2;
 921                 shift = 0;
 922                 break;
 923         case 8:
 924                 reg = RT5645_ASRC_2;
 925                 shift = 4;
 926                 break;
 927         case 9:
 928                 reg = RT5645_ASRC_2;
 929                 shift = 8;
 930                 break;
 931         case 10:
 932                 reg = RT5645_ASRC_2;
 933                 shift = 12;
 934                 break;
 935         default:
 936                 return 0;
 937         }
 938
 939         val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
 940         switch (val) {
 941         case 1:
 942         case 2:
 943         case 3:
 944         case 4:
 945                 return 1;
 946         default:
 947                 return 0;
 948         }
 949
 950 }
 951
 952 static int rt5645_enable_hweq(struct snd_soc_component *component)
 953 {
 954         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
 955         int i;
 956
 957         for (i = 0; i < RT5645_HWEQ_NUM; i++) {
 958                 if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
 959                         regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
 960                                         rt5645->eq_param[i].val);
 961                 else
 962                         break;
 963         }
 964
 965         return 0;
 966 }
 967
 968 /**
 969  * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
 970  * @component: SoC audio component device.
 971  * @filter_mask: mask of filters.
 972  * @clk_src: clock source
 973  *
 974  * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
 975  * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
 976  * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
 977  * ASRC function will track i2s clock and generate a corresponding system clock
 978  * for codec. This function provides an API to select the clock source for a
 979  * set of filters specified by the mask. And the codec driver will turn on ASRC
 980  * for these filters if ASRC is selected as their clock source.
 981  */
 982 int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
 983                 unsigned int filter_mask, unsigned int clk_src)
 984 {
 985         unsigned int asrc2_mask = 0;
 986         unsigned int asrc2_value = 0;
 987         unsigned int asrc3_mask = 0;
 988         unsigned int asrc3_value = 0;
 989
 990         switch (clk_src) {
 991         case RT5645_CLK_SEL_SYS:
 992         case RT5645_CLK_SEL_I2S1_ASRC:
 993         case RT5645_CLK_SEL_I2S2_ASRC:
 994         case RT5645_CLK_SEL_SYS2:
 995                 break;
 996
 997         default:
 998                 return -EINVAL;
 999         }
1000
1001         if (filter_mask & RT5645_DA_STEREO_FILTER) {
1002                 asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
1003                 asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
1004                         | (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
1005         }
1006
1007         if (filter_mask & RT5645_DA_MONO_L_FILTER) {
1008                 asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
1009                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
1010                         | (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
1011         }
1012
1013         if (filter_mask & RT5645_DA_MONO_R_FILTER) {
1014                 asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
1015                 asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
1016                         | (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
1017         }
1018
1019         if (filter_mask & RT5645_AD_STEREO_FILTER) {
1020                 asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
1021                 asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
1022                         | (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
1023         }
1024
1025         if (filter_mask & RT5645_AD_MONO_L_FILTER) {
1026                 asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
1027                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)
1028                         | (clk_src << RT5645_AD_MONOL_CLK_SEL_SFT);
1029         }
1030
1031         if (filter_mask & RT5645_AD_MONO_R_FILTER)  {
1032                 asrc3_mask |= RT5645_AD_MONOR_CLK_SEL_MASK;
1033                 asrc3_value = (asrc3_value & ~RT5645_AD_MONOR_CLK_SEL_MASK)
1034                         | (clk_src << RT5645_AD_MONOR_CLK_SEL_SFT);
1035         }
1036
1037         if (asrc2_mask)
1038                 snd_soc_component_update_bits(component, RT5645_ASRC_2,
1039                         asrc2_mask, asrc2_value);
1040
1041         if (asrc3_mask)
1042                 snd_soc_component_update_bits(component, RT5645_ASRC_3,
1043                         asrc3_mask, asrc3_value);
1044
1045         return 0;
1046 }
1047 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src);
1048
1049 /* Digital Mixer */
1050 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
1051         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1052                         RT5645_M_ADC_L1_SFT, 1, 1),
1053         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1054                         RT5645_M_ADC_L2_SFT, 1, 1),
1055 };
1056
1057 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
1058         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
1059                         RT5645_M_ADC_R1_SFT, 1, 1),
1060         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
1061                         RT5645_M_ADC_R2_SFT, 1, 1),
1062 };
1063
1064 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
1065         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1066                         RT5645_M_MONO_ADC_L1_SFT, 1, 1),
1067         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1068                         RT5645_M_MONO_ADC_L2_SFT, 1, 1),
1069 };
1070
1071 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
1072         SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
1073                         RT5645_M_MONO_ADC_R1_SFT, 1, 1),
1074         SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
1075                         RT5645_M_MONO_ADC_R2_SFT, 1, 1),
1076 };
1077
1078 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
1079         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1080                         RT5645_M_ADCMIX_L_SFT, 1, 1),
1081         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1082                         RT5645_M_DAC1_L_SFT, 1, 1),
1083 };
1084
1085 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
1086         SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
1087                         RT5645_M_ADCMIX_R_SFT, 1, 1),
1088         SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER,
1089                         RT5645_M_DAC1_R_SFT, 1, 1),
1090 };
1091
1092 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
1093         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1094                         RT5645_M_DAC_L1_SFT, 1, 1),
1095         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
1096                         RT5645_M_DAC_L2_SFT, 1, 1),
1097         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1098                         RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
1099 };
1100
1101 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
1102         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
1103                         RT5645_M_DAC_R1_SFT, 1, 1),
1104         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
1105                         RT5645_M_DAC_R2_SFT, 1, 1),
1106         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
1107                         RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
1108 };
1109
1110 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
1111         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
1112                         RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
1113         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1114                         RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
1115         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1116                         RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
1117 };
1118
1119 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
1120         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
1121                         RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
1122         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
1123                         RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
1124         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
1125                         RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
1126 };
1127
1128 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
1129         SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
1130                         RT5645_M_STO_L_DAC_L_SFT, 1, 1),
1131         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1132                         RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
1133         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1134                         RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
1135 };
1136
1137 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
1138         SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
1139                         RT5645_M_STO_R_DAC_R_SFT, 1, 1),
1140         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
1141                         RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
1142         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
1143                         RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
1144 };
1145
1146 /* Analog Input Mixer */
1147 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
1148         SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
1149                         RT5645_M_HP_L_RM_L_SFT, 1, 1),
1150         SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
1151                         RT5645_M_IN_L_RM_L_SFT, 1, 1),
1152         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
1153                         RT5645_M_BST2_RM_L_SFT, 1, 1),
1154         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
1155                         RT5645_M_BST1_RM_L_SFT, 1, 1),
1156         SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
1157                         RT5645_M_OM_L_RM_L_SFT, 1, 1),
1158 };
1159
1160 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
1161         SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
1162                         RT5645_M_HP_R_RM_R_SFT, 1, 1),
1163         SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
1164                         RT5645_M_IN_R_RM_R_SFT, 1, 1),
1165         SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
1166                         RT5645_M_BST2_RM_R_SFT, 1, 1),
1167         SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
1168                         RT5645_M_BST1_RM_R_SFT, 1, 1),
1169         SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
1170                         RT5645_M_OM_R_RM_R_SFT, 1, 1),
1171 };
1172
1173 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
1174         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
1175                         RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
1176         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
1177                         RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
1178         SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
1179                         RT5645_M_IN_L_SM_L_SFT, 1, 1),
1180         SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
1181                         RT5645_M_BST1_L_SM_L_SFT, 1, 1),
1182 };
1183
1184 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
1185         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
1186                         RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
1187         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
1188                         RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
1189         SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
1190                         RT5645_M_IN_R_SM_R_SFT, 1, 1),
1191         SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
1192                         RT5645_M_BST2_R_SM_R_SFT, 1, 1),
1193 };
1194
1195 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
1196         SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
1197                         RT5645_M_BST1_OM_L_SFT, 1, 1),
1198         SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
1199                         RT5645_M_IN_L_OM_L_SFT, 1, 1),
1200         SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
1201                         RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
1202         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
1203                         RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
1204 };
1205
1206 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
1207         SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
1208                         RT5645_M_BST2_OM_R_SFT, 1, 1),
1209         SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
1210                         RT5645_M_IN_R_OM_R_SFT, 1, 1),
1211         SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
1212                         RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
1213         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
1214                         RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
1215 };
1216
1217 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
1218         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1219                         RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
1220         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
1221                         RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
1222         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1223                         RT5645_M_SV_R_SPM_L_SFT, 1, 1),
1224         SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
1225                         RT5645_M_SV_L_SPM_L_SFT, 1, 1),
1226 };
1227
1228 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
1229         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
1230                         RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
1231         SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
1232                         RT5645_M_SV_R_SPM_R_SFT, 1, 1),
1233 };
1234
1235 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
1236         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
1237                         RT5645_M_DAC1_HM_SFT, 1, 1),
1238         SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
1239                         RT5645_M_HPVOL_HM_SFT, 1, 1),
1240 };
1241
1242 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
1243         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
1244                         RT5645_M_DAC1_HV_SFT, 1, 1),
1245         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
1246                         RT5645_M_DAC2_HV_SFT, 1, 1),
1247         SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
1248                         RT5645_M_IN_HV_SFT, 1, 1),
1249         SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
1250                         RT5645_M_BST1_HV_SFT, 1, 1),
1251 };
1252
1253 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
1254         SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
1255                         RT5645_M_DAC1_HV_SFT, 1, 1),
1256         SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
1257                         RT5645_M_DAC2_HV_SFT, 1, 1),
1258         SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
1259                         RT5645_M_IN_HV_SFT, 1, 1),
1260         SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
1261                         RT5645_M_BST2_HV_SFT, 1, 1),
1262 };
1263
1264 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
1265         SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
1266                         RT5645_M_DAC_L1_LM_SFT, 1, 1),
1267         SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
1268                         RT5645_M_DAC_R1_LM_SFT, 1, 1),
1269         SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
1270                         RT5645_M_OV_L_LM_SFT, 1, 1),
1271         SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
1272                         RT5645_M_OV_R_LM_SFT, 1, 1),
1273 };
1274
1275 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1276 static const char * const rt5645_dac1_src[] = {
1277         "IF1 DAC", "IF2 DAC", "IF3 DAC"
1278 };
1279
1280 static SOC_ENUM_SINGLE_DECL(
1281         rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
1282         RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
1283
1284 static const struct snd_kcontrol_new rt5645_dac1l_mux =
1285         SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
1286
1287 static SOC_ENUM_SINGLE_DECL(
1288         rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
1289         RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
1290
1291 static const struct snd_kcontrol_new rt5645_dac1r_mux =
1292         SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
1293
1294 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1295 static const char * const rt5645_dac12_src[] = {
1296         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1297 };
1298
1299 static SOC_ENUM_SINGLE_DECL(
1300         rt5645_dac2l_enum, RT5645_DAC_CTRL,
1301         RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
1302
1303 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
1304         SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
1305
1306 static const char * const rt5645_dacr2_src[] = {
1307         "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1308 };
1309
1310 static SOC_ENUM_SINGLE_DECL(
1311         rt5645_dac2r_enum, RT5645_DAC_CTRL,
1312         RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
1313
1314 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
1315         SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
1316
1317 /* Stereo1 ADC source */
1318 /* MX-27 [12] */
1319 static const char * const rt5645_stereo_adc1_src[] = {
1320         "DAC MIX", "ADC"
1321 };
1322
1323 static SOC_ENUM_SINGLE_DECL(
1324         rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
1325         RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
1326
1327 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
1328         SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
1329
1330 /* MX-27 [11] */
1331 static const char * const rt5645_stereo_adc2_src[] = {
1332         "DAC MIX", "DMIC"
1333 };
1334
1335 static SOC_ENUM_SINGLE_DECL(
1336         rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
1337         RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
1338
1339 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
1340         SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
1341
1342 /* MX-27 [8] */
1343 static const char * const rt5645_stereo_dmic_src[] = {
1344         "DMIC1", "DMIC2"
1345 };
1346
1347 static SOC_ENUM_SINGLE_DECL(
1348         rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
1349         RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
1350
1351 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
1352         SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
1353
1354 /* Mono ADC source */
1355 /* MX-28 [12] */
1356 static const char * const rt5645_mono_adc_l1_src[] = {
1357         "Mono DAC MIXL", "ADC"
1358 };
1359
1360 static SOC_ENUM_SINGLE_DECL(
1361         rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
1362         RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
1363
1364 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
1365         SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
1366 /* MX-28 [11] */
1367 static const char * const rt5645_mono_adc_l2_src[] = {
1368         "Mono DAC MIXL", "DMIC"
1369 };
1370
1371 static SOC_ENUM_SINGLE_DECL(
1372         rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
1373         RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
1374
1375 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
1376         SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
1377
1378 /* MX-28 [8] */
1379 static const char * const rt5645_mono_dmic_src[] = {
1380         "DMIC1", "DMIC2"
1381 };
1382
1383 static SOC_ENUM_SINGLE_DECL(
1384         rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
1385         RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
1386
1387 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
1388         SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
1389 /* MX-28 [1:0] */
1390 static SOC_ENUM_SINGLE_DECL(
1391         rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
1392         RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
1393
1394 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
1395         SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
1396 /* MX-28 [4] */
1397 static const char * const rt5645_mono_adc_r1_src[] = {
1398         "Mono DAC MIXR", "ADC"
1399 };
1400
1401 static SOC_ENUM_SINGLE_DECL(
1402         rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
1403         RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
1404
1405 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
1406         SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
1407 /* MX-28 [3] */
1408 static const char * const rt5645_mono_adc_r2_src[] = {
1409         "Mono DAC MIXR", "DMIC"
1410 };
1411
1412 static SOC_ENUM_SINGLE_DECL(
1413         rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
1414         RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
1415
1416 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
1417         SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
1418
1419 /* MX-77 [9:8] */
1420 static const char * const rt5645_if1_adc_in_src[] = {
1421         "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1422         "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1423 };
1424
1425 static SOC_ENUM_SINGLE_DECL(
1426         rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
1427         RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
1428
1429 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
1430         SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
1431
1432 /* MX-78 [4:0] */
1433 static const char * const rt5650_if1_adc_in_src[] = {
1434         "IF_ADC1/IF_ADC2/DAC_REF/Null",
1435         "IF_ADC1/IF_ADC2/Null/DAC_REF",
1436         "IF_ADC1/DAC_REF/IF_ADC2/Null",
1437         "IF_ADC1/DAC_REF/Null/IF_ADC2",
1438         "IF_ADC1/Null/DAC_REF/IF_ADC2",
1439         "IF_ADC1/Null/IF_ADC2/DAC_REF",
1440
1441         "IF_ADC2/IF_ADC1/DAC_REF/Null",
1442         "IF_ADC2/IF_ADC1/Null/DAC_REF",
1443         "IF_ADC2/DAC_REF/IF_ADC1/Null",
1444         "IF_ADC2/DAC_REF/Null/IF_ADC1",
1445         "IF_ADC2/Null/DAC_REF/IF_ADC1",
1446         "IF_ADC2/Null/IF_ADC1/DAC_REF",
1447
1448         "DAC_REF/IF_ADC1/IF_ADC2/Null",
1449         "DAC_REF/IF_ADC1/Null/IF_ADC2",
1450         "DAC_REF/IF_ADC2/IF_ADC1/Null",
1451         "DAC_REF/IF_ADC2/Null/IF_ADC1",
1452         "DAC_REF/Null/IF_ADC1/IF_ADC2",
1453         "DAC_REF/Null/IF_ADC2/IF_ADC1",
1454
1455         "Null/IF_ADC1/IF_ADC2/DAC_REF",
1456         "Null/IF_ADC1/DAC_REF/IF_ADC2",
1457         "Null/IF_ADC2/IF_ADC1/DAC_REF",
1458         "Null/IF_ADC2/DAC_REF/IF_ADC1",
1459         "Null/DAC_REF/IF_ADC1/IF_ADC2",
1460         "Null/DAC_REF/IF_ADC2/IF_ADC1",
1461 };
1462
1463 static SOC_ENUM_SINGLE_DECL(
1464         rt5650_if1_adc_in_enum, RT5645_TDM_CTRL_2,
1465         0, rt5650_if1_adc_in_src);
1466
1467 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux =
1468         SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum);
1469
1470 /* MX-78 [15:14][13:12][11:10] */
1471 static const char * const rt5645_tdm_adc_swap_select[] = {
1472         "L/R", "R/L", "L/L", "R/R"
1473 };
1474
1475 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum,
1476         RT5645_TDM_CTRL_2, 14, rt5645_tdm_adc_swap_select);
1477
1478 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux =
1479         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum);
1480
1481 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum,
1482         RT5645_TDM_CTRL_2, 12, rt5645_tdm_adc_swap_select);
1483
1484 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux =
1485         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum);
1486
1487 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum,
1488         RT5645_TDM_CTRL_2, 10, rt5645_tdm_adc_swap_select);
1489
1490 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux =
1491         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum);
1492
1493 /* MX-77 [7:6][5:4][3:2] */
1494 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
1495         RT5645_TDM_CTRL_1, 6, rt5645_tdm_adc_swap_select);
1496
1497 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux =
1498         SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum);
1499
1500 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
1501         RT5645_TDM_CTRL_1, 4, rt5645_tdm_adc_swap_select);
1502
1503 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux =
1504         SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum);
1505
1506 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
1507         RT5645_TDM_CTRL_1, 2, rt5645_tdm_adc_swap_select);
1508
1509 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux =
1510         SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum);
1511
1512 /* MX-79 [14:12][10:8][6:4][2:0] */
1513 static const char * const rt5645_tdm_dac_swap_select[] = {
1514         "Slot0", "Slot1", "Slot2", "Slot3"
1515 };
1516
1517 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum,
1518         RT5645_TDM_CTRL_3, 12, rt5645_tdm_dac_swap_select);
1519
1520 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux =
1521         SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum);
1522
1523 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum,
1524         RT5645_TDM_CTRL_3, 8, rt5645_tdm_dac_swap_select);
1525
1526 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux =
1527         SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum);
1528
1529 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum,
1530         RT5645_TDM_CTRL_3, 4, rt5645_tdm_dac_swap_select);
1531
1532 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux =
1533         SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum);
1534
1535 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum,
1536         RT5645_TDM_CTRL_3, 0, rt5645_tdm_dac_swap_select);
1537
1538 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux =
1539         SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum);
1540
1541 /* MX-7a [14:12][10:8][6:4][2:0] */
1542 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum,
1543         RT5650_TDM_CTRL_4, 12, rt5645_tdm_dac_swap_select);
1544
1545 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux =
1546         SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum);
1547
1548 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum,
1549         RT5650_TDM_CTRL_4, 8, rt5645_tdm_dac_swap_select);
1550
1551 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux =
1552         SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum);
1553
1554 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum,
1555         RT5650_TDM_CTRL_4, 4, rt5645_tdm_dac_swap_select);
1556
1557 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux =
1558         SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum);
1559
1560 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum,
1561         RT5650_TDM_CTRL_4, 0, rt5645_tdm_dac_swap_select);
1562
1563 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux =
1564         SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum);
1565
1566 /* MX-2d [3] [2] */
1567 static const char * const rt5650_a_dac1_src[] = {
1568         "DAC1", "Stereo DAC Mixer"
1569 };
1570
1571 static SOC_ENUM_SINGLE_DECL(
1572         rt5650_a_dac1_l_enum, RT5650_A_DAC_SOUR,
1573         RT5650_A_DAC1_L_IN_SFT, rt5650_a_dac1_src);
1574
1575 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux =
1576         SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum);
1577
1578 static SOC_ENUM_SINGLE_DECL(
1579         rt5650_a_dac1_r_enum, RT5650_A_DAC_SOUR,
1580         RT5650_A_DAC1_R_IN_SFT, rt5650_a_dac1_src);
1581
1582 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux =
1583         SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum);
1584
1585 /* MX-2d [1] [0] */
1586 static const char * const rt5650_a_dac2_src[] = {
1587         "Stereo DAC Mixer", "Mono DAC Mixer"
1588 };
1589
1590 static SOC_ENUM_SINGLE_DECL(
1591         rt5650_a_dac2_l_enum, RT5650_A_DAC_SOUR,
1592         RT5650_A_DAC2_L_IN_SFT, rt5650_a_dac2_src);
1593
1594 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux =
1595         SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum);
1596
1597 static SOC_ENUM_SINGLE_DECL(
1598         rt5650_a_dac2_r_enum, RT5650_A_DAC_SOUR,
1599         RT5650_A_DAC2_R_IN_SFT, rt5650_a_dac2_src);
1600
1601 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux =
1602         SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum);
1603
1604 /* MX-2F [13:12] */
1605 static const char * const rt5645_if2_adc_in_src[] = {
1606         "IF_ADC1", "IF_ADC2", "VAD_ADC"
1607 };
1608
1609 static SOC_ENUM_SINGLE_DECL(
1610         rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
1611         RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
1612
1613 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
1614         SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
1615
1616 /* MX-31 [15] [13] [11] [9] */
1617 static const char * const rt5645_pdm_src[] = {
1618         "Mono DAC", "Stereo DAC"
1619 };
1620
1621 static SOC_ENUM_SINGLE_DECL(
1622         rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
1623         RT5645_PDM1_L_SFT, rt5645_pdm_src);
1624
1625 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
1626         SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
1627
1628 static SOC_ENUM_SINGLE_DECL(
1629         rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
1630         RT5645_PDM1_R_SFT, rt5645_pdm_src);
1631
1632 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1633         SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1634
1635 /* MX-9D [9:8] */
1636 static const char * const rt5645_vad_adc_src[] = {
1637         "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1638 };
1639
1640 static SOC_ENUM_SINGLE_DECL(
1641         rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1642         RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1643
1644 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1645         SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1646
1647 static const struct snd_kcontrol_new spk_l_vol_control =
1648         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1649                 RT5645_L_MUTE_SFT, 1, 1);
1650
1651 static const struct snd_kcontrol_new spk_r_vol_control =
1652         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1653                 RT5645_R_MUTE_SFT, 1, 1);
1654
1655 static const struct snd_kcontrol_new hp_l_vol_control =
1656         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1657                 RT5645_L_MUTE_SFT, 1, 1);
1658
1659 static const struct snd_kcontrol_new hp_r_vol_control =
1660         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1661                 RT5645_R_MUTE_SFT, 1, 1);
1662
1663 static const struct snd_kcontrol_new pdm1_l_vol_control =
1664         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1665                 RT5645_M_PDM1_L, 1, 1);
1666
1667 static const struct snd_kcontrol_new pdm1_r_vol_control =
1668         SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1669                 RT5645_M_PDM1_R, 1, 1);
1670
1671 static void hp_amp_power(struct snd_soc_component *component, int on)
1672 {
1673         static int hp_amp_power_count;
1674         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1675         int i, val;
1676
1677         if (on) {
1678                 if (hp_amp_power_count <= 0) {
1679                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1680                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x3100);
1681                                 snd_soc_component_write(component, RT5645_CHARGE_PUMP,
1682                                         0x0e06);
1683                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1684                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1685                                         RT5645_HP_DCC_INT1, 0x9f01);
1686                                 for (i = 0; i < 20; i++) {
1687                                         usleep_range(1000, 1500);
1688                                         regmap_read(rt5645->regmap, RT5645_PR_BASE +
1689                                                 RT5645_HP_DCC_INT1, &val);
1690                                         if (!(val & 0x8000))
1691                                                 break;
1692                                 }
1693                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1694                                         RT5645_HP_CO_MASK, RT5645_HP_CO_EN);
1695                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1696                                         0x3e, 0x7400);
1697                                 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1698                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1699                                         RT5645_MAMP_INT_REG2, 0xfc00);
1700                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1701                                 msleep(90);
1702                         } else {
1703                                 /* depop parameters */
1704                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1705                                         RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1706                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x000d);
1707                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1708                                         RT5645_HP_DCC_INT1, 0x9f01);
1709                                 mdelay(150);
1710                                 /* headphone amp power on */
1711                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1712                                         RT5645_PWR_FV1 | RT5645_PWR_FV2, 0);
1713                                 snd_soc_component_update_bits(component, RT5645_PWR_VOL,
1714                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1715                                         RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1716                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1717                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1718                                         RT5645_PWR_HA,
1719                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1720                                         RT5645_PWR_HA);
1721                                 mdelay(5);
1722                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1723                                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
1724                                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
1725
1726                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1727                                         RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1728                                         RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1729                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1730                                         0x14, 0x1aaa);
1731                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1732                                         0x24, 0x0430);
1733                         }
1734                 }
1735                 hp_amp_power_count++;
1736         } else {
1737                 hp_amp_power_count--;
1738                 if (hp_amp_power_count <= 0) {
1739                         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
1740                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1741                                         0x3e, 0x7400);
1742                                 snd_soc_component_write(component, RT5645_DEPOP_M3, 0x0737);
1743                                 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1744                                         RT5645_MAMP_INT_REG2, 0xfc00);
1745                                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
1746                                 msleep(100);
1747                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0001);
1748
1749                         } else {
1750                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1751                                         RT5645_HP_SG_MASK |
1752                                         RT5645_HP_L_SMT_MASK |
1753                                         RT5645_HP_R_SMT_MASK,
1754                                         RT5645_HP_SG_DIS |
1755                                         RT5645_HP_L_SMT_DIS |
1756                                         RT5645_HP_R_SMT_DIS);
1757                                 /* headphone amp power down */
1758                                 snd_soc_component_write(component, RT5645_DEPOP_M1, 0x0000);
1759                                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1760                                         RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1761                                         RT5645_PWR_HA, 0);
1762                                 snd_soc_component_update_bits(component, RT5645_DEPOP_M2,
1763                                         RT5645_DEPOP_MASK, 0);
1764                         }
1765                 }
1766         }
1767 }
1768
1769 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1770         struct snd_kcontrol *kcontrol, int event)
1771 {
1772         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1773         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
1774
1775         switch (event) {
1776         case SND_SOC_DAPM_POST_PMU:
1777                 hp_amp_power(component, 1);
1778                 /* headphone unmute sequence */
1779                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1780                         snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1781                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1782                                 RT5645_CP_FQ3_MASK,
1783                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1784                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1785                                 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1786                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1787                                 RT5645_MAMP_INT_REG2, 0xfc00);
1788                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1789                                 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1790                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1791                                 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1792                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1793                                 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1794                                 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1795                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1796                         msleep(40);
1797                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1798                                 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1799                                 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1800                                 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1801                 }
1802                 break;
1803
1804         case SND_SOC_DAPM_PRE_PMD:
1805                 /* headphone mute sequence */
1806                 if (rt5645->codec_type == CODEC_TYPE_RT5645) {
1807                         snd_soc_component_update_bits(component, RT5645_DEPOP_M3,
1808                                 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1809                                 RT5645_CP_FQ3_MASK,
1810                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1811                                 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1812                                 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1813                         regmap_write(rt5645->regmap, RT5645_PR_BASE +
1814                                 RT5645_MAMP_INT_REG2, 0xfc00);
1815                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1816                                 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1817                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1818                                 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1819                         snd_soc_component_update_bits(component, RT5645_DEPOP_M1,
1820                                 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1821                                 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1822                                 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1823                         msleep(30);
1824                 }
1825                 hp_amp_power(component, 0);
1826                 break;
1827
1828         default:
1829                 return 0;
1830         }
1831
1832         return 0;
1833 }
1834
1835 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1836         struct snd_kcontrol *kcontrol, int event)
1837 {
1838         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1839
1840         switch (event) {
1841         case SND_SOC_DAPM_POST_PMU:
1842                 rt5645_enable_hweq(component);
1843                 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1844                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1845                         RT5645_PWR_CLS_D_L,
1846                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1847                         RT5645_PWR_CLS_D_L);
1848                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1849                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_MODE1);
1850                 break;
1851
1852         case SND_SOC_DAPM_PRE_PMD:
1853                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL3,
1854                         RT5645_DET_CLK_MASK, RT5645_DET_CLK_DIS);
1855                 snd_soc_component_write(component, RT5645_EQ_CTRL2, 0);
1856                 snd_soc_component_update_bits(component, RT5645_PWR_DIG1,
1857                         RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1858                         RT5645_PWR_CLS_D_L, 0);
1859                 break;
1860
1861         default:
1862                 return 0;
1863         }
1864
1865         return 0;
1866 }
1867
1868 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1869         struct snd_kcontrol *kcontrol, int event)
1870 {
1871         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1872
1873         switch (event) {
1874         case SND_SOC_DAPM_POST_PMU:
1875                 hp_amp_power(component, 1);
1876                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1877                         RT5645_PWR_LM, RT5645_PWR_LM);
1878                 snd_soc_component_update_bits(component, RT5645_LOUT1,
1879                         RT5645_L_MUTE | RT5645_R_MUTE, 0);
1880                 break;
1881
1882         case SND_SOC_DAPM_PRE_PMD:
1883                 snd_soc_component_update_bits(component, RT5645_LOUT1,
1884                         RT5645_L_MUTE | RT5645_R_MUTE,
1885                         RT5645_L_MUTE | RT5645_R_MUTE);
1886                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
1887                         RT5645_PWR_LM, 0);
1888                 hp_amp_power(component, 0);
1889                 break;
1890
1891         default:
1892                 return 0;
1893         }
1894
1895         return 0;
1896 }
1897
1898 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1899         struct snd_kcontrol *kcontrol, int event)
1900 {
1901         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1902
1903         switch (event) {
1904         case SND_SOC_DAPM_POST_PMU:
1905                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1906                         RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1907                 break;
1908
1909         case SND_SOC_DAPM_PRE_PMD:
1910                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG2,
1911                         RT5645_PWR_BST2_P, 0);
1912                 break;
1913
1914         default:
1915                 return 0;
1916         }
1917
1918         return 0;
1919 }
1920
1921 static int rt5645_set_micbias1_event(struct snd_soc_dapm_widget *w,
1922                 struct snd_kcontrol *k, int  event)
1923 {
1924         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1925
1926         switch (event) {
1927         case SND_SOC_DAPM_PRE_PMU:
1928                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1929                         RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1930                         RT5645_MICBIAS1_POW_CTRL_SEL_M);
1931                 break;
1932
1933         case SND_SOC_DAPM_POST_PMD:
1934                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1935                         RT5645_MICBIAS1_POW_CTRL_SEL_MASK,
1936                         RT5645_MICBIAS1_POW_CTRL_SEL_A);
1937                 break;
1938
1939         default:
1940                 return 0;
1941         }
1942
1943         return 0;
1944 }
1945
1946 static int rt5645_set_micbias2_event(struct snd_soc_dapm_widget *w,
1947                 struct snd_kcontrol *k, int  event)
1948 {
1949         struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1950
1951         switch (event) {
1952         case SND_SOC_DAPM_PRE_PMU:
1953                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1954                         RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1955                         RT5645_MICBIAS2_POW_CTRL_SEL_M);
1956                 break;
1957
1958         case SND_SOC_DAPM_POST_PMD:
1959                 snd_soc_component_update_bits(component, RT5645_GEN_CTRL2,
1960                         RT5645_MICBIAS2_POW_CTRL_SEL_MASK,
1961                         RT5645_MICBIAS2_POW_CTRL_SEL_A);
1962                 break;
1963
1964         default:
1965                 return 0;
1966         }
1967
1968         return 0;
1969 }
1970
1971 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1972         SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1973                 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1974         SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1975                 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1976
1977         SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1978                 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1979         SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1980                 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1981
1982         /* ASRC */
1983         SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1,
1984                               11, 0, NULL, 0),
1985         SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1,
1986                               12, 0, NULL, 0),
1987         SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1,
1988                               10, 0, NULL, 0),
1989         SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1,
1990                               9, 0, NULL, 0),
1991         SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1,
1992                               8, 0, NULL, 0),
1993         SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1,
1994                               7, 0, NULL, 0),
1995         SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1,
1996                               5, 0, NULL, 0),
1997         SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1,
1998                               4, 0, NULL, 0),
1999         SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1,
2000                               3, 0, NULL, 0),
2001         SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1,
2002                               1, 0, NULL, 0),
2003         SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1,
2004                               0, 0, NULL, 0),
2005
2006         /* Input Side */
2007         /* micbias */
2008         SND_SOC_DAPM_SUPPLY("micbias1", RT5645_PWR_ANLG2,
2009                         RT5645_PWR_MB1_BIT, 0, rt5645_set_micbias1_event,
2010                         SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2011         SND_SOC_DAPM_SUPPLY("micbias2", RT5645_PWR_ANLG2,
2012                         RT5645_PWR_MB2_BIT, 0, rt5645_set_micbias2_event,
2013                         SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
2014         /* Input Lines */
2015         SND_SOC_DAPM_INPUT("DMIC L1"),
2016         SND_SOC_DAPM_INPUT("DMIC R1"),
2017         SND_SOC_DAPM_INPUT("DMIC L2"),
2018         SND_SOC_DAPM_INPUT("DMIC R2"),
2019
2020         SND_SOC_DAPM_INPUT("IN1P"),
2021         SND_SOC_DAPM_INPUT("IN1N"),
2022         SND_SOC_DAPM_INPUT("IN2P"),
2023         SND_SOC_DAPM_INPUT("IN2N"),
2024
2025         SND_SOC_DAPM_INPUT("Haptic Generator"),
2026
2027         SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2028         SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2029         SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2030                 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
2031         SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
2032                 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
2033         SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
2034                 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
2035         /* Boost */
2036         SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
2037                 RT5645_PWR_BST1_BIT, 0, NULL, 0),
2038         SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
2039                 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
2040                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2041         /* Input Volume */
2042         SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
2043                 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
2044         SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
2045                 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
2046         /* REC Mixer */
2047         SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
2048                         0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
2049         SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
2050                         0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
2051         /* ADCs */
2052         SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
2053         SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
2054
2055         SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
2056                 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
2057         SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
2058                 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
2059
2060         /* ADC Mux */
2061         SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
2062                 &rt5645_sto1_dmic_mux),
2063         SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2064                 &rt5645_sto_adc2_mux),
2065         SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2066                 &rt5645_sto_adc2_mux),
2067         SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2068                 &rt5645_sto_adc1_mux),
2069         SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2070                 &rt5645_sto_adc1_mux),
2071         SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
2072                 &rt5645_mono_dmic_l_mux),
2073         SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
2074                 &rt5645_mono_dmic_r_mux),
2075         SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
2076                 &rt5645_mono_adc_l2_mux),
2077         SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
2078                 &rt5645_mono_adc_l1_mux),
2079         SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
2080                 &rt5645_mono_adc_r1_mux),
2081         SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
2082                 &rt5645_mono_adc_r2_mux),
2083         /* ADC Mixer */
2084
2085         SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
2086                 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
2087         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
2088                 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
2089                 NULL, 0),
2090         SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
2091                 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
2092                 NULL, 0),
2093         SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
2094                 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
2095         SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
2096                 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
2097                 NULL, 0),
2098         SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
2099                 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
2100         SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
2101                 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
2102                 NULL, 0),
2103
2104         /* ADC PGA */
2105         SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
2106         SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
2107         SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
2108         SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2109         SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2110         SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2111         SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2112         SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2113         SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2114         SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
2115
2116         /* IF1 2 Mux */
2117         SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
2118                 0, 0, &rt5645_if2_adc_in_mux),
2119
2120         /* Digital Interface */
2121         SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
2122                 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
2123         SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM, 0, 0, NULL, 0),
2124         SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
2125         SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2126         SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM, 0, 0, NULL, 0),
2127         SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2128         SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2129         SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2130         SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
2131                 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
2132         SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
2133         SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
2134         SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
2135         SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
2136
2137         /* Digital Interface Select */
2138         SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
2139                 0, 0, &rt5645_vad_adc_mux),
2140
2141         /* Audio Interface */
2142         SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
2143         SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
2144         SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
2145         SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
2146
2147         /* Output Side */
2148         /* DAC mixer before sound effect  */
2149         SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
2150                 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
2151         SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
2152                 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
2153
2154         /* DAC2 channel Mux */
2155         SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
2156         SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
2157         SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
2158                 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
2159         SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
2160                 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
2161
2162         SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
2163         SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
2164
2165         /* DAC Mixer */
2166         SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
2167                 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
2168         SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
2169                 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
2170         SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
2171                 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
2172         SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
2173                 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
2174         SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
2175                 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
2176         SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
2177                 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
2178         SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
2179                 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
2180         SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
2181                 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
2182         SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
2183                 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
2184
2185         /* DACs */
2186         SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
2187                 0),
2188         SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
2189                 0),
2190         SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
2191                 0),
2192         SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
2193                 0),
2194         /* OUT Mixer */
2195         SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
2196                 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
2197         SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
2198                 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
2199         SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
2200                 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
2201         SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
2202                 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
2203         /* Ouput Volume */
2204         SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
2205                 &spk_l_vol_control),
2206         SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
2207                 &spk_r_vol_control),
2208         SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
2209                 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
2210         SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
2211                 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
2212         SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
2213                 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
2214         SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
2215                 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
2216         SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
2217         SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
2218         SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
2219         SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
2220         SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
2221
2222         /* HPO/LOUT/Mono Mixer */
2223         SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
2224                 ARRAY_SIZE(rt5645_spo_l_mix)),
2225         SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
2226                 ARRAY_SIZE(rt5645_spo_r_mix)),
2227         SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
2228                 ARRAY_SIZE(rt5645_hpo_mix)),
2229         SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
2230                 ARRAY_SIZE(rt5645_lout_mix)),
2231
2232         SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
2233                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2234         SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
2235                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2236         SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
2237                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
2238
2239         /* PDM */
2240         SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
2241                 0, NULL, 0),
2242         SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
2243         SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
2244
2245         SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
2246         SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
2247
2248         /* Output Lines */
2249         SND_SOC_DAPM_OUTPUT("HPOL"),
2250         SND_SOC_DAPM_OUTPUT("HPOR"),
2251         SND_SOC_DAPM_OUTPUT("LOUTL"),
2252         SND_SOC_DAPM_OUTPUT("LOUTR"),
2253         SND_SOC_DAPM_OUTPUT("PDM1L"),
2254         SND_SOC_DAPM_OUTPUT("PDM1R"),
2255         SND_SOC_DAPM_OUTPUT("SPOL"),
2256         SND_SOC_DAPM_OUTPUT("SPOR"),
2257 };
2258
2259 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets[] = {
2260         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2261                 &rt5645_if1_dac0_tdm_sel_mux),
2262         SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2263                 &rt5645_if1_dac1_tdm_sel_mux),
2264         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2265                 &rt5645_if1_dac2_tdm_sel_mux),
2266         SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2267                 &rt5645_if1_dac3_tdm_sel_mux),
2268         SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM,
2269                 0, 0, &rt5645_if1_adc_in_mux),
2270         SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2271                 0, 0, &rt5645_if1_adc1_in_mux),
2272         SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2273                 0, 0, &rt5645_if1_adc2_in_mux),
2274         SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2275                 0, 0, &rt5645_if1_adc3_in_mux),
2276 };
2277
2278 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets[] = {
2279         SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM,
2280                 0, 0, &rt5650_a_dac1_l_mux),
2281         SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM,
2282                 0, 0, &rt5650_a_dac1_r_mux),
2283         SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM,
2284                 0, 0, &rt5650_a_dac2_l_mux),
2285         SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM,
2286                 0, 0, &rt5650_a_dac2_r_mux),
2287
2288         SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM,
2289                 0, 0, &rt5650_if1_adc1_in_mux),
2290         SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM,
2291                 0, 0, &rt5650_if1_adc2_in_mux),
2292         SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM,
2293                 0, 0, &rt5650_if1_adc3_in_mux),
2294         SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM,
2295                 0, 0, &rt5650_if1_adc_in_mux),
2296
2297         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM, 0, 0,
2298                 &rt5650_if1_dac0_tdm_sel_mux),
2299         SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM, 0, 0,
2300                 &rt5650_if1_dac1_tdm_sel_mux),
2301         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM, 0, 0,
2302                 &rt5650_if1_dac2_tdm_sel_mux),
2303         SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM, 0, 0,
2304                 &rt5650_if1_dac3_tdm_sel_mux),
2305 };
2306
2307 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
2308         { "adc stereo1 filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2309         { "adc mono left filter", NULL, "ADC MONO L ASRC", is_using_asrc },
2310         { "adc mono right filter", NULL, "ADC MONO R ASRC", is_using_asrc },
2311         { "dac mono left filter", NULL, "DAC MONO L ASRC", is_using_asrc },
2312         { "dac mono right filter", NULL, "DAC MONO R ASRC", is_using_asrc },
2313         { "dac stereo1 filter", NULL, "DAC STO ASRC", is_using_asrc },
2314
2315         { "I2S1", NULL, "I2S1 ASRC" },
2316         { "I2S2", NULL, "I2S2 ASRC" },
2317
2318         { "IN1P", NULL, "LDO2" },
2319         { "IN2P", NULL, "LDO2" },
2320
2321         { "DMIC1", NULL, "DMIC L1" },
2322         { "DMIC1", NULL, "DMIC R1" },
2323         { "DMIC2", NULL, "DMIC L2" },
2324         { "DMIC2", NULL, "DMIC R2" },
2325
2326         { "BST1", NULL, "IN1P" },
2327         { "BST1", NULL, "IN1N" },
2328         { "BST1", NULL, "JD Power" },
2329         { "BST1", NULL, "Mic Det Power" },
2330         { "BST2", NULL, "IN2P" },
2331         { "BST2", NULL, "IN2N" },
2332
2333         { "INL VOL", NULL, "IN2P" },
2334         { "INR VOL", NULL, "IN2N" },
2335
2336         { "RECMIXL", "HPOL Switch", "HPOL" },
2337         { "RECMIXL", "INL Switch", "INL VOL" },
2338         { "RECMIXL", "BST2 Switch", "BST2" },
2339         { "RECMIXL", "BST1 Switch", "BST1" },
2340         { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2341
2342         { "RECMIXR", "HPOR Switch", "HPOR" },
2343         { "RECMIXR", "INR Switch", "INR VOL" },
2344         { "RECMIXR", "BST2 Switch", "BST2" },
2345         { "RECMIXR", "BST1 Switch", "BST1" },
2346         { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2347
2348         { "ADC L", NULL, "RECMIXL" },
2349         { "ADC L", NULL, "ADC L power" },
2350         { "ADC R", NULL, "RECMIXR" },
2351         { "ADC R", NULL, "ADC R power" },
2352
2353         {"DMIC L1", NULL, "DMIC CLK"},
2354         {"DMIC L1", NULL, "DMIC1 Power"},
2355         {"DMIC R1", NULL, "DMIC CLK"},
2356         {"DMIC R1", NULL, "DMIC1 Power"},
2357         {"DMIC L2", NULL, "DMIC CLK"},
2358         {"DMIC L2", NULL, "DMIC2 Power"},
2359         {"DMIC R2", NULL, "DMIC CLK"},
2360         {"DMIC R2", NULL, "DMIC2 Power"},
2361
2362         { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2363         { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2364         { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC" },
2365
2366         { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2367         { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2368         { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC" },
2369
2370         { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2371         { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2372         { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC" },
2373
2374         { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2375         { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2376         { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2377         { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2378
2379         { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2380         { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2381         { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2382         { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2383
2384         { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2385         { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2386         { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2387         { "Mono ADC L1 Mux", "ADC", "ADC L" },
2388
2389         { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2390         { "Mono ADC R1 Mux", "ADC", "ADC R" },
2391         { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2392         { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2393
2394         { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2395         { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2396         { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2397         { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2398
2399         { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2400         { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
2401         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2402
2403         { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2404         { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
2405         { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
2406
2407         { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2408         { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2409         { "Mono ADC MIXL", NULL, "adc mono left filter" },
2410         { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
2411
2412         { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2413         { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2414         { "Mono ADC MIXR", NULL, "adc mono right filter" },
2415         { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
2416
2417         { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2418         { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2419         { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2420
2421         { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2422         { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2423         { "IF_ADC2", NULL, "Mono ADC MIXL" },
2424         { "IF_ADC2", NULL, "Mono ADC MIXR" },
2425         { "VAD_ADC", NULL, "VAD ADC Mux" },
2426
2427         { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2428         { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2429         { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2430
2431         { "IF1 ADC", NULL, "I2S1" },
2432         { "IF2 ADC", NULL, "I2S2" },
2433         { "IF2 ADC", NULL, "IF2 ADC Mux" },
2434
2435         { "AIF2TX", NULL, "IF2 ADC" },
2436
2437         { "IF1 DAC0", NULL, "AIF1RX" },
2438         { "IF1 DAC1", NULL, "AIF1RX" },
2439         { "IF1 DAC2", NULL, "AIF1RX" },
2440         { "IF1 DAC3", NULL, "AIF1RX" },
2441         { "IF2 DAC", NULL, "AIF2RX" },
2442
2443         { "IF1 DAC0", NULL, "I2S1" },
2444         { "IF1 DAC1", NULL, "I2S1" },
2445         { "IF1 DAC2", NULL, "I2S1" },
2446         { "IF1 DAC3", NULL, "I2S1" },
2447         { "IF2 DAC", NULL, "I2S2" },
2448
2449         { "IF2 DAC L", NULL, "IF2 DAC" },
2450         { "IF2 DAC R", NULL, "IF2 DAC" },
2451
2452         { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2453         { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2454
2455         { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2456         { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2457         { "DAC1 MIXL", NULL, "dac stereo1 filter" },
2458         { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2459         { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2460         { "DAC1 MIXR", NULL, "dac stereo1 filter" },
2461
2462         { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2463         { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2464         { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2465         { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2466         { "DAC L2 Volume", NULL, "dac mono left filter" },
2467
2468         { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2469         { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2470         { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2471         { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2472         { "DAC R2 Volume", NULL, "dac mono right filter" },
2473
2474         { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2475         { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2476         { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2477         { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
2478         { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2479         { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2480         { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2481         { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
2482
2483         { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2484         { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2485         { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2486         { "Mono DAC MIXL", NULL, "dac mono left filter" },
2487         { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2488         { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2489         { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2490         { "Mono DAC MIXR", NULL, "dac mono right filter" },
2491
2492         { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2493         { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2494         { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2495         { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2496         { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2497         { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2498
2499         { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
2500         { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
2501         { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
2502         { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
2503
2504         { "SPK MIXL", "BST1 Switch", "BST1" },
2505         { "SPK MIXL", "INL Switch", "INL VOL" },
2506         { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2507         { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2508         { "SPK MIXR", "BST2 Switch", "BST2" },
2509         { "SPK MIXR", "INR Switch", "INR VOL" },
2510         { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2511         { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2512
2513         { "OUT MIXL", "BST1 Switch", "BST1" },
2514         { "OUT MIXL", "INL Switch", "INL VOL" },
2515         { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2516         { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2517
2518         { "OUT MIXR", "BST2 Switch", "BST2" },
2519         { "OUT MIXR", "INR Switch", "INR VOL" },
2520         { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2521         { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2522
2523         { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2524         { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2525         { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2526         { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2527         { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
2528         { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2529         { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2530         { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2531         { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2532         { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
2533
2534         { "DAC 2", NULL, "DAC L2" },
2535         { "DAC 2", NULL, "DAC R2" },
2536         { "DAC 1", NULL, "DAC L1" },
2537         { "DAC 1", NULL, "DAC R1" },
2538         { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2539         { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2540         { "HPOVOL", NULL, "HPOVOL L" },
2541         { "HPOVOL", NULL, "HPOVOL R" },
2542         { "HPO MIX", "DAC1 Switch", "DAC 1" },
2543         { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2544
2545         { "SPKVOL L", "Switch", "SPK MIXL" },
2546         { "SPKVOL R", "Switch", "SPK MIXR" },
2547
2548         { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2549         { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2550         { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2551         { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2552
2553         { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2554         { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2555         { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2556         { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2557
2558         { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2559         { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2560         { "PDM1 L Mux", NULL, "PDM1 Power" },
2561         { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2562         { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2563         { "PDM1 R Mux", NULL, "PDM1 Power" },
2564
2565         { "HP amp", NULL, "HPO MIX" },
2566         { "HP amp", NULL, "JD Power" },
2567         { "HP amp", NULL, "Mic Det Power" },
2568         { "HP amp", NULL, "LDO2" },
2569         { "HPOL", NULL, "HP amp" },
2570         { "HPOR", NULL, "HP amp" },
2571
2572         { "LOUT amp", NULL, "LOUT MIX" },
2573         { "LOUTL", NULL, "LOUT amp" },
2574         { "LOUTR", NULL, "LOUT amp" },
2575
2576         { "PDM1 L", "Switch", "PDM1 L Mux" },
2577         { "PDM1 R", "Switch", "PDM1 R Mux" },
2578
2579         { "PDM1L", NULL, "PDM1 L" },
2580         { "PDM1R", NULL, "PDM1 R" },
2581
2582         { "SPK amp", NULL, "SPOL MIX" },
2583         { "SPK amp", NULL, "SPOR MIX" },
2584         { "SPOL", NULL, "SPK amp" },
2585         { "SPOR", NULL, "SPK amp" },
2586 };
2587
2588 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes[] = {
2589         { "A DAC1 L Mux", "DAC1",  "DAC1 MIXL"},
2590         { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2591         { "A DAC1 R Mux", "DAC1",  "DAC1 MIXR"},
2592         { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2593
2594         { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2595         { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2596         { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2597         { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2598
2599         { "DAC L1", NULL, "A DAC1 L Mux" },
2600         { "DAC R1", NULL, "A DAC1 R Mux" },
2601         { "DAC L2", NULL, "A DAC2 L Mux" },
2602         { "DAC R2", NULL, "A DAC2 R Mux" },
2603
2604         { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2605         { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2606         { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2607         { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2608
2609         { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2610         { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2611         { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2612         { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2613
2614         { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2615         { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2616         { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2617         { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2618
2619         { "IF1 ADC", NULL, "RT5650 IF1 ADC1 Swap Mux" },
2620         { "IF1 ADC", NULL, "RT5650 IF1 ADC2 Swap Mux" },
2621         { "IF1 ADC", NULL, "RT5650 IF1 ADC3 Swap Mux" },
2622
2623         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2624         { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2625         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2626         { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2627         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2628         { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2629
2630         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2631         { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2632         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2633         { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2634         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2635         { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2636
2637         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2638         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2639         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2640         { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2641         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2642         { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2643
2644         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2645         { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2646         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2647         { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2648         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2649         { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2650         { "AIF1TX", NULL, "RT5650 IF1 ADC Mux" },
2651
2652         { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2653         { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2654         { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2655         { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2656
2657         { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2658         { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2659         { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2660         { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2661
2662         { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2663         { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2664         { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2665         { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2666
2667         { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2668         { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2669         { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2670         { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2671
2672         { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2673         { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2674
2675         { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2676         { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2677 };
2678
2679 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes[] = {
2680         { "DAC L1", NULL, "Stereo DAC MIXL" },
2681         { "DAC R1", NULL, "Stereo DAC MIXR" },
2682         { "DAC L2", NULL, "Mono DAC MIXL" },
2683         { "DAC R2", NULL, "Mono DAC MIXR" },
2684
2685         { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2686         { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2687         { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2688         { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2689
2690         { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2691         { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2692         { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2693         { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2694
2695         { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2696         { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2697         { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2698         { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2699
2700         { "IF1 ADC", NULL, "RT5645 IF1 ADC1 Swap Mux" },
2701         { "IF1 ADC", NULL, "RT5645 IF1 ADC2 Swap Mux" },
2702         { "IF1 ADC", NULL, "RT5645 IF1 ADC3 Swap Mux" },
2703
2704         { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2705         { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2706         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2707         { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2708         { "AIF1TX", NULL, "RT5645 IF1 ADC Mux" },
2709
2710         { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2711         { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2712         { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2713         { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2714
2715         { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2716         { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2717         { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2718         { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2719
2720         { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2721         { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2722         { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2723         { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2724
2725         { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2726         { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2727         { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2728         { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2729
2730         { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2731         { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2732
2733         { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2734         { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2735 };
2736
2737 static const struct snd_soc_dapm_route rt5645_old_dapm_routes[] = {
2738         { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2739         { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2740 };
2741
2742 static int rt5645_hw_params(struct snd_pcm_substream *substream,
2743         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2744 {
2745         struct snd_soc_component *component = dai->component;
2746         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2747         unsigned int val_len = 0, val_clk, mask_clk, dl_sft;
2748         int pre_div, bclk_ms, frame_size;
2749
2750         rt5645->lrck[dai->id] = params_rate(params);
2751         pre_div = rl6231_get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
2752         if (pre_div < 0) {
2753                 dev_err(component->dev, "Unsupported clock setting\n");
2754                 return -EINVAL;
2755         }
2756         frame_size = snd_soc_params_to_frame_size(params);
2757         if (frame_size < 0) {
2758                 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2759                 return -EINVAL;
2760         }
2761
2762         switch (rt5645->codec_type) {
2763         case CODEC_TYPE_RT5650:
2764                 dl_sft = 4;
2765                 break;
2766         default:
2767                 dl_sft = 2;
2768                 break;
2769         }
2770
2771         bclk_ms = frame_size > 32;
2772         rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
2773
2774         dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2775                 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
2776         dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2777                                 bclk_ms, pre_div, dai->id);
2778
2779         switch (params_width(params)) {
2780         case 16:
2781                 break;
2782         case 20:
2783                 val_len = 0x1;
2784                 break;
2785         case 24:
2786                 val_len = 0x2;
2787                 break;
2788         case 8:
2789                 val_len = 0x3;
2790                 break;
2791         default:
2792                 return -EINVAL;
2793         }
2794
2795         switch (dai->id) {
2796         case RT5645_AIF1:
2797                 mask_clk = RT5645_I2S_PD1_MASK;
2798                 val_clk = pre_div << RT5645_I2S_PD1_SFT;
2799                 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2800                         (0x3 << dl_sft), (val_len << dl_sft));
2801                 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2802                 break;
2803         case  RT5645_AIF2:
2804                 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
2805                 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
2806                         pre_div << RT5645_I2S_PD2_SFT;
2807                 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2808                         (0x3 << dl_sft), (val_len << dl_sft));
2809                 snd_soc_component_update_bits(component, RT5645_ADDA_CLK1, mask_clk, val_clk);
2810                 break;
2811         default:
2812                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2813                 return -EINVAL;
2814         }
2815
2816         return 0;
2817 }
2818
2819 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2820 {
2821         struct snd_soc_component *component = dai->component;
2822         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2823         unsigned int reg_val = 0, pol_sft;
2824
2825         switch (rt5645->codec_type) {
2826         case CODEC_TYPE_RT5650:
2827                 pol_sft = 8;
2828                 break;
2829         default:
2830                 pol_sft = 7;
2831                 break;
2832         }
2833
2834         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2835         case SND_SOC_DAIFMT_CBM_CFM:
2836                 rt5645->master[dai->id] = 1;
2837                 break;
2838         case SND_SOC_DAIFMT_CBS_CFS:
2839                 reg_val |= RT5645_I2S_MS_S;
2840                 rt5645->master[dai->id] = 0;
2841                 break;
2842         default:
2843                 return -EINVAL;
2844         }
2845
2846         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2847         case SND_SOC_DAIFMT_NB_NF:
2848                 break;
2849         case SND_SOC_DAIFMT_IB_NF:
2850                 reg_val |= (1 << pol_sft);
2851                 break;
2852         default:
2853                 return -EINVAL;
2854         }
2855
2856         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2857         case SND_SOC_DAIFMT_I2S:
2858                 break;
2859         case SND_SOC_DAIFMT_LEFT_J:
2860                 reg_val |= RT5645_I2S_DF_LEFT;
2861                 break;
2862         case SND_SOC_DAIFMT_DSP_A:
2863                 reg_val |= RT5645_I2S_DF_PCM_A;
2864                 break;
2865         case SND_SOC_DAIFMT_DSP_B:
2866                 reg_val |= RT5645_I2S_DF_PCM_B;
2867                 break;
2868         default:
2869                 return -EINVAL;
2870         }
2871         switch (dai->id) {
2872         case RT5645_AIF1:
2873                 snd_soc_component_update_bits(component, RT5645_I2S1_SDP,
2874                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2875                         RT5645_I2S_DF_MASK, reg_val);
2876                 break;
2877         case RT5645_AIF2:
2878                 snd_soc_component_update_bits(component, RT5645_I2S2_SDP,
2879                         RT5645_I2S_MS_MASK | (1 << pol_sft) |
2880                         RT5645_I2S_DF_MASK, reg_val);
2881                 break;
2882         default:
2883                 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2884                 return -EINVAL;
2885         }
2886         return 0;
2887 }
2888
2889 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
2890                 int clk_id, unsigned int freq, int dir)
2891 {
2892         struct snd_soc_component *component = dai->component;
2893         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2894         unsigned int reg_val = 0;
2895
2896         if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
2897                 return 0;
2898
2899         switch (clk_id) {
2900         case RT5645_SCLK_S_MCLK:
2901                 reg_val |= RT5645_SCLK_SRC_MCLK;
2902                 break;
2903         case RT5645_SCLK_S_PLL1:
2904                 reg_val |= RT5645_SCLK_SRC_PLL1;
2905                 break;
2906         case RT5645_SCLK_S_RCCLK:
2907                 reg_val |= RT5645_SCLK_SRC_RCCLK;
2908                 break;
2909         default:
2910                 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2911                 return -EINVAL;
2912         }
2913         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2914                 RT5645_SCLK_SRC_MASK, reg_val);
2915         rt5645->sysclk = freq;
2916         rt5645->sysclk_src = clk_id;
2917
2918         dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2919
2920         return 0;
2921 }
2922
2923 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2924                         unsigned int freq_in, unsigned int freq_out)
2925 {
2926         struct snd_soc_component *component = dai->component;
2927         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2928         struct rl6231_pll_code pll_code;
2929         int ret;
2930
2931         if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2932             freq_out == rt5645->pll_out)
2933                 return 0;
2934
2935         if (!freq_in || !freq_out) {
2936                 dev_dbg(component->dev, "PLL disabled\n");
2937
2938                 rt5645->pll_in = 0;
2939                 rt5645->pll_out = 0;
2940                 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2941                         RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2942                 return 0;
2943         }
2944
2945         switch (source) {
2946         case RT5645_PLL1_S_MCLK:
2947                 snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2948                         RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2949                 break;
2950         case RT5645_PLL1_S_BCLK1:
2951         case RT5645_PLL1_S_BCLK2:
2952                 switch (dai->id) {
2953                 case RT5645_AIF1:
2954                         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2955                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2956                         break;
2957                 case  RT5645_AIF2:
2958                         snd_soc_component_update_bits(component, RT5645_GLB_CLK,
2959                                 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2960                         break;
2961                 default:
2962                         dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2963                         return -EINVAL;
2964                 }
2965                 break;
2966         default:
2967                 dev_err(component->dev, "Unknown PLL source %d\n", source);
2968                 return -EINVAL;
2969         }
2970
2971         ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2972         if (ret < 0) {
2973                 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
2974                 return ret;
2975         }
2976
2977         dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2978                 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2979                 pll_code.n_code, pll_code.k_code);
2980
2981         snd_soc_component_write(component, RT5645_PLL_CTRL1,
2982                 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2983         snd_soc_component_write(component, RT5645_PLL_CTRL2,
2984                 ((pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT) |
2985                 (pll_code.m_bp << RT5645_PLL_M_BP_SFT));
2986
2987         rt5645->pll_in = freq_in;
2988         rt5645->pll_out = freq_out;
2989         rt5645->pll_src = source;
2990
2991         return 0;
2992 }
2993
2994 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2995                         unsigned int rx_mask, int slots, int slot_width)
2996 {
2997         struct snd_soc_component *component = dai->component;
2998         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
2999         unsigned int i_slot_sft, o_slot_sft, i_width_sht, o_width_sht, en_sft;
3000         unsigned int mask, val = 0;
3001
3002         switch (rt5645->codec_type) {
3003         case CODEC_TYPE_RT5650:
3004                 en_sft = 15;
3005                 i_slot_sft = 10;
3006                 o_slot_sft = 8;
3007                 i_width_sht = 6;
3008                 o_width_sht = 4;
3009                 mask = 0x8ff0;
3010                 break;
3011         default:
3012                 en_sft = 14;
3013                 i_slot_sft = o_slot_sft = 12;
3014                 i_width_sht = o_width_sht = 10;
3015                 mask = 0x7c00;
3016                 break;
3017         }
3018         if (rx_mask || tx_mask) {
3019                 val |= (1 << en_sft);
3020                 if (rt5645->codec_type == CODEC_TYPE_RT5645)
3021                         snd_soc_component_update_bits(component, RT5645_BASS_BACK,
3022                                 RT5645_G_BB_BST_MASK, RT5645_G_BB_BST_25DB);
3023         }
3024
3025         switch (slots) {
3026         case 4:
3027                 val |= (1 << i_slot_sft) | (1 << o_slot_sft);
3028                 break;
3029         case 6:
3030                 val |= (2 << i_slot_sft) | (2 << o_slot_sft);
3031                 break;
3032         case 8:
3033                 val |= (3 << i_slot_sft) | (3 << o_slot_sft);
3034                 break;
3035         case 2:
3036         default:
3037                 break;
3038         }
3039
3040         switch (slot_width) {
3041         case 20:
3042                 val |= (1 << i_width_sht) | (1 << o_width_sht);
3043                 break;
3044         case 24:
3045                 val |= (2 << i_width_sht) | (2 << o_width_sht);
3046                 break;
3047         case 32:
3048                 val |= (3 << i_width_sht) | (3 << o_width_sht);
3049                 break;
3050         case 16:
3051         default:
3052                 break;
3053         }
3054
3055         snd_soc_component_update_bits(component, RT5645_TDM_CTRL_1, mask, val);
3056
3057         return 0;
3058 }
3059
3060 static int rt5645_set_bias_level(struct snd_soc_component *component,
3061                         enum snd_soc_bias_level level)
3062 {
3063         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3064
3065         switch (level) {
3066         case SND_SOC_BIAS_PREPARE:
3067                 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
3068                         snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3069                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3070                                 RT5645_PWR_BG | RT5645_PWR_VREF2,
3071                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3072                                 RT5645_PWR_BG | RT5645_PWR_VREF2);
3073                         mdelay(10);
3074                         snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3075                                 RT5645_PWR_FV1 | RT5645_PWR_FV2,
3076                                 RT5645_PWR_FV1 | RT5645_PWR_FV2);
3077                         snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3078                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3079                 }
3080                 break;
3081
3082         case SND_SOC_BIAS_STANDBY:
3083                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3084                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3085                         RT5645_PWR_BG | RT5645_PWR_VREF2,
3086                         RT5645_PWR_VREF1 | RT5645_PWR_MB |
3087                         RT5645_PWR_BG | RT5645_PWR_VREF2);
3088                 mdelay(10);
3089                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3090                         RT5645_PWR_FV1 | RT5645_PWR_FV2,
3091                         RT5645_PWR_FV1 | RT5645_PWR_FV2);
3092                 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
3093                         snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1140);
3094                         msleep(40);
3095                         if (rt5645->en_button_func)
3096                                 queue_delayed_work(system_power_efficient_wq,
3097                                         &rt5645->jack_detect_work,
3098                                         msecs_to_jiffies(0));
3099                 }
3100                 break;
3101
3102         case SND_SOC_BIAS_OFF:
3103                 snd_soc_component_write(component, RT5645_DEPOP_M2, 0x1100);
3104                 if (!rt5645->en_button_func)
3105                         snd_soc_component_update_bits(component, RT5645_GEN_CTRL1,
3106                                         RT5645_DIG_GATE_CTRL, 0);
3107                 snd_soc_component_update_bits(component, RT5645_PWR_ANLG1,
3108                                 RT5645_PWR_VREF1 | RT5645_PWR_MB |
3109                                 RT5645_PWR_BG | RT5645_PWR_VREF2 |
3110                                 RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0);
3111                 break;
3112
3113         default:
3114                 break;
3115         }
3116
3117         return 0;
3118 }
3119
3120 static void rt5645_enable_push_button_irq(struct snd_soc_component *component,
3121         bool enable)
3122 {
3123         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3124
3125         if (enable) {
3126                 snd_soc_dapm_force_enable_pin(dapm, "ADC L power");
3127                 snd_soc_dapm_force_enable_pin(dapm, "ADC R power");
3128                 snd_soc_dapm_sync(dapm);
3129
3130                 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD1, 0x3, 0x3);
3131                 snd_soc_component_update_bits(component,
3132                                         RT5645_INT_IRQ_ST, 0x8, 0x8);
3133                 snd_soc_component_update_bits(component,
3134                                         RT5650_4BTN_IL_CMD2, 0x8000, 0x8000);
3135                 snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3136                 pr_debug("%s read %x = %x\n", __func__, RT5650_4BTN_IL_CMD1,
3137                         snd_soc_component_read(component, RT5650_4BTN_IL_CMD1));
3138         } else {
3139                 snd_soc_component_update_bits(component, RT5650_4BTN_IL_CMD2, 0x8000, 0x0);
3140                 snd_soc_component_update_bits(component, RT5645_INT_IRQ_ST, 0x8, 0x0);
3141
3142                 snd_soc_dapm_disable_pin(dapm, "ADC L power");
3143                 snd_soc_dapm_disable_pin(dapm, "ADC R power");
3144                 snd_soc_dapm_sync(dapm);
3145         }
3146 }
3147
3148 static int rt5645_jack_detect(struct snd_soc_component *component, int jack_insert)
3149 {
3150         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3151         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3152         unsigned int val;
3153
3154         if (jack_insert) {
3155                 regmap_write(rt5645->regmap, RT5645_CHARGE_PUMP, 0x0e06);
3156
3157                 /* for jack type detect */
3158                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3159                 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
3160                 snd_soc_dapm_sync(dapm);
3161                 if (!dapm->card->instantiated) {
3162                         /* Power up necessary bits for JD if dapm is
3163                            not ready yet */
3164                         regmap_update_bits(rt5645->regmap, RT5645_PWR_ANLG1,
3165                                 RT5645_PWR_MB | RT5645_PWR_VREF2,
3166                                 RT5645_PWR_MB | RT5645_PWR_VREF2);
3167                         regmap_update_bits(rt5645->regmap, RT5645_PWR_MIXER,
3168                                 RT5645_PWR_LDO2, RT5645_PWR_LDO2);
3169                         regmap_update_bits(rt5645->regmap, RT5645_PWR_VOL,
3170                                 RT5645_PWR_MIC_DET, RT5645_PWR_MIC_DET);
3171                 }
3172
3173                 regmap_write(rt5645->regmap, RT5645_JD_CTRL3, 0x00f0);
3174                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3175                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3176                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3177                         RT5645_CBJ_BST1_EN, RT5645_CBJ_BST1_EN);
3178                 msleep(100);
3179                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3180                         RT5645_CBJ_MN_JD, 0);
3181
3182                 msleep(600);
3183                 regmap_read(rt5645->regmap, RT5645_IN1_CTRL3, &val);
3184                 val &= 0x7;
3185                 dev_dbg(component->dev, "val = %d\n", val);
3186
3187                 if ((val == 1 || val == 2) && !rt5645->pdata.no_headset_mic) {
3188                         rt5645->jack_type = SND_JACK_HEADSET;
3189                         if (rt5645->en_button_func) {
3190                                 rt5645_enable_push_button_irq(component, true);
3191                         }
3192                 } else {
3193                         if (rt5645->en_button_func)
3194                                 rt5645_enable_push_button_irq(component, false);
3195                         snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3196                         snd_soc_dapm_sync(dapm);
3197                         rt5645->jack_type = SND_JACK_HEADPHONE;
3198                 }
3199                 if (rt5645->pdata.level_trigger_irq)
3200                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3201                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_NOR);
3202         } else { /* jack out */
3203                 rt5645->jack_type = 0;
3204
3205                 regmap_update_bits(rt5645->regmap, RT5645_HP_VOL,
3206                         RT5645_L_MUTE | RT5645_R_MUTE,
3207                         RT5645_L_MUTE | RT5645_R_MUTE);
3208                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2,
3209                         RT5645_CBJ_MN_JD, RT5645_CBJ_MN_JD);
3210                 regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1,
3211                         RT5645_CBJ_BST1_EN, 0);
3212
3213                 if (rt5645->en_button_func)
3214                         rt5645_enable_push_button_irq(component, false);
3215
3216                 if (rt5645->pdata.jd_mode == 0)
3217                         snd_soc_dapm_disable_pin(dapm, "LDO2");
3218                 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
3219                 snd_soc_dapm_sync(dapm);
3220                 if (rt5645->pdata.level_trigger_irq)
3221                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
3222                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
3223         }
3224
3225         return rt5645->jack_type;
3226 }
3227
3228 static int rt5645_button_detect(struct snd_soc_component *component)
3229 {
3230         int btn_type, val;
3231
3232         val = snd_soc_component_read(component, RT5650_4BTN_IL_CMD1);
3233         pr_debug("val=0x%x\n", val);
3234         btn_type = val & 0xfff0;
3235         snd_soc_component_write(component, RT5650_4BTN_IL_CMD1, val);
3236
3237         return btn_type;
3238 }
3239
3240 static irqreturn_t rt5645_irq(int irq, void *data);
3241
3242 int rt5645_set_jack_detect(struct snd_soc_component *component,
3243         struct snd_soc_jack *hp_jack, struct snd_soc_jack *mic_jack,
3244         struct snd_soc_jack *btn_jack)
3245 {
3246         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3247
3248         rt5645->hp_jack = hp_jack;
3249         rt5645->mic_jack = mic_jack;
3250         rt5645->btn_jack = btn_jack;
3251         if (rt5645->btn_jack && rt5645->codec_type == CODEC_TYPE_RT5650) {
3252                 rt5645->en_button_func = true;
3253                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
3254                                 RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
3255                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL1,
3256                                 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
3257                 regmap_update_bits(rt5645->regmap, RT5645_DEPOP_M1,
3258                                 RT5645_HP_CB_MASK, RT5645_HP_CB_PU);
3259         }
3260         rt5645_irq(0, rt5645);
3261
3262         return 0;
3263 }
3264 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect);
3265
3266 static void rt5645_jack_detect_work(struct work_struct *work)
3267 {
3268         struct rt5645_priv *rt5645 =
3269                 container_of(work, struct rt5645_priv, jack_detect_work.work);
3270         int val, btn_type, gpio_state = 0, report = 0;
3271
3272         if (!rt5645->component)
3273                 return;
3274
3275         mutex_lock(&rt5645->jd_mutex);
3276
3277         switch (rt5645->pdata.jd_mode) {
3278         case 0: /* Not using rt5645 JD */
3279                 if (rt5645->gpiod_hp_det) {
3280                         gpio_state = gpiod_get_value(rt5645->gpiod_hp_det);
3281                         if (rt5645->pdata.inv_hp_pol)
3282                                 gpio_state ^= 1;
3283                         dev_dbg(rt5645->component->dev, "gpio_state = %d\n",
3284                                 gpio_state);
3285                         report = rt5645_jack_detect(rt5645->component, gpio_state);
3286                 }
3287                 snd_soc_jack_report(rt5645->hp_jack,
3288                                     report, SND_JACK_HEADPHONE);
3289                 snd_soc_jack_report(rt5645->mic_jack,
3290                                     report, SND_JACK_MICROPHONE);
3291                 mutex_unlock(&rt5645->jd_mutex);
3292                 return;
3293         case 4:
3294                 val = snd_soc_component_read(rt5645->component, RT5645_A_JD_CTRL1) & 0x0020;
3295                 break;
3296         default: /* read rt5645 jd1_1 status */
3297                 val = snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x1000;
3298                 break;
3299
3300         }
3301
3302         if (!val && (rt5645->jack_type == 0)) { /* jack in */
3303                 report = rt5645_jack_detect(rt5645->component, 1);
3304         } else if (!val && rt5645->jack_type == SND_JACK_HEADSET) {
3305                 /* for push button and jack out */
3306                 btn_type = 0;
3307                 if (snd_soc_component_read(rt5645->component, RT5645_INT_IRQ_ST) & 0x4) {
3308                         /* button pressed */
3309                         report = SND_JACK_HEADSET;
3310                         btn_type = rt5645_button_detect(rt5645->component);
3311                         /* rt5650 can report three kinds of button behavior,
3312                            one click, double click and hold. However,
3313                            currently we will report button pressed/released
3314                            event. So all the three button behaviors are
3315                            treated as button pressed. */
3316                         switch (btn_type) {
3317                         case 0x8000:
3318                         case 0x4000:
3319                         case 0x2000:
3320                                 report |= SND_JACK_BTN_0;
3321                                 break;
3322                         case 0x1000:
3323                         case 0x0800:
3324                         case 0x0400:
3325                                 report |= SND_JACK_BTN_1;
3326                                 break;
3327                         case 0x0200:
3328                         case 0x0100:
3329                         case 0x0080:
3330                                 report |= SND_JACK_BTN_2;
3331                                 break;
3332                         case 0x0040:
3333                         case 0x0020:
3334                         case 0x0010:
3335                                 report |= SND_JACK_BTN_3;
3336                                 break;
3337                         case 0x0000: /* unpressed */
3338                                 break;
3339                         default:
3340                                 dev_err(rt5645->component->dev,
3341                                         "Unexpected button code 0x%04x\n",
3342                                         btn_type);
3343                                 break;
3344                         }
3345                 }
3346                 if (btn_type == 0)/* button release */
3347                         report =  rt5645->jack_type;
3348                 else {
3349                         mod_timer(&rt5645->btn_check_timer,
3350                                 msecs_to_jiffies(100));
3351                 }
3352         } else {
3353                 /* jack out */
3354                 report = 0;
3355                 snd_soc_component_update_bits(rt5645->component,
3356                                     RT5645_INT_IRQ_ST, 0x1, 0x0);
3357                 rt5645_jack_detect(rt5645->component, 0);
3358         }
3359
3360         mutex_unlock(&rt5645->jd_mutex);
3361
3362         snd_soc_jack_report(rt5645->hp_jack, report, SND_JACK_HEADPHONE);
3363         snd_soc_jack_report(rt5645->mic_jack, report, SND_JACK_MICROPHONE);
3364         if (rt5645->en_button_func)
3365                 snd_soc_jack_report(rt5645->btn_jack,
3366                         report, SND_JACK_BTN_0 | SND_JACK_BTN_1 |
3367                                 SND_JACK_BTN_2 | SND_JACK_BTN_3);
3368 }
3369
3370 static void rt5645_rcclock_work(struct work_struct *work)
3371 {
3372         struct rt5645_priv *rt5645 =
3373                 container_of(work, struct rt5645_priv, rcclock_work.work);
3374
3375         regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
3376                 RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PD);
3377 }
3378
3379 static irqreturn_t rt5645_irq(int irq, void *data)
3380 {
3381         struct rt5645_priv *rt5645 = data;
3382
3383         queue_delayed_work(system_power_efficient_wq,
3384                            &rt5645->jack_detect_work, msecs_to_jiffies(250));
3385
3386         return IRQ_HANDLED;
3387 }
3388
3389 static void rt5645_btn_check_callback(struct timer_list *t)
3390 {
3391         struct rt5645_priv *rt5645 = from_timer(rt5645, t, btn_check_timer);
3392
3393         queue_delayed_work(system_power_efficient_wq,
3394                    &rt5645->jack_detect_work, msecs_to_jiffies(5));
3395 }
3396
3397 static int rt5645_probe(struct snd_soc_component *component)
3398 {
3399         struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
3400         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3401
3402         rt5645->component = component;
3403
3404         switch (rt5645->codec_type) {
3405         case CODEC_TYPE_RT5645:
3406                 snd_soc_dapm_new_controls(dapm,
3407                         rt5645_specific_dapm_widgets,
3408                         ARRAY_SIZE(rt5645_specific_dapm_widgets));
3409                 snd_soc_dapm_add_routes(dapm,
3410                         rt5645_specific_dapm_routes,
3411                         ARRAY_SIZE(rt5645_specific_dapm_routes));
3412                 if (rt5645->v_id < 3) {
3413                         snd_soc_dapm_add_routes(dapm,
3414                                 rt5645_old_dapm_routes,
3415                                 ARRAY_SIZE(rt5645_old_dapm_routes));
3416                 }
3417                 break;
3418         case CODEC_TYPE_RT5650:
3419                 snd_soc_dapm_new_controls(dapm,
3420                         rt5650_specific_dapm_widgets,
3421                         ARRAY_SIZE(rt5650_specific_dapm_widgets));
3422                 snd_soc_dapm_add_routes(dapm,
3423                         rt5650_specific_dapm_routes,
3424                         ARRAY_SIZE(rt5650_specific_dapm_routes));
3425                 break;
3426         }
3427
3428         snd_soc_component_force_bias_level(component, SND_SOC_BIAS_OFF);
3429
3430         /* for JD function */
3431         if (rt5645->pdata.jd_mode) {
3432                 snd_soc_dapm_force_enable_pin(dapm, "JD Power");
3433                 snd_soc_dapm_force_enable_pin(dapm, "LDO2");
3434                 snd_soc_dapm_sync(dapm);
3435         }
3436
3437         if (rt5645->pdata.long_name)
3438                 component->card->long_name = rt5645->pdata.long_name;
3439
3440         rt5645->eq_param = devm_kcalloc(component->dev,
3441                 RT5645_HWEQ_NUM, sizeof(struct rt5645_eq_param_s),
3442                 GFP_KERNEL);
3443
3444         if (!rt5645->eq_param)
3445                 return -ENOMEM;
3446
3447         return 0;
3448 }
3449
3450 static void rt5645_remove(struct snd_soc_component *component)
3451 {
3452         rt5645_reset(component);
3453 }
3454
3455 #ifdef CONFIG_PM
3456 static int rt5645_suspend(struct snd_soc_component *component)
3457 {
3458         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3459
3460         regcache_cache_only(rt5645->regmap, true);
3461         regcache_mark_dirty(rt5645->regmap);
3462
3463         return 0;
3464 }
3465
3466 static int rt5645_resume(struct snd_soc_component *component)
3467 {
3468         struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
3469
3470         regcache_cache_only(rt5645->regmap, false);
3471         regcache_sync(rt5645->regmap);
3472
3473         return 0;
3474 }
3475 #else
3476 #define rt5645_suspend NULL
3477 #define rt5645_resume NULL
3478 #endif
3479
3480 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3481 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3482                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3483
3484 static const struct snd_soc_dai_ops rt5645_aif_dai_ops = {
3485         .hw_params = rt5645_hw_params,
3486         .set_fmt = rt5645_set_dai_fmt,
3487         .set_sysclk = rt5645_set_dai_sysclk,
3488         .set_tdm_slot = rt5645_set_tdm_slot,
3489         .set_pll = rt5645_set_dai_pll,
3490 };
3491
3492 static struct snd_soc_dai_driver rt5645_dai[] = {
3493         {
3494                 .name = "rt5645-aif1",
3495                 .id = RT5645_AIF1,
3496                 .playback = {
3497                         .stream_name = "AIF1 Playback",
3498                         .channels_min = 1,
3499                         .channels_max = 2,
3500                         .rates = RT5645_STEREO_RATES,
3501                         .formats = RT5645_FORMATS,
3502                 },
3503                 .capture = {
3504                         .stream_name = "AIF1 Capture",
3505                         .channels_min = 1,
3506                         .channels_max = 4,
3507                         .rates = RT5645_STEREO_RATES,
3508                         .formats = RT5645_FORMATS,
3509                 },
3510                 .ops = &rt5645_aif_dai_ops,
3511         },
3512         {
3513                 .name = "rt5645-aif2",
3514                 .id = RT5645_AIF2,
3515                 .playback = {
3516                         .stream_name = "AIF2 Playback",
3517                         .channels_min = 1,
3518                         .channels_max = 2,
3519                         .rates = RT5645_STEREO_RATES,
3520                         .formats = RT5645_FORMATS,
3521                 },
3522                 .capture = {
3523                         .stream_name = "AIF2 Capture",
3524                         .channels_min = 1,
3525                         .channels_max = 2,
3526                         .rates = RT5645_STEREO_RATES,
3527                         .formats = RT5645_FORMATS,
3528                 },
3529                 .ops = &rt5645_aif_dai_ops,
3530         },
3531 };
3532
3533 static const struct snd_soc_component_driver soc_component_dev_rt5645 = {
3534         .probe                  = rt5645_probe,
3535         .remove                 = rt5645_remove,
3536         .suspend                = rt5645_suspend,
3537         .resume                 = rt5645_resume,
3538         .set_bias_level         = rt5645_set_bias_level,
3539         .controls               = rt5645_snd_controls,
3540         .num_controls           = ARRAY_SIZE(rt5645_snd_controls),
3541         .dapm_widgets           = rt5645_dapm_widgets,
3542         .num_dapm_widgets       = ARRAY_SIZE(rt5645_dapm_widgets),
3543         .dapm_routes            = rt5645_dapm_routes,
3544         .num_dapm_routes        = ARRAY_SIZE(rt5645_dapm_routes),
3545         .use_pmdown_time        = 1,
3546         .endianness             = 1,
3547 };
3548
3549 static const struct regmap_config rt5645_regmap = {
3550         .reg_bits = 8,
3551         .val_bits = 16,
3552         .use_single_read = true,
3553         .use_single_write = true,
3554         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3555                                                RT5645_PR_SPACING),
3556         .volatile_reg = rt5645_volatile_register,
3557         .readable_reg = rt5645_readable_register,
3558
3559         .cache_type = REGCACHE_RBTREE,
3560         .reg_defaults = rt5645_reg,
3561         .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
3562         .ranges = rt5645_ranges,
3563         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3564 };
3565
3566 static const struct regmap_config rt5650_regmap = {
3567         .reg_bits = 8,
3568         .val_bits = 16,
3569         .use_single_read = true,
3570         .use_single_write = true,
3571         .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
3572                                                RT5645_PR_SPACING),
3573         .volatile_reg = rt5645_volatile_register,
3574         .readable_reg = rt5645_readable_register,
3575
3576         .cache_type = REGCACHE_RBTREE,
3577         .reg_defaults = rt5650_reg,
3578         .num_reg_defaults = ARRAY_SIZE(rt5650_reg),
3579         .ranges = rt5645_ranges,
3580         .num_ranges = ARRAY_SIZE(rt5645_ranges),
3581 };
3582
3583 static const struct regmap_config temp_regmap = {
3584         .name="nocache",
3585         .reg_bits = 8,
3586         .val_bits = 16,
3587         .use_single_read = true,
3588         .use_single_write = true,
3589         .max_register = RT5645_VENDOR_ID2 + 1,
3590         .cache_type = REGCACHE_NONE,
3591 };
3592
3593 static const struct i2c_device_id rt5645_i2c_id[] = {
3594         { "rt5645", 0 },
3595         { "rt5650", 0 },
3596         { }
3597 };
3598 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
3599
3600 #ifdef CONFIG_OF
3601 static const struct of_device_id rt5645_of_match[] = {
3602         { .compatible = "realtek,rt5645", },
3603         { .compatible = "realtek,rt5650", },
3604         { }
3605 };
3606 MODULE_DEVICE_TABLE(of, rt5645_of_match);
3607 #endif
3608
3609 #ifdef CONFIG_ACPI
3610 static const struct acpi_device_id rt5645_acpi_match[] = {
3611         { "10EC5645", 0 },
3612         { "10EC5648", 0 },
3613         { "10EC5650", 0 },
3614         { "10EC5640", 0 },
3615         { "10EC3270", 0 },
3616         {},
3617 };
3618 MODULE_DEVICE_TABLE(acpi, rt5645_acpi_match);
3619 #endif
3620
3621 static const struct rt5645_platform_data intel_braswell_platform_data = {
3622         .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3623         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3624         .jd_mode = 3,
3625 };
3626
3627 static const struct rt5645_platform_data buddy_platform_data = {
3628         .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3629         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3630         .jd_mode = 4,
3631         .level_trigger_irq = true,
3632 };
3633
3634 static const struct rt5645_platform_data gpd_win_platform_data = {
3635         .jd_mode = 3,
3636         .inv_jd1_1 = true,
3637         .long_name = "gpd-win-pocket-rt5645",
3638         /* The GPD pocket has a diff. mic, for the win this does not matter. */
3639         .in2_diff = true,
3640 };
3641
3642 static const struct rt5645_platform_data asus_t100ha_platform_data = {
3643         .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3644         .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3645         .jd_mode = 3,
3646         .inv_jd1_1 = true,
3647 };
3648
3649 static const struct rt5645_platform_data asus_t101ha_platform_data = {
3650         .dmic1_data_pin = RT5645_DMIC_DATA_IN2N,
3651         .dmic2_data_pin = RT5645_DMIC2_DISABLE,
3652         .jd_mode = 3,
3653 };
3654
3655 static const struct rt5645_platform_data lenovo_ideapad_miix_310_pdata = {
3656         .jd_mode = 3,
3657         .in2_diff = true,
3658 };
3659
3660 static const struct rt5645_platform_data jd_mode3_platform_data = {
3661         .jd_mode = 3,
3662 };
3663
3664 static const struct rt5645_platform_data lattepanda_board_platform_data = {
3665         .jd_mode = 2,
3666         .inv_jd1_1 = true
3667 };
3668
3669 static const struct rt5645_platform_data kahlee_platform_data = {
3670         .dmic1_data_pin = RT5645_DMIC_DATA_GPIO5,
3671         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3672         .jd_mode = 3,
3673 };
3674
3675 static const struct rt5645_platform_data ecs_ef20_platform_data = {
3676         .dmic1_data_pin = RT5645_DMIC1_DISABLE,
3677         .dmic2_data_pin = RT5645_DMIC_DATA_IN2P,
3678         .inv_hp_pol = 1,
3679 };
3680
3681 static const struct acpi_gpio_params ef20_hp_detect = { 1, 0, false };
3682
3683 static const struct acpi_gpio_mapping cht_rt5645_ef20_gpios[] = {
3684         { "hp-detect-gpios", &ef20_hp_detect, 1 },
3685         { },
3686 };
3687
3688 static int cht_rt5645_ef20_quirk_cb(const struct dmi_system_id *id)
3689 {
3690         cht_rt5645_gpios = cht_rt5645_ef20_gpios;
3691         return 1;
3692 }
3693
3694 static const struct dmi_system_id dmi_platform_data[] = {
3695         {
3696                 .ident = "Chrome Buddy",
3697                 .matches = {
3698                         DMI_MATCH(DMI_PRODUCT_NAME, "Buddy"),
3699                 },
3700                 .driver_data = (void *)&buddy_platform_data,
3701         },
3702         {
3703                 .ident = "Intel Strago",
3704                 .matches = {
3705                         DMI_MATCH(DMI_PRODUCT_NAME, "Strago"),
3706                 },
3707                 .driver_data = (void *)&intel_braswell_platform_data,
3708         },
3709         {
3710                 .ident = "Google Chrome",
3711                 .matches = {
3712                         DMI_MATCH(DMI_SYS_VENDOR, "GOOGLE"),
3713                 },
3714                 .driver_data = (void *)&intel_braswell_platform_data,
3715         },
3716         {
3717                 .ident = "Google Setzer",
3718                 .matches = {
3719                         DMI_MATCH(DMI_PRODUCT_NAME, "Setzer"),
3720                 },
3721                 .driver_data = (void *)&intel_braswell_platform_data,
3722         },
3723         {
3724                 .ident = "Microsoft Surface 3",
3725                 .matches = {
3726                         DMI_MATCH(DMI_PRODUCT_NAME, "Surface 3"),
3727                 },
3728                 .driver_data = (void *)&intel_braswell_platform_data,
3729         },
3730         {
3731                 /*
3732                  * Match for the GPDwin which unfortunately uses somewhat
3733                  * generic dmi strings, which is why we test for 4 strings.
3734                  * Comparing against 23 other byt/cht boards, board_vendor
3735                  * and board_name are unique to the GPDwin, where as only one
3736                  * other board has the same board_serial and 3 others have
3737                  * the same default product_name. Also the GPDwin is the
3738                  * only device to have both board_ and product_name not set.
3739                  */
3740                 .ident = "GPD Win / Pocket",
3741                 .matches = {
3742                         DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3743                         DMI_MATCH(DMI_BOARD_NAME, "Default string"),
3744                         DMI_MATCH(DMI_BOARD_SERIAL, "Default string"),
3745                         DMI_MATCH(DMI_PRODUCT_NAME, "Default string"),
3746                 },
3747                 .driver_data = (void *)&gpd_win_platform_data,
3748         },
3749         {
3750                 .ident = "ASUS T100HAN",
3751                 .matches = {
3752                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3753                         DMI_MATCH(DMI_PRODUCT_NAME, "T100HAN"),
3754                 },
3755                 .driver_data = (void *)&asus_t100ha_platform_data,
3756         },
3757         {
3758                 .ident = "ASUS T101HA",
3759                 .matches = {
3760                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
3761                         DMI_MATCH(DMI_PRODUCT_NAME, "T101HA"),
3762                 },
3763                 .driver_data = (void *)&asus_t101ha_platform_data,
3764         },
3765         {
3766                 .ident = "MINIX Z83-4",
3767                 .matches = {
3768                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MINIX"),
3769                         DMI_MATCH(DMI_PRODUCT_NAME, "Z83-4"),
3770                 },
3771                 .driver_data = (void *)&jd_mode3_platform_data,
3772         },
3773         {
3774                 .ident = "Teclast X80 Pro",
3775                 .matches = {
3776                         DMI_MATCH(DMI_SYS_VENDOR, "TECLAST"),
3777                         DMI_MATCH(DMI_PRODUCT_NAME, "X80 Pro"),
3778                 },
3779                 .driver_data = (void *)&jd_mode3_platform_data,
3780         },
3781         {
3782                 .ident = "Lenovo Ideapad Miix 310",
3783                 .matches = {
3784                   DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3785                   DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80SG"),
3786                   DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "MIIX 310-10ICR"),
3787                 },
3788                 .driver_data = (void *)&lenovo_ideapad_miix_310_pdata,
3789         },
3790         {
3791                 .ident = "Lenovo Ideapad Miix 320",
3792                 .matches = {
3793                   DMI_EXACT_MATCH(DMI_SYS_VENDOR, "LENOVO"),
3794                   DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "80XF"),
3795                   DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
3796                 },
3797                 .driver_data = (void *)&intel_braswell_platform_data,
3798         },
3799         {
3800                 .ident = "LattePanda board",
3801                 .matches = {
3802                   DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"),
3803                   DMI_EXACT_MATCH(DMI_BOARD_NAME, "Cherry Trail CR"),
3804                   DMI_EXACT_MATCH(DMI_BOARD_VERSION, "Default string"),
3805                   /*
3806                    * Above strings are too generic, LattePanda BIOS versions for
3807                    * all 4 hw revisions are:
3808                    * DF-BI-7-S70CR100-*
3809                    * DF-BI-7-S70CR110-*
3810                    * DF-BI-7-S70CR200-*
3811                    * LP-BS-7-S70CR700-*
3812                    * Do a partial match for S70CR to avoid false positive matches.
3813                    */
3814                   DMI_MATCH(DMI_BIOS_VERSION, "S70CR"),
3815                 },
3816                 .driver_data = (void *)&lattepanda_board_platform_data,
3817         },
3818         {
3819                 .ident = "Chrome Kahlee",
3820                 .matches = {
3821                         DMI_MATCH(DMI_PRODUCT_NAME, "Kahlee"),
3822                 },
3823                 .driver_data = (void *)&kahlee_platform_data,
3824         },
3825         {
3826                 .ident = "Medion E1239T",
3827                 .matches = {
3828                         DMI_EXACT_MATCH(DMI_SYS_VENDOR, "MEDION"),
3829                         DMI_MATCH(DMI_PRODUCT_NAME, "E1239T MD60568"),
3830                 },
3831                 .driver_data = (void *)&intel_braswell_platform_data,
3832         },
3833         {
3834                 .ident = "EF20",
3835                 .callback = cht_rt5645_ef20_quirk_cb,
3836                 .matches = {
3837                         DMI_MATCH(DMI_PRODUCT_NAME, "EF20"),
3838                 },
3839                 .driver_data = (void *)&ecs_ef20_platform_data,
3840         },
3841         { }
3842 };
3843
3844 static bool rt5645_check_dp(struct device *dev)
3845 {
3846         if (device_property_present(dev, "realtek,in2-differential") ||
3847             device_property_present(dev, "realtek,dmic1-data-pin") ||
3848             device_property_present(dev, "realtek,dmic2-data-pin") ||
3849             device_property_present(dev, "realtek,jd-mode"))
3850                 return true;
3851
3852         return false;
3853 }
3854
3855 static int rt5645_parse_dt(struct rt5645_priv *rt5645, struct device *dev)
3856 {
3857         rt5645->pdata.in2_diff = device_property_read_bool(dev,
3858                 "realtek,in2-differential");
3859         device_property_read_u32(dev,
3860                 "realtek,dmic1-data-pin", &rt5645->pdata.dmic1_data_pin);
3861         device_property_read_u32(dev,
3862                 "realtek,dmic2-data-pin", &rt5645->pdata.dmic2_data_pin);
3863         device_property_read_u32(dev,
3864                 "realtek,jd-mode", &rt5645->pdata.jd_mode);
3865
3866         return 0;
3867 }
3868
3869 static int rt5645_i2c_probe(struct i2c_client *i2c)
3870 {
3871         struct rt5645_platform_data *pdata = NULL;
3872         const struct dmi_system_id *dmi_data;
3873         struct rt5645_priv *rt5645;
3874         int ret, i;
3875         unsigned int val;
3876         struct regmap *regmap;
3877
3878         rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
3879                                 GFP_KERNEL);
3880         if (rt5645 == NULL)
3881                 return -ENOMEM;
3882
3883         rt5645->i2c = i2c;
3884         i2c_set_clientdata(i2c, rt5645);
3885
3886         dmi_data = dmi_first_match(dmi_platform_data);
3887         if (dmi_data) {
3888                 dev_info(&i2c->dev, "Detected %s platform\n", dmi_data->ident);
3889                 pdata = dmi_data->driver_data;
3890         }
3891
3892         if (pdata)
3893                 rt5645->pdata = *pdata;
3894         else if (rt5645_check_dp(&i2c->dev))
3895                 rt5645_parse_dt(rt5645, &i2c->dev);
3896         else
3897                 rt5645->pdata = jd_mode3_platform_data;
3898
3899         if (quirk != -1) {
3900                 rt5645->pdata.in2_diff = QUIRK_IN2_DIFF(quirk);
3901                 rt5645->pdata.level_trigger_irq = QUIRK_LEVEL_IRQ(quirk);
3902                 rt5645->pdata.inv_jd1_1 = QUIRK_INV_JD1_1(quirk);
3903                 rt5645->pdata.inv_hp_pol = QUIRK_INV_HP_POL(quirk);
3904                 rt5645->pdata.jd_mode = QUIRK_JD_MODE(quirk);
3905                 rt5645->pdata.dmic1_data_pin = QUIRK_DMIC1_DATA_PIN(quirk);
3906                 rt5645->pdata.dmic2_data_pin = QUIRK_DMIC2_DATA_PIN(quirk);
3907         }
3908
3909         if (has_acpi_companion(&i2c->dev)) {
3910                 if (cht_rt5645_gpios) {
3911                         if (devm_acpi_dev_add_driver_gpios(&i2c->dev, cht_rt5645_gpios))
3912                                 dev_dbg(&i2c->dev, "Failed to add driver gpios\n");
3913                 }
3914
3915                 /* The ALC3270 package has the headset-mic pin not-connected */
3916                 if (acpi_dev_hid_uid_match(ACPI_COMPANION(&i2c->dev), "10EC3270", NULL))
3917                         rt5645->pdata.no_headset_mic = true;
3918         }
3919
3920         rt5645->gpiod_hp_det = devm_gpiod_get_optional(&i2c->dev, "hp-detect",
3921                                                        GPIOD_IN);
3922
3923         if (IS_ERR(rt5645->gpiod_hp_det)) {
3924                 dev_info(&i2c->dev, "failed to initialize gpiod\n");
3925                 ret = PTR_ERR(rt5645->gpiod_hp_det);
3926                 /*
3927                  * Continue if optional gpiod is missing, bail for all other
3928                  * errors, including -EPROBE_DEFER
3929                  */
3930                 if (ret != -ENOENT)
3931                         return ret;
3932         }
3933
3934         for (i = 0; i < ARRAY_SIZE(rt5645->supplies); i++)
3935                 rt5645->supplies[i].supply = rt5645_supply_names[i];
3936
3937         ret = devm_regulator_bulk_get(&i2c->dev,
3938                                       ARRAY_SIZE(rt5645->supplies),
3939                                       rt5645->supplies);
3940         if (ret) {
3941                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3942                 return ret;
3943         }
3944
3945         ret = regulator_bulk_enable(ARRAY_SIZE(rt5645->supplies),
3946                                     rt5645->supplies);
3947         if (ret) {
3948                 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
3949                 return ret;
3950         }
3951
3952         regmap = devm_regmap_init_i2c(i2c, &temp_regmap);
3953         if (IS_ERR(regmap)) {
3954                 ret = PTR_ERR(regmap);
3955                 dev_err(&i2c->dev, "Failed to allocate temp register map: %d\n",
3956                         ret);
3957                 goto err_enable;
3958         }
3959
3960         /*
3961          * Read after 400msec, as it is the interval required between
3962          * read and power On.
3963          */
3964         msleep(TIME_TO_POWER_MS);
3965         regmap_read(regmap, RT5645_VENDOR_ID2, &val);
3966
3967         switch (val) {
3968         case RT5645_DEVICE_ID:
3969                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
3970                 rt5645->codec_type = CODEC_TYPE_RT5645;
3971                 break;
3972         case RT5650_DEVICE_ID:
3973                 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5650_regmap);
3974                 rt5645->codec_type = CODEC_TYPE_RT5650;
3975                 break;
3976         default:
3977                 dev_err(&i2c->dev,
3978                         "Device with ID register %#x is not rt5645 or rt5650\n",
3979                         val);
3980                 ret = -ENODEV;
3981                 goto err_enable;
3982         }
3983
3984         if (IS_ERR(rt5645->regmap)) {
3985                 ret = PTR_ERR(rt5645->regmap);
3986                 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3987                         ret);
3988                 goto err_enable;
3989         }
3990
3991         regmap_write(rt5645->regmap, RT5645_RESET, 0);
3992
3993         regmap_read(regmap, RT5645_VENDOR_ID, &val);
3994         rt5645->v_id = val & 0xff;
3995
3996         regmap_write(rt5645->regmap, RT5645_AD_DA_MIXER, 0x8080);
3997
3998         ret = regmap_register_patch(rt5645->regmap, init_list,
3999                                     ARRAY_SIZE(init_list));
4000         if (ret != 0)
4001                 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
4002
4003         if (rt5645->codec_type == CODEC_TYPE_RT5650) {
4004                 ret = regmap_register_patch(rt5645->regmap, rt5650_init_list,
4005                                     ARRAY_SIZE(rt5650_init_list));
4006                 if (ret != 0)
4007                         dev_warn(&i2c->dev, "Apply rt5650 patch failed: %d\n",
4008                                            ret);
4009         }
4010
4011         regmap_update_bits(rt5645->regmap, RT5645_CLSD_OUT_CTRL, 0xc0, 0xc0);
4012
4013         if (rt5645->pdata.in2_diff)
4014                 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
4015                                         RT5645_IN_DF2, RT5645_IN_DF2);
4016
4017         if (rt5645->pdata.dmic1_data_pin || rt5645->pdata.dmic2_data_pin) {
4018                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4019                         RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
4020         }
4021         switch (rt5645->pdata.dmic1_data_pin) {
4022         case RT5645_DMIC_DATA_IN2N:
4023                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4024                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
4025                 break;
4026
4027         case RT5645_DMIC_DATA_GPIO5:
4028                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4029                         RT5645_I2S2_DAC_PIN_MASK, RT5645_I2S2_DAC_PIN_GPIO);
4030                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4031                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
4032                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4033                         RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
4034                 break;
4035
4036         case RT5645_DMIC_DATA_GPIO11:
4037                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4038                         RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
4039                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4040                         RT5645_GP11_PIN_MASK,
4041                         RT5645_GP11_PIN_DMIC1_SDA);
4042                 break;
4043
4044         default:
4045                 break;
4046         }
4047
4048         switch (rt5645->pdata.dmic2_data_pin) {
4049         case RT5645_DMIC_DATA_IN2P:
4050                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4051                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
4052                 break;
4053
4054         case RT5645_DMIC_DATA_GPIO6:
4055                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4056                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
4057                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4058                         RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
4059                 break;
4060
4061         case RT5645_DMIC_DATA_GPIO10:
4062                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4063                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
4064                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4065                         RT5645_GP10_PIN_MASK,
4066                         RT5645_GP10_PIN_DMIC2_SDA);
4067                 break;
4068
4069         case RT5645_DMIC_DATA_GPIO12:
4070                 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
4071                         RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
4072                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4073                         RT5645_GP12_PIN_MASK,
4074                         RT5645_GP12_PIN_DMIC2_SDA);
4075                 break;
4076
4077         default:
4078                 break;
4079         }
4080
4081         if (rt5645->pdata.jd_mode) {
4082                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4083                                    RT5645_IRQ_CLK_GATE_CTRL,
4084                                    RT5645_IRQ_CLK_GATE_CTRL);
4085                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4086                                    RT5645_IRQ_CLK_INT, RT5645_IRQ_CLK_INT);
4087                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4088                                    RT5645_IRQ_JD_1_1_EN, RT5645_IRQ_JD_1_1_EN);
4089                 regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4090                                    RT5645_JD_PSV_MODE, RT5645_JD_PSV_MODE);
4091                 regmap_update_bits(rt5645->regmap, RT5645_HPO_MIXER,
4092                                    RT5645_IRQ_PSV_MODE, RT5645_IRQ_PSV_MODE);
4093                 regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
4094                                    RT5645_MIC2_OVCD_EN, RT5645_MIC2_OVCD_EN);
4095                 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
4096                                    RT5645_GP1_PIN_IRQ, RT5645_GP1_PIN_IRQ);
4097                 switch (rt5645->pdata.jd_mode) {
4098                 case 1:
4099                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4100                                            RT5645_JD1_MODE_MASK,
4101                                            RT5645_JD1_MODE_0);
4102                         break;
4103                 case 2:
4104                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4105                                            RT5645_JD1_MODE_MASK,
4106                                            RT5645_JD1_MODE_1);
4107                         break;
4108                 case 3:
4109                 case 4:
4110                         regmap_update_bits(rt5645->regmap, RT5645_A_JD_CTRL1,
4111                                            RT5645_JD1_MODE_MASK,
4112                                            RT5645_JD1_MODE_2);
4113                         break;
4114                 default:
4115                         break;
4116                 }
4117                 if (rt5645->pdata.inv_jd1_1) {
4118                         regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4119                                 RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4120                 }
4121         }
4122
4123         regmap_update_bits(rt5645->regmap, RT5645_ADDA_CLK1,
4124                 RT5645_I2S_PD1_MASK, RT5645_I2S_PD1_2);
4125
4126         if (rt5645->pdata.level_trigger_irq) {
4127                 regmap_update_bits(rt5645->regmap, RT5645_IRQ_CTRL2,
4128                         RT5645_JD_1_1_MASK, RT5645_JD_1_1_INV);
4129         }
4130         timer_setup(&rt5645->btn_check_timer, rt5645_btn_check_callback, 0);
4131
4132         mutex_init(&rt5645->jd_mutex);
4133         INIT_DELAYED_WORK(&rt5645->jack_detect_work, rt5645_jack_detect_work);
4134         INIT_DELAYED_WORK(&rt5645->rcclock_work, rt5645_rcclock_work);
4135
4136         if (rt5645->i2c->irq) {
4137                 ret = request_threaded_irq(rt5645->i2c->irq, NULL, rt5645_irq,
4138                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING
4139                         | IRQF_ONESHOT, "rt5645", rt5645);
4140                 if (ret) {
4141                         dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret);
4142                         goto err_enable;
4143                 }
4144         }
4145
4146         ret = devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5645,
4147                                      rt5645_dai, ARRAY_SIZE(rt5645_dai));
4148         if (ret)
4149                 goto err_irq;
4150
4151         return 0;
4152
4153 err_irq:
4154         if (rt5645->i2c->irq)
4155                 free_irq(rt5645->i2c->irq, rt5645);
4156 err_enable:
4157         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4158         return ret;
4159 }
4160
4161 static void rt5645_i2c_remove(struct i2c_client *i2c)
4162 {
4163         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4164
4165         if (i2c->irq)
4166                 free_irq(i2c->irq, rt5645);
4167
4168         /*
4169          * Since the rt5645_btn_check_callback() can queue jack_detect_work,
4170          * the timer need to be delted first
4171          */
4172         del_timer_sync(&rt5645->btn_check_timer);
4173
4174         cancel_delayed_work_sync(&rt5645->jack_detect_work);
4175         cancel_delayed_work_sync(&rt5645->rcclock_work);
4176
4177         regulator_bulk_disable(ARRAY_SIZE(rt5645->supplies), rt5645->supplies);
4178 }
4179
4180 static void rt5645_i2c_shutdown(struct i2c_client *i2c)
4181 {
4182         struct rt5645_priv *rt5645 = i2c_get_clientdata(i2c);
4183
4184         regmap_update_bits(rt5645->regmap, RT5645_GEN_CTRL3,
4185                 RT5645_RING2_SLEEVE_GND, RT5645_RING2_SLEEVE_GND);
4186         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL2, RT5645_CBJ_MN_JD,
4187                 RT5645_CBJ_MN_JD);
4188         regmap_update_bits(rt5645->regmap, RT5645_IN1_CTRL1, RT5645_CBJ_BST1_EN,
4189                 0);
4190         msleep(20);
4191         regmap_write(rt5645->regmap, RT5645_RESET, 0);
4192 }
4193
4194 static struct i2c_driver rt5645_i2c_driver = {
4195         .driver = {
4196                 .name = "rt5645",
4197                 .of_match_table = of_match_ptr(rt5645_of_match),
4198                 .acpi_match_table = ACPI_PTR(rt5645_acpi_match),
4199         },
4200         .probe_new = rt5645_i2c_probe,
4201         .remove = rt5645_i2c_remove,
4202         .shutdown = rt5645_i2c_shutdown,
4203         .id_table = rt5645_i2c_id,
4204 };
4205 module_i2c_driver(rt5645_i2c_driver);
4206
4207 MODULE_DESCRIPTION("ASoC RT5645 driver");
4208 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
4209 MODULE_LICENSE("GPL v2");